/*
** test_1:
** sub sp, sp, #80
-** str p4, \[sp\]
+** str z16, \[sp\]
** ...
** ptrue p0\.b, vl64
-** ldr p4, \[sp\]
+** ldr z16, \[sp\]
** add sp, sp, #?80
** ret
*/
test_1 (void)
{
volatile int x = 1;
- asm volatile ("" ::: "p4");
+ asm volatile ("" ::: "z16");
return svptrue_b8 ();
}
** sub sp, sp, #112
** stp x24, x25, \[sp, 64\]
** str x26, \[sp, 80\]
-** str p4, \[sp\]
+** str z16, \[sp\]
** ...
** ptrue p0\.b, vl64
-** ldr p4, \[sp\]
+** ldr z16, \[sp\]
** ldp x24, x25, \[sp, 64\]
** ldr x26, \[sp, 80\]
** add sp, sp, #?112
test_2 (void)
{
volatile int x = 1;
- asm volatile ("" ::: "p4", "x24", "x25", "x26");
+ asm volatile ("" ::: "z16", "x24", "x25", "x26");
return svptrue_b8 ();
}
** sub sp, sp, x12
** stp x24, x25, \[sp, 64\]
** str x26, \[sp, 80\]
-** str p4, \[sp\]
+** str z16, \[sp\]
** ...
** ptrue p0\.b, vl64
-** ldr p4, \[sp\]
+** ldr z16, \[sp\]
** ldp x24, x25, \[sp, 64\]
** ldr x26, \[sp, 80\]
** add sp, sp, x12
test_3 (void)
{
volatile int x[1024];
- asm volatile ("" :: "r" (x) : "p4", "x24", "x25", "x26");
+ asm volatile ("" :: "r" (x) : "z16", "x24", "x25", "x26");
return svptrue_b8 ();
}
/*
** test_4:
** sub sp, sp, #128
-** str p4, \[sp\]
+** str z16, \[sp\]
** ...
** ptrue p0\.h, vl32
-** ldr p4, \[sp\]
+** ldr z16, \[sp\]
** add sp, sp, #?128
** ret
*/
{
volatile svint32_t b;
b = svdup_s32 (1);
- asm volatile ("" ::: "p4");
+ asm volatile ("" ::: "z16");
return svptrue_b16 ();
}
** sub sp, sp, #160
** stp x24, x25, \[sp, 64\]
** str x26, \[sp, 80\]
-** str p4, \[sp\]
+** str z16, \[sp\]
** ...
** ptrue p0\.h, vl32
-** ldr p4, \[sp\]
+** ldr z16, \[sp\]
** ldp x24, x25, \[sp, 64\]
** ldr x26, \[sp, 80\]
** add sp, sp, #?160
{
volatile svint32_t b;
b = svdup_s32 (1);
- asm volatile ("" ::: "p4", "x24", "x25", "x26");
+ asm volatile ("" ::: "z16", "x24", "x25", "x26");
return svptrue_b16 ();
}
** stp x29, x30, \[sp, -16\]!
** mov x29, sp
** sub sp, sp, #64
-** str p4, \[sp\]
+** str z16, \[sp\]
** ...
** ptrue p0\.b, vl64
** add sp, sp, #?16
-** ldr p4, \[sp\]
+** ldr z16, \[sp\]
** add sp, sp, #?64
** ldp x29, x30, \[sp\], 16
** ret
test_6 (void)
{
take_stack_args (0, 0, 1, 2, 3, 4, 5, 6, 7);
- asm volatile ("" ::: "p4");
+ asm volatile ("" ::: "z16");
return svptrue_b8 ();
}
** sub sp, sp, x12
** stp x29, x30, \[sp, 64\]
** add x29, sp, #?64
-** str p4, \[sp\]
+** str z16, \[sp\]
** sub sp, sp, #16
** ...
** ptrue p0\.b, vl64
** add sp, sp, #?16
-** ldr p4, \[sp\]
+** ldr z16, \[sp\]
** add sp, sp, #?64
** ldp x29, x30, \[sp\]
** mov x12, #?4112
{
volatile int x[1024];
take_stack_args (x, 0, 1, 2, 3, 4, 5, 6, 7);
- asm volatile ("" ::: "p4");
+ asm volatile ("" ::: "z16");
return svptrue_b8 ();
}
** add x29, sp, #?64
** stp x24, x25, \[sp, 80\]
** str x26, \[sp, 96\]
-** str p4, \[sp\]
+** str z16, \[sp\]
** sub sp, sp, #16
** ...
** ptrue p0\.b, vl64
** add sp, sp, #?16
-** ldr p4, \[sp\]
+** ldr z16, \[sp\]
** add sp, sp, #?64
** ldp x24, x25, \[sp, 16\]
** ldr x26, \[sp, 32\]
{
volatile int x[1024];
take_stack_args (x, 0, 1, 2, 3, 4, 5, 6, 7);
- asm volatile ("" ::: "p4", "x24", "x25", "x26");
+ asm volatile ("" ::: "z16", "x24", "x25", "x26");
return svptrue_b8 ();
}
** sub sp, sp, x12
** stp x29, x30, \[sp, 64\]
** add x29, sp, #?64
-** str p4, \[sp\]
+** str z16, \[sp\]
** sub sp, sp, #16
** ...
** ptrue p0\.b, vl64
** sub sp, x29, #64
-** ldr p4, \[sp\]
+** ldr z16, \[sp\]
** add sp, sp, #?64
** ldp x29, x30, \[sp\]
** mov x12, #?4112
{
volatile int x[1024];
take_stack_args (x, __builtin_alloca (n), 1, 2, 3, 4, 5, 6, 7);
- asm volatile ("" ::: "p4");
+ asm volatile ("" ::: "z16");
return svptrue_b8 ();
}
** add x29, sp, #?64
** stp x24, x25, \[sp, 80\]
** str x26, \[sp, 96\]
-** str p4, \[sp\]
+** str z16, \[sp\]
** sub sp, sp, #16
** ...
** ptrue p0\.b, vl64
** sub sp, x29, #64
-** ldr p4, \[sp\]
+** ldr z16, \[sp\]
** add sp, sp, #?64
** ldp x24, x25, \[sp, 16\]
** ldr x26, \[sp, 32\]
{
volatile int x[1024];
take_stack_args (x, __builtin_alloca (n), 1, 2, 3, 4, 5, 6, 7);
- asm volatile ("" ::: "p4", "x24", "x25", "x26");
+ asm volatile ("" ::: "z16", "x24", "x25", "x26");
return svptrue_b8 ();
}
** add x29, sp, #?64
** stp x24, x25, \[sp, 80\]
** str x26, \[sp, 96\]
-** str p4, \[sp\]
+** str z16, \[sp\]
** sub sp, sp, #16
** ...
** ptrue p0\.b, vl64
** sub sp, x29, #64
-** ldr p4, \[sp\]
+** ldr z16, \[sp\]
** add sp, sp, #?64
** ldp x24, x25, \[sp, 16\]
** ldr x26, \[sp, 32\]
{
volatile int x[0x7ee4];
take_stack_args (x, __builtin_alloca (n), 1, 2, 3, 4, 5, 6, 7);
- asm volatile ("" ::: "p4", "x24", "x25", "x26");
+ asm volatile ("" ::: "z16", "x24", "x25", "x26");
return svptrue_b8 ();
}