]> git.ipfire.org Git - thirdparty/gcc.git/blobdiff - libgcc/config/aarch64/sfp-machine.h
Update copyright years.
[thirdparty/gcc.git] / libgcc / config / aarch64 / sfp-machine.h
index 3a09ae7605f295af6ba40acc05d33b2fec7a96b2..e60ecd27d53908cc88aca84fc4c9c8453fdb0935 100644 (file)
@@ -1,27 +1,32 @@
 /* Machine description for AArch64 architecture.
-   Copyright (C) 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
+   Copyright (C) 2009-2020 Free Software Foundation, Inc.
    Contributed by ARM Ltd.
 
-   This file is part of GCC.
+This file is part of GCC.
 
-   GCC is free software; you can redistribute it and/or modify it
-   under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 3, or (at your option)
-   any later version.
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
 
-   GCC is distributed in the hope that it will be useful, but
-   WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   General Public License for more details.
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
 
-   You should have received a copy of the GNU General Public License
-   along with GCC; see the file COPYING3.  If not see
-   <http://www.gnu.org/licenses/>.  */
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
 
 #define _FP_W_TYPE_SIZE                64
-#define _FP_W_TYPE             unsigned long
-#define _FP_WS_TYPE            signed long
-#define _FP_I_TYPE             int
+#define _FP_W_TYPE             unsigned long long
+#define _FP_WS_TYPE            signed long long
+#define _FP_I_TYPE             long long
 
 typedef int TItype __attribute__ ((mode (TI)));
 typedef unsigned int UTItype __attribute__ ((mode (TI)));
@@ -37,14 +42,17 @@ typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
 
 #define _FP_DIV_MEAT_Q(R,X,Y)  _FP_DIV_MEAT_2_udiv(Q,R,X,Y)
 
+#define _FP_NANFRAC_H          ((_FP_QNANBIT_H << 1) - 1)
 #define _FP_NANFRAC_S          ((_FP_QNANBIT_S << 1) - 1)
 #define _FP_NANFRAC_D          ((_FP_QNANBIT_D << 1) - 1)
 #define _FP_NANFRAC_Q          ((_FP_QNANBIT_Q << 1) - 1), -1
+#define _FP_NANSIGN_H          0
 #define _FP_NANSIGN_S          0
 #define _FP_NANSIGN_D          0
 #define _FP_NANSIGN_Q          0
 
 #define _FP_KEEPNANFRACP 1
+#define _FP_QNANNEGATEDP 0
 
 /* This appears to be in line with the VFP conventions in the v7-a
    ARM-ARM. Need to check with the v8 version.  */
@@ -69,62 +77,28 @@ typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
 #define FP_EX_OVERFLOW 0x04
 #define FP_EX_UNDERFLOW        0x08
 #define FP_EX_INEXACT  0x10
+#define FP_EX_SHIFT 8
+#define FP_EX_ALL \
+       (FP_EX_INVALID | FP_EX_DIVZERO | FP_EX_OVERFLOW | FP_EX_UNDERFLOW \
+        | FP_EX_INEXACT)
+
+#define _FP_TININESS_AFTER_ROUNDING 0
+
+void __sfp_handle_exceptions (int);
 
-#define FP_HANDLE_EXCEPTIONS                                           \
-  do {                                                                 \
-    const float fp_max = __FLT_MAX__;                                  \
-    const float fp_min = __FLT_MIN__;                                  \
-    const float fp_1e32 = 1.0e32f;                                     \
-    const float fp_zero = 0.0;                                         \
-    const float fp_one = 1.0;                                          \
-    unsigned fpsr;                                                     \
-    if (_fex & FP_EX_INVALID)                                          \
-      {                                                                        \
-        __asm__ __volatile__ ("fdiv\ts0, %s0, %s0"                     \
-                             :                                         \
-                             : "w" (fp_zero)                           \
-                             : "s0");                                  \
-       __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));           \
-      }                                                                        \
-    if (_fex & FP_EX_DIVZERO)                                          \
-      {                                                                        \
-       __asm__ __volatile__ ("fdiv\ts0, %s0, %s1"                      \
-                             :                                         \
-                             : "w" (fp_one), "w" (fp_zero)             \
-                             : "s0");                                  \
-       __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));           \
-      }                                                                        \
-    if (_fex & FP_EX_OVERFLOW)                                         \
-      {                                                                        \
-        __asm__ __volatile__ ("fadd\ts0, %s0, %s1"                     \
-                             :                                         \
-                             : "w" (fp_max), "w" (fp_1e32)             \
-                             : "s0");                                  \
-        __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));          \
-      }                                                                        \
-    if (_fex & FP_EX_UNDERFLOW)                                                \
-      {                                                                        \
-       __asm__ __volatile__ ("fmul\ts0, %s0, %s0"                      \
-                             :                                         \
-                             : "w" (fp_min)                            \
-                             : "s0");                                  \
-       __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));           \
-      }                                                                        \
-    if (_fex & FP_EX_INEXACT)                                          \
-      {                                                                        \
-       __asm__ __volatile__ ("fsub\ts0, %s0, %s1"                      \
-                             :                                         \
-                             : "w" (fp_max), "w" (fp_one)              \
-                             : "s0");                                  \
-       __asm__ __volatile__ ("mrs\t%0, fpsr" : "=r" (fpsr));           \
-      }                                                                        \
+#define FP_HANDLE_EXCEPTIONS                   \
+  do {                                         \
+    if (__builtin_expect (_fex, 0))            \
+      __sfp_handle_exceptions (_fex);          \
   } while (0)
 
+#define FP_TRAPPING_EXCEPTIONS ((_fpcr >> FP_EX_SHIFT) & FP_EX_ALL)
 
-#define FP_RND_NEAREST         0
-#define FP_RND_ZERO            0xc00000
+#define FP_RND_NEAREST         0x000000
 #define FP_RND_PINF            0x400000
 #define FP_RND_MINF            0x800000
+#define FP_RND_ZERO            0xc00000
+#define FP_RND_MASK            0xc00000
 
 #define _FP_DECL_EX \
   unsigned long int _fpcr __attribute__ ((unused)) = FP_RND_NEAREST
@@ -135,7 +109,7 @@ typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__)));
                          : "=r" (_fpcr));      \
   } while (0)
 
-#define FP_ROUNDMODE (_fpcr & 0xc00000)
+#define FP_ROUNDMODE (_fpcr & FP_RND_MASK)
 
 #define        __LITTLE_ENDIAN 1234
 #define        __BIG_ENDIAN    4321