u16 w;
t = get_conf_long(d, where + PCI_EXP_DEVCAP);
- printf("\t\tDevCap:\tMaxPayload %d bytes, PhantFunc %d, Latency L0s %s, L1 %s\n",
+ printf("\t\tDevCap:\tMaxPayload %d bytes, PhantFunc %d",
128 << (t & PCI_EXP_DEVCAP_PAYLOAD),
- (1 << ((t & PCI_EXP_DEVCAP_PHANTOM) >> 3)) - 1,
+ (1 << ((t & PCI_EXP_DEVCAP_PHANTOM) >> 3)) - 1);
+ if ((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_LEG_END))
+ printf(", Latency L0s %s, L1 %s",
latency_l0s((t & PCI_EXP_DEVCAP_L0S) >> 6),
latency_l1((t & PCI_EXP_DEVCAP_L1) >> 9));
+ printf("\n");
printf("\t\t\tExtTag%c", FLAG(t, PCI_EXP_DEVCAP_EXT_TAG));
if ((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_LEG_END) ||
(type == PCI_EXP_TYPE_UPSTREAM) || (type == PCI_EXP_TYPE_PCI_BRIDGE))
printf(" AttnBtn%c AttnInd%c PwrInd%c",
FLAG(t, PCI_EXP_DEVCAP_ATN_BUT),
FLAG(t, PCI_EXP_DEVCAP_ATN_IND), FLAG(t, PCI_EXP_DEVCAP_PWR_IND));
- printf(" RBE%c FLReset%c",
- FLAG(t, PCI_EXP_DEVCAP_RBE),
+ printf(" RBE%c",
+ FLAG(t, PCI_EXP_DEVCAP_RBE));
+ if ((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_LEG_END))
+ printf(" FLReset%c",
FLAG(t, PCI_EXP_DEVCAP_FLRESET));
if (type == PCI_EXP_TYPE_UPSTREAM)
- printf("SlotPowerLimit %.3fW",
+ printf(" SlotPowerLimit %.3fW",
power_limit((t & PCI_EXP_DEVCAP_PWR_VAL) >> 18,
(t & PCI_EXP_DEVCAP_PWR_SCL) >> 26));
printf("\n");
FLAG(w, PCI_EXP_DEVCTL_PHANTOM),
FLAG(w, PCI_EXP_DEVCTL_AUX_PME),
FLAG(w, PCI_EXP_DEVCTL_NOSNOOP));
- if (type == PCI_EXP_TYPE_PCI_BRIDGE || type == PCI_EXP_TYPE_PCIE_BRIDGE)
+ if (type == PCI_EXP_TYPE_PCI_BRIDGE)
printf(" BrConfRtry%c", FLAG(w, PCI_EXP_DEVCTL_BCRE));
- if (type == PCI_EXP_TYPE_ENDPOINT && (t & PCI_EXP_DEVCAP_FLRESET))
+ if (((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_LEG_END)) &&
+ (t & PCI_EXP_DEVCAP_FLRESET))
printf(" FLReset%c", FLAG(w, PCI_EXP_DEVCTL_FLRESET));
printf("\n\t\t\tMaxPayload %d bytes, MaxReadReq %d bytes\n",
128 << ((w & PCI_EXP_DEVCTL_PAYLOAD) >> 5),
u16 w;
t = get_conf_long(d, where + PCI_EXP_LNKCAP);
- printf("\t\tLnkCap:\tPort #%d, Speed %s, Width x%d, ASPM %s, Latency L0 %s, L1 %s\n",
+ printf("\t\tLnkCap:\tPort #%d, Speed %s, Width x%d, ASPM %s, Exit Latency L0s %s, L1 %s\n",
t >> 24,
link_speed(t & PCI_EXP_LNKCAP_SPEED), (t & PCI_EXP_LNKCAP_WIDTH) >> 4,
aspm_support((t & PCI_EXP_LNKCAP_ASPM) >> 10),
latency_l0s((t & PCI_EXP_LNKCAP_L0S) >> 12),
latency_l1((t & PCI_EXP_LNKCAP_L1) >> 15));
- printf("\t\t\tClockPM%c Surprise%c LLActRep%c BwNot%c\n",
+ printf("\t\t\tClockPM%c Surprise%c LLActRep%c BwNot%c ASPMOptComp%c\n",
FLAG(t, PCI_EXP_LNKCAP_CLOCKPM),
FLAG(t, PCI_EXP_LNKCAP_SURPRISE),
FLAG(t, PCI_EXP_LNKCAP_DLLA),
- FLAG(t, PCI_EXP_LNKCAP_LBNC));
+ FLAG(t, PCI_EXP_LNKCAP_LBNC),
+ FLAG(t, PCI_EXP_LNKCAP_AOC));
w = get_conf_word(d, where + PCI_EXP_LNKCTL);
printf("\t\tLnkCtl:\tASPM %s;", aspm_enabled(w & PCI_EXP_LNKCTL_ASPM));
if ((type == PCI_EXP_TYPE_ROOT_PORT) || (type == PCI_EXP_TYPE_ENDPOINT) ||
- (type == PCI_EXP_TYPE_LEG_END))
+ (type == PCI_EXP_TYPE_LEG_END) || (type == PCI_EXP_TYPE_PCI_BRIDGE))
printf(" RCB %d bytes", w & PCI_EXP_LNKCTL_RCB ? 128 : 64);
- printf(" Disabled%c Retrain%c CommClk%c\n\t\t\tExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c\n",
+ printf(" Disabled%c CommClk%c\n\t\t\tExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c\n",
FLAG(w, PCI_EXP_LNKCTL_DISABLE),
- FLAG(w, PCI_EXP_LNKCTL_RETRAIN),
FLAG(w, PCI_EXP_LNKCTL_CLOCK),
FLAG(w, PCI_EXP_LNKCTL_XSYNCH),
FLAG(w, PCI_EXP_LNKCTL_CLOCKPM),
printf("Downstream Port (Slot%c)", FLAG(cap, PCI_EXP_FLAGS_SLOT));
break;
case PCI_EXP_TYPE_PCI_BRIDGE:
- printf("PCI/PCI-X Bridge");
+ printf("PCI-Express to PCI/PCI-X Bridge");
break;
case PCI_EXP_TYPE_PCIE_BRIDGE:
printf("PCI/PCI-X to PCI-Express Bridge");
if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
{
- where = get_conf_byte(d, where) & ~3;
byte been_there[256];
+ where = get_conf_byte(d, where) & ~3;
memset(been_there, 0, 256);
while (where)
{