/*
* The PCI Utilities -- Show Extended Capabilities
*
- * Copyright (c) 1997--2008 Martin Mares <mj@ucw.cz>
+ * Copyright (c) 1997--2010 Martin Mares <mj@ucw.cz>
*
* Can be freely distributed and used under the terms of the GNU GPL.
*/
#include "lspci.h"
+static void
+cap_tph(struct device *d, int where)
+{
+ u32 tph_cap;
+ printf("Transaction Processing Hints\n");
+ if (verbose < 2)
+ return;
+
+ if (!config_fetch(d, where + PCI_TPH_CAPABILITIES, 4))
+ return;
+
+ tph_cap = get_conf_long(d, where + PCI_TPH_CAPABILITIES);
+
+ if (tph_cap & PCI_TPH_INTVEC_SUP)
+ printf("\t\tInterrupt vector mode supported\n");
+ if (tph_cap & PCI_TPH_DEV_SUP)
+ printf("\t\tDevice specific mode supported\n");
+ if (tph_cap & PCI_TPH_EXT_REQ_SUP)
+ printf("\t\tExtended requester support\n");
+
+ switch (tph_cap & PCI_TPH_ST_LOC_MASK) {
+ case PCI_TPH_ST_NONE:
+ printf("\t\tNo steering table available\n");
+ break;
+ case PCI_TPH_ST_CAP:
+ printf("\t\tSteering table in TPH capability structure\n");
+ break;
+ case PCI_TPH_ST_MSIX:
+ printf("\t\tSteering table in MSI-X table\n");
+ break;
+ default:
+ printf("\t\tReserved steering table location\n");
+ break;
+ }
+}
+
+static u32
+cap_ltr_scale(u8 scale)
+{
+ return 1 << (scale * 5);
+}
+
+static void
+cap_ltr(struct device *d, int where)
+{
+ u32 scale;
+ u16 snoop, nosnoop;
+ printf("Latency Tolerance Reporting\n");
+ if (verbose < 2)
+ return;
+
+ if (!config_fetch(d, where + PCI_LTR_MAX_SNOOP, 4))
+ return;
+
+ snoop = get_conf_word(d, where + PCI_LTR_MAX_SNOOP);
+ scale = cap_ltr_scale((snoop >> PCI_LTR_SCALE_SHIFT) & PCI_LTR_SCALE_MASK);
+ printf("\t\tMax snoop latency: %lldns\n",
+ ((unsigned long long)snoop & PCI_LTR_VALUE_MASK) * scale);
+
+ nosnoop = get_conf_word(d, where + PCI_LTR_MAX_NOSNOOP);
+ scale = cap_ltr_scale((nosnoop >> PCI_LTR_SCALE_SHIFT) & PCI_LTR_SCALE_MASK);
+ printf("\t\tMax no snoop latency: %lldns\n",
+ ((unsigned long long)nosnoop & PCI_LTR_VALUE_MASK) * scale);
+}
+
static void
cap_dsn(struct device *d, int where)
{
int arb_table_pos;
int i, j;
static const char ref_clocks[][6] = { "100ns" };
- static const char arb_selects[][7] = { "Fixed", "WRR32", "WRR64", "WRR128" };
- static const char vc_arb_selects[][8] = { "Fixed", "WRR32", "WRR64", "WRR128", "TWRR128", "WRR256" };
+ static const char arb_selects[8][7] = { "Fixed", "WRR32", "WRR64", "WRR128", "??4", "??5", "??6", "??7" };
+ static const char vc_arb_selects[8][8] = { "Fixed", "WRR32", "WRR64", "WRR128", "TWRR128", "WRR256", "??6", "??7" };
char buf[8];
printf("Virtual Channel\n");
status = get_conf_word(d, where + PCI_VC_PORT_STATUS);
evc_cnt = BITS(cr1, 0, 3);
- printf("\t\tCaps:\tLPEVC=%d RefClk=%s PATEntrySize=%d\n",
+ printf("\t\tCaps:\tLPEVC=%d RefClk=%s PATEntryBits=%d\n",
BITS(cr1, 4, 3),
TABLE(ref_clocks, BITS(cr1, 8, 2), buf),
- BITS(cr1, 10, 2));
+ 1 << BITS(cr1, 10, 2));
- printf("\t\tArb:\t");
+ printf("\t\tArb:");
for (i=0; i<8; i++)
if (arb_selects[i][0] != '?' || cr2 & (1 << i))
- printf("%s%c ", arb_selects[i], FLAG(cr2, 1 << i));
+ printf("%c%s%c", (i ? ' ' : '\t'), arb_selects[i], FLAG(cr2, 1 << i));
arb_table_pos = BITS(cr2, 24, 8);
- printf("TableOffset=%x\n", arb_table_pos);
- printf("\t\tCtrl:\tArbSelect=%s\n", TABLE(arb_selects, BITS(ctrl, 1, 3), buf));
+ printf("\n\t\tCtrl:\tArbSelect=%s\n", TABLE(arb_selects, BITS(ctrl, 1, 3), buf));
printf("\t\tStatus:\tInProgress%c\n", FLAG(status, 1));
if (arb_table_pos)
- printf("\t\tPort Arbitration Table <?>\n");
+ {
+ arb_table_pos = where + 16*arb_table_pos;
+ printf("\t\tPort Arbitration Table [%x] <?>\n", arb_table_pos);
+ }
for (i=0; i<=evc_cnt; i++)
{
}
rcap = get_conf_long(d, pos);
rctrl = get_conf_long(d, pos+4);
- rstatus = get_conf_word(d, pos+8);
+ rstatus = get_conf_word(d, pos+10);
pat_pos = BITS(rcap, 24, 8);
printf("Caps:\tPATOffset=%02x MaxTimeSlots=%d RejSnoopTrans%c\n",
BITS(hdr, 20, 12));
}
+static void
+cap_l1pm(struct device *d, int where)
+{
+ u32 l1_cap;
+ int power_on_scale;
+
+ printf("L1 PM Substates\n");
+
+ if (verbose < 2)
+ return;
+
+ if (!config_fetch(d, where + 4, 4))
+ {
+ printf("\t\t<unreadable>\n");
+ return;
+ }
+
+ l1_cap = get_conf_long(d, where + 4);
+ printf("\t\tL1SubCap: ");
+ printf("PCI-PM_L1.2%c PCI-PM_L1.1%c ASPM_L1.2%c ASPM_L1.1%c L1_PM_Substates%c\n",
+ FLAG(l1_cap, 1),
+ FLAG(l1_cap, 2),
+ FLAG(l1_cap, 4),
+ FLAG(l1_cap, 8),
+ FLAG(l1_cap, 16));
+
+ if (BITS(l1_cap, 0, 1) || BITS(l1_cap, 2, 1))
+ {
+ printf("\t\t\t PortCommonModeRestoreTime=%dus ",
+ BITS(l1_cap, 8,8));
+
+ power_on_scale = BITS(l1_cap, 16, 2);
+
+ printf("PortTPowerOnTime=");
+ switch (power_on_scale)
+ {
+ case 0:
+ printf("%dus\n", BITS(l1_cap, 19, 5) * 2);
+ break;
+ case 1:
+ printf("%dus\n", BITS(l1_cap, 19, 5) * 10);
+ break;
+ case 2:
+ printf("%dus\n", BITS(l1_cap, 19, 5) * 100);
+ break;
+ default:
+ printf("<error>\n");
+ break;
+ }
+ }
+}
+
void
show_ext_caps(struct device *d)
{
case PCI_EXT_CAP_ID_SRIOV:
cap_sriov(d, where);
break;
+ case PCI_EXT_CAP_ID_TPH:
+ cap_tph(d, where);
+ break;
+ case PCI_EXT_CAP_ID_LTR:
+ cap_ltr(d, where);
+ break;
+ case PCI_EXT_CAP_ID_L1PM:
+ cap_l1pm(d, where);
+ break;
default:
printf("#%02x\n", id);
break;
projects / thirdparty / pciutils.git / blobdiff