Update copyright dates with scripts/update-copyrights.

[thirdparty/glibc.git] / sysdeps / mips / fpu_control.h

diff --git a/sysdeps/mips/fpu_control.h b/sysdeps/mips/fpu_control.h
index da18deab5a6c6e76c674dde75775a2fa47eeded3..4f168fe79a4e07fda2ef7c75014ac2d4e3bb3d90 100644 (file)
--- a/sysdeps/mips/fpu_control.h
+++ b/sysdeps/mips/fpu_control.h
@@ -1,5 +1,5 @@
 /* FPU control word bits.  Mips version.
-   Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
+   Copyright (C) 1996-2019 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
    Contributed by Olaf Flebbe and Ralf Baechle.
 
@@ -14,9 +14,8 @@
    Lesser General Public License for more details.
 
    You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, write to the Free
-   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
-   02111-1307 USA.  */
+   License along with the GNU C Library.  If not, see
+   <http://www.gnu.org/licenses/>.  */
 
 #ifndef _FPU_CONTROL_H
 #define _FPU_CONTROL_H
@@ -29,7 +28,10 @@
  *           causing unimplemented operation exception.  This bit is only
  *           available for MIPS III and newer.
  * 23     -> Condition bit
- * 22-18  -> reserved (read as 0, write with 0)
+ * 22-21  -> reserved for architecture implementers
+ * 20     -> reserved (read as 0, write with 0)
+ * 19     -> IEEE 754-2008 non-arithmetic ABS.fmt and NEG.fmt enable
+ * 18     -> IEEE 754-2008 recommended NaN encoding enable
  * 17     -> cause bit for unimplemented operation
  * 16     -> cause bit for invalid exception
  * 15     -> cause bit for division by zero exception
@@ -58,41 +60,74 @@
 
 #include <features.h>
 
-/* masking of interrupts */
+#ifdef __mips_soft_float
+
+#define _FPU_RESERVED 0xffffffff
+#define _FPU_DEFAULT  0x00000000
+typedef unsigned int fpu_control_t;
+#define _FPU_GETCW(cw) (cw) = 0
+#define _FPU_SETCW(cw) (void) (cw)
+extern fpu_control_t __fpu_control;
+
+#else /* __mips_soft_float */
+
+/* Masks for interrupts.  */
 #define _FPU_MASK_V     0x0800  /* Invalid operation */
 #define _FPU_MASK_Z     0x0400  /* Division by zero  */
 #define _FPU_MASK_O     0x0200  /* Overflow          */
 #define _FPU_MASK_U     0x0100  /* Underflow         */
 #define _FPU_MASK_I     0x0080  /* Inexact operation */
 
-/* flush denormalized numbers to zero */
+/* Flush denormalized numbers to zero.  */
 #define _FPU_FLUSH_TZ   0x1000000
 
-/* rounding control */
+/* IEEE 754-2008 compliance control.  */
+#define _FPU_ABS2008    0x80000
+#define _FPU_NAN2008    0x40000
+
+/* Rounding control.  */
 #define _FPU_RC_NEAREST 0x0     /* RECOMMENDED */
 #define _FPU_RC_ZERO    0x1
 #define _FPU_RC_UP      0x2
 #define _FPU_RC_DOWN    0x3
+/* Mask for rounding control.  */
+#define _FPU_RC_MASK   0x3
 
-#define _FPU_RESERVED 0xfe3c0000  /* Reserved bits in cw */
+#define _FPU_RESERVED 0xfe8c0000  /* Reserved bits in cw, incl ABS/NAN2008.  */
 
 
 /* The fdlibm code requires strict IEEE double precision arithmetic,
    and no interrupts for exceptions, rounding to nearest.  */
-
-#define _FPU_DEFAULT  0x00000000
-
-/* IEEE:  same as above, but exceptions */
-#define _FPU_IEEE     0x00000F80
+#ifdef __mips_nan2008
+# define _FPU_DEFAULT 0x000C0000
+#else
+# define _FPU_DEFAULT 0x00000000
+#endif
+
+/* IEEE: same as above, but exceptions.  */
+#ifdef __mips_nan2008
+# define _FPU_IEEE    0x000C0F80
+#else
+# define _FPU_IEEE    0x00000F80
+#endif
 
 /* Type of the control word.  */
 typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__)));
 
 /* Macros for accessing the hardware control word.  */
-#define _FPU_GETCW(cw) __asm__ ("cfc1 %0,$31" : "=r" (cw))
-#define _FPU_SETCW(cw) __asm__ ("ctc1 %0,$31" : : "r" (cw))
+extern fpu_control_t __mips_fpu_getcw (void) __THROW;
+extern void __mips_fpu_setcw (fpu_control_t) __THROW;
+#ifdef __mips16
+# define _FPU_GETCW(cw) do { (cw) = __mips_fpu_getcw (); } while (0)
+# define _FPU_SETCW(cw) __mips_fpu_setcw (cw)
+#else
+# define _FPU_GETCW(cw) __asm__ volatile ("cfc1 %0,$31" : "=r" (cw))
+# define _FPU_SETCW(cw) __asm__ volatile ("ctc1 %0,$31" : : "r" (cw))
+#endif
 
 /* Default control word set at startup.  */
 extern fpu_control_t __fpu_control;
 
+#endif /* __mips_soft_float */
+
 #endif /* fpu_control.h */