PowerPC floating point little-endian [8 of 15]

[thirdparty/glibc.git] / sysdeps / powerpc / fpu / fraiseexcpt.c

diff --git a/sysdeps/powerpc/fpu/fraiseexcpt.c b/sysdeps/powerpc/fpu/fraiseexcpt.c
index 9118c1954a89e3b342f2f4941dbbd8a047074dbf..6193071bd47cb5524535a3039b58b56634b35fa5 100644 (file)
--- a/sysdeps/powerpc/fpu/fraiseexcpt.c
+++ b/sysdeps/powerpc/fpu/fraiseexcpt.c
@@ -33,11 +33,11 @@ __feraiseexcept (int excepts)
   u.fenv = fegetenv_register ();
 
   /* Add the exceptions */
-  u.l[1] = (u.l[1]
-           | (excepts & FPSCR_STICKY_BITS)
-           /* Turn FE_INVALID into FE_INVALID_SOFTWARE.  */
-           | (excepts >> ((31 - FPSCR_VX) - (31 - FPSCR_VXSOFT))
-              & FE_INVALID_SOFTWARE));
+  u.l = (u.l
+        | (excepts & FPSCR_STICKY_BITS)
+        /* Turn FE_INVALID into FE_INVALID_SOFTWARE.  */
+        | (excepts >> ((31 - FPSCR_VX) - (31 - FPSCR_VXSOFT))
+           & FE_INVALID_SOFTWARE));
 
   /* Store the new status word (along with the rest of the environment),
      triggering any appropriate exceptions.  */
@@ -49,7 +49,7 @@ __feraiseexcept (int excepts)
         don't have FE_INVALID_SOFTWARE implemented.  Detect this
         case and raise FE_INVALID_SNAN instead.  */
       u.fenv = fegetenv_register ();
-      if ((u.l[1] & FE_INVALID) == 0)
+      if ((u.l & FE_INVALID) == 0)
        set_fpscr_bit (FPSCR_VXSNAN);
     }