powerpc: Change atomic_write_barrier to have release semantics.

[thirdparty/glibc.git] / sysdeps / powerpc / powerpc32 / bits / atomic.h

diff --git a/sysdeps/powerpc/powerpc32/bits/atomic.h b/sysdeps/powerpc/powerpc32/bits/atomic.h
index 7613bdc485034f62c4099fd0596200694b608291..a3dd09cd9a626ee4ab268be3ef48568f8ccdba4f 100644 (file)
--- a/sysdeps/powerpc/powerpc32/bits/atomic.h
+++ b/sysdeps/powerpc/powerpc32/bits/atomic.h
@@ -117,6 +117,7 @@
 # ifndef UP
 #  define __ARCH_REL_INSTR     "lwsync"
 # endif
+# define atomic_write_barrier()        __asm ("lwsync" ::: "memory")
 #else
 /*
  * Older powerpc32 processors don't support the new "light weight"
@@ -124,6 +125,7 @@
  * for all powerpc32 applications.
  */
 # define atomic_read_barrier() __asm ("sync" ::: "memory")
+# define atomic_write_barrier()        __asm ("sync" ::: "memory")
 #endif
 
 /*