Update copyright dates with scripts/update-copyrights.

[thirdparty/glibc.git] / sysdeps / powerpc / powerpc64 / fpu / s_truncf.S

diff --git a/sysdeps/powerpc/powerpc64/fpu/s_truncf.S b/sysdeps/powerpc/powerpc64/fpu/s_truncf.S
index 1456e7f43476e91a230ba658f5151fe1aa52cbf4..cfcff80bf761c0f0c9f52f5a4a3ace2398026d28 100644 (file)
--- a/sysdeps/powerpc/powerpc64/fpu/s_truncf.S
+++ b/sysdeps/powerpc/powerpc64/fpu/s_truncf.S
@@ -1,5 +1,5 @@
 /* truncf function.  PowerPC64 version.
-   Copyright (C) 2004, 2006 Free Software Foundation, Inc.
+   Copyright (C) 2004-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -13,40 +13,43 @@
    Lesser General Public License for more details.
 
    You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, write to the Free
-   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
-   02111-1307 USA.  */
+   License along with the GNU C Library; if not, see
+   <http://www.gnu.org/licenses/>.  */
 
 #include <sysdep.h>
 
        .section        ".toc","aw"
+       .p2align 3
 .LC0:  /* 2**23 */
-       .tc FD_4b000000_0[TC],0x4b00000000000000
+       .long 0x4b000000
+       .long 0x0
        .section        ".text"
-       
+
 /* float [fp1] truncf (float x [fp1])
    IEEE 1003.1 trunc function.  IEEE specifies "trunc to the integer
-   value, in floating format, nearest to but no larger in magnitude 
+   value, in floating format, nearest to but no larger in magnitude
    then the argument."
    We set "round toward Zero" mode and trunc by adding +-2**23 then
    subtracting +-2**23.  */
 
 EALIGN (__truncf, 4, 0)
        CALL_MCOUNT 0
-       mffs    fp11            /* Save current FPU rounding mode.  */
        lfs     fp13,.LC0@toc(2)
        fabs    fp0,fp1
        fsubs   fp12,fp13,fp13  /* generate 0.0  */
        fcmpu   cr7,fp0,fp13    /* if (fabs(x) > TWO23)  */
+       mffs    fp11            /* Save current FPU rounding mode and
+                                  "inexact" state.  */
        fcmpu   cr6,fp1,fp12    /* if (x > 0.0)  */
-       bnllr-  cr7
+       bnl-    cr7,.L10
        mtfsfi  7,1             /* Set rounding toward 0 mode.  */
        ble-    cr6,.L4
        fadds   fp1,fp1,fp13    /* x+= TWO23;  */
        fsubs   fp1,fp1,fp13    /* x-= TWO23;  */
        fabs    fp1,fp1         /* if (x == 0.0)  */
                                /* x = 0.0; */
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
        blr
 .L4:
        bge-    cr6,.L9         /* if (x < 0.0)  */
@@ -55,7 +58,14 @@ EALIGN (__truncf, 4, 0)
        fnabs   fp1,fp1         /* if (x == 0.0)  */
                                /* x = -0.0; */
 .L9:
-       mtfsf   0x01,fp11       /* restore previous rounding mode.  */
+       mtfsf   0xff,fp11       /* Restore previous rounding mode and
+                                  "inexact" state.  */
+       blr
+.L10:
+       /* Ensure sNaN input is converted to qNaN.  */
+       fcmpu   cr7,fp1,fp1
+       beqlr   cr7
+       fadds   fp1,fp1,fp1
        blr
        END (__truncf)