]> git.ipfire.org Git - thirdparty/util-linux.git/commit
lscpu: RISC-V: Print ISA information in summary
authorSunil V L <sunilvl@ventanamicro.com>
Tue, 11 Mar 2025 16:06:46 +0000 (21:36 +0530)
committerKarel Zak <kzak@redhat.com>
Mon, 17 Mar 2025 09:57:52 +0000 (10:57 +0100)
commitde50fc4be3b6fbdda4f4f589e0a7aaf299678ce1
tree8eff589df63452c83c7cff3a813406ff15275e94
parent7dd72369680323a1c01dd7226e1158741cc8d55d
lscpu: RISC-V: Print ISA information in summary

The ISA information for RISC-V is important for understanding the
different extensions supported by the CPU. Print the ISA information in
the summary, with the Base ISA and single-letter extensions at the
beginning, followed by multi-letter extensions sorted in alphabetical
order. The information is the same as the cpuinfo information, except
that underscores are replaced by spaces and multi-letter extensions are
simply sorted instead of following any ISA string ordering rule.

The sample output below shows the difference between cpuinfo and lscpu.

cpuinfo output:
isa             : rv64imafdch_zicbom_zicboz_zicntr_zicsr_zifencei_zihintntl_zihintpause_zihpm_zawrs_zfa_zba_zbb_zbc_zbs_smaia_ssaia_sstc

lscpu output:
ISA:                rv64imafdch smaia ssaia sstc zawrs zba zbb zbc zbs zfa zicbom zicboz zicntr zicsr zifencei zihintntl zihintpause zihpm

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
sys-utils/Makemodule.am
sys-utils/lscpu-cputype.c
sys-utils/lscpu-riscv.c [new file with mode: 0644]
sys-utils/lscpu.c
sys-utils/lscpu.h
sys-utils/meson.build