This allows using PCIe NIC without enabling DPAA FMan.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Mingkai Hu <mingkai.hu@nxp.com>
Acked-by: Mingkai Hu <mingkai.hu@nxp.com>
obj-y += ddr.o
obj-y += ls1046ardb.o
ifndef CONFIG_SPL_BUILD
obj-y += ddr.o
obj-y += ls1046ardb.o
ifndef CONFIG_SPL_BUILD
-obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o
+obj-$(CONFIG_NET) += eth.o
#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */
#endif
#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */
#endif
+#define AQR105_IRQ_MASK 0x80000000
/* FMan */
#ifndef SPL_NO_FMAN
/* FMan */
#ifndef SPL_NO_FMAN
-#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_FMAN_ENET
-#define CONFIG_PHYLIB_10G
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#define CONFIG_PHY_REALTEK
#define CONFIG_PHY_REALTEK
-#define CONFIG_PHY_AQUANTIA
-#define AQR105_IRQ_MASK 0x80000000
+#ifdef CONFIG_SYS_DPAA_FMAN
+#define CONFIG_FMAN_ENET
+#define CONFIG_PHY_AQUANTIA
+#define CONFIG_PHYLIB_10G
#define RGMII_PHY1_ADDR 0x1
#define RGMII_PHY2_ADDR 0x2
#define RGMII_PHY1_ADDR 0x1
#define RGMII_PHY2_ADDR 0x2
#define CONFIG_ETHPRIME "FM1@DTSEC3"
#endif
#define CONFIG_ETHPRIME "FM1@DTSEC3"
#endif