- CONFIG_SYS_MALLOC_LEN:
Size of DRAM reserved for malloc() use.
+- CONFIG_SYS_MALLOC_F_LEN
+ Size of the malloc() pool for use before relocation. If
+ this is defined, then a very simple malloc() implementation
+ will become available before relocation. The address is just
+ below the global data, and the stack is moved down to make
+ space.
+
+ This feature allocates regions with increasing addresses
+ within the region. calloc() is supported, but realloc()
+ is not available. free() is supported but does nothing.
+ The memory will be freed (or in fact just forgotton) when
+ U-Boot relocates itself.
+
+ Pre-relocation malloc() is only supported on sandbox
+ at present but is fairly easy to enable for other archs.
+
- CONFIG_SYS_BOOTM_LEN:
Normally compressed uImages are limited to an
uncompressed size of 8 MBytes. If this is not enough,
/* DDR */
#define CONFIG_SYS_FSL_DDR_LE
#define CONFIG_VERY_BIG_RAM
+#ifdef CONFIG_SYS_FSL_DDR4
+#define CONFIG_SYS_FSL_DDRC_GEN4
+#else
#define CONFIG_SYS_FSL_DDRC_ARM_GEN3 /* Enable Freescale ARM DDR3 driver */
+#endif
#define CONFIG_SYS_FSL_DDR /* Freescale DDR driver */
#define CONFIG_SYS_LS2_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS2_DDR_BLOCK1_SIZE
* TODO: The kernel offers some more advanced versions of barriers, it might
* have some advantages to use them instead of the simple one here.
*/
+#define mb() asm volatile("dsb sy" : : : "memory")
#define dmb() __asm__ __volatile__ ("" : : : "memory")
#define __iormb() dmb()
#define __iowmb() dmb()
if (cooked_str != raw_str)
free((char *)cooked_str);
}
-static void jtag_putc(const char c)
+static void jtag_putc(struct stdio_dev *dev, const char c)
{
jtag_send(&c, 1);
}
-static void jtag_puts(const char *s)
+static void jtag_puts(struct stdio_dev *dev, const char *s)
{
jtag_send(s, strlen(s));
}
}
/* Higher layers want to know when any data is available */
-static int jtag_tstc(void)
+static int jtag_tstc(struct stdio_dev *dev)
{
return jtag_tstc_dbg() || leftovers_len;
}
* [32bit length][actual data]
*/
static uint32_t leftovers;
-static int jtag_getc(void)
+static int jtag_getc(struct stdio_dev *dev)
{
int ret;
uint32_t emudat;
leftovers = emudat;
}
- return jtag_getc();
+ return jtag_getc(dev);
}
int drv_jtag_console_init(void)
sprintf(env_val, "%d", baudrate);
setenv(env_var, env_val);
- if (port->start())
+ if (port->start(port))
return NULL;
set_bit(num, &initialized);
if (!port)
return -1;
- ret = port->stop();
+ ret = port->stop(port);
clear_bit(num, &initialized);
return ret;
if (!port || !buf)
return -1;
- port->puts(buf);
+ port->puts(port, buf);
return 0;
}
if (!size)
return 0;
- while (port->tstc()) {
- buf[cnt++] = port->getc();
+ while (port->tstc(port)) {
+ buf[cnt++] = port->getc(port);
if (cnt > size)
break;
}
#include <netdev.h>
#include <fsl_esdhc.h>
#if defined(CONFIG_BOOTCOUNT_LIMIT) && !defined(CONFIG_MPC831x)
-#include <asm/immap_qe.h>
+#include <linux/immap_qe.h>
#include <asm/io.h>
#endif
#if defined(CONFIG_BOOTCOUNT_LIMIT) && \
(defined(CONFIG_QE) && !defined(CONFIG_MPC831x))
-#include <asm/immap_qe.h>
+#include <linux/immap_qe.h>
void fdt_fixup_muram (void *blob)
{
#ifdef CONFIG_SYS_FSL_CPC
#if defined(CONFIG_RAMBOOT_PBL) || defined(CONFIG_SYS_CPC_REINIT_F)
-static void disable_cpc_sram(void)
+void disable_cpc_sram(void)
{
int i;
}
#endif
-static void enable_cpc(void)
+void enable_cpc(void)
{
int i;
u32 size = 0;
#else
#define enable_cpc()
#define invalidate_cpc()
+#define disable_cpc_sram()
#endif /* CONFIG_SYS_FSL_CPC */
/*
u32 idx = (cluster >> (j*8)) & TP_CLUSTER_INIT_MASK;
u32 type = in_be32(&gur->tp_ityp[idx]);
- if (type & TP_ITYP_AV)
+ if ((type & TP_ITYP_AV) &&
+ TP_ITYP_TYPE(type) == TP_ITYP_TYPE_PPC)
cluster_valid = 1;
}
/*
* Initialize L2 as cache.
- *
- * The newer 8548, etc, parts have twice as much cache, but
- * use the same bit-encoding as the older 8555, etc, parts.
- *
*/
-int cpu_init_r(void)
+int l2cache_init(void)
{
__maybe_unused u32 svr = get_svr();
-#ifdef CONFIG_SYS_LBC_LCRR
- fsl_lbc_t *lbc = (void __iomem *)LBC_BASE_ADDR;
-#endif
#ifdef CONFIG_L2_CACHE
ccsr_l2cache_t *l2cache = (void __iomem *)CONFIG_SYS_MPC85xx_L2_ADDR;
#elif defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
struct ccsr_cluster_l2 * l2cache = (void __iomem *)CONFIG_SYS_FSL_CLUSTER_1_L2;
#endif
-#if defined(CONFIG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)
- extern int spin_table_compat;
- const char *spin;
-#endif
-#ifdef CONFIG_SYS_FSL_ERRATUM_SEC_A003571
- ccsr_sec_t __iomem *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
-#endif
-#if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) || \
- defined(CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011)
- /*
- * CPU22 and NMG_CPU_A011 share the same workaround.
- * CPU22 applies to P4080 rev 1.0, 2.0, fixed in 3.0
- * NMG_CPU_A011 applies to P4080 rev 1.0, 2.0, fixed in 3.0
- * also applies to P3041 rev 1.0, 1.1, P2041 rev 1.0, 1.1, both
- * fixed in 2.0. NMG_CPU_A011 is activated by default and can
- * be disabled by hwconfig with syntax:
- *
- * fsl_cpu_a011:disable
- */
- extern int enable_cpu_a011_workaround;
-#ifdef CONFIG_SYS_P4080_ERRATUM_CPU22
- enable_cpu_a011_workaround = (SVR_MAJ(svr) < 3);
-#else
- char buffer[HWCONFIG_BUFFER_SIZE];
- char *buf = NULL;
- int n, res;
-
- n = getenv_f("hwconfig", buffer, sizeof(buffer));
- if (n > 0)
- buf = buffer;
-
- res = hwconfig_arg_cmp_f("fsl_cpu_a011", "disable", buf);
- if (res > 0)
- enable_cpu_a011_workaround = 0;
- else {
- if (n >= HWCONFIG_BUFFER_SIZE) {
- printf("fsl_cpu_a011 was not found. hwconfig variable "
- "may be too long\n");
- }
- enable_cpu_a011_workaround =
- (SVR_SOC_VER(svr) == SVR_P4080 && SVR_MAJ(svr) < 3) ||
- (SVR_SOC_VER(svr) != SVR_P4080 && SVR_MAJ(svr) < 2);
- }
-#endif
- if (enable_cpu_a011_workaround) {
- flush_dcache();
- mtspr(L1CSR2, (mfspr(L1CSR2) | L1CSR2_DCWS));
- sync();
- }
-#endif
-#ifdef CONFIG_SYS_FSL_ERRATUM_A005812
- /*
- * A-005812 workaround sets bit 32 of SPR 976 for SoCs running
- * in write shadow mode. Checking DCWS before setting SPR 976.
- */
- if (mfspr(L1CSR2) & L1CSR2_DCWS)
- mtspr(SPRN_HDBCR0, (mfspr(SPRN_HDBCR0) | 0x80000000));
-#endif
-
-#if defined(CONFIG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)
- spin = getenv("spin_table_compat");
- if (spin && (*spin == 'n'))
- spin_table_compat = 0;
- else
- spin_table_compat = 1;
-#endif
puts ("L2: ");
puts("disabled\n");
#endif
+ return 0;
+}
+
+/*
+ *
+ * The newer 8548, etc, parts have twice as much cache, but
+ * use the same bit-encoding as the older 8555, etc, parts.
+ *
+ */
+int cpu_init_r(void)
+{
+ __maybe_unused u32 svr = get_svr();
+#ifdef CONFIG_SYS_LBC_LCRR
+ fsl_lbc_t *lbc = (void __iomem *)LBC_BASE_ADDR;
+#endif
+#if defined(CONFIG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)
+ extern int spin_table_compat;
+ const char *spin;
+#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_SEC_A003571
+ ccsr_sec_t __iomem *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
+#endif
+#if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) || \
+ defined(CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011)
+ /*
+ * CPU22 and NMG_CPU_A011 share the same workaround.
+ * CPU22 applies to P4080 rev 1.0, 2.0, fixed in 3.0
+ * NMG_CPU_A011 applies to P4080 rev 1.0, 2.0, fixed in 3.0
+ * also applies to P3041 rev 1.0, 1.1, P2041 rev 1.0, 1.1, both
+ * fixed in 2.0. NMG_CPU_A011 is activated by default and can
+ * be disabled by hwconfig with syntax:
+ *
+ * fsl_cpu_a011:disable
+ */
+ extern int enable_cpu_a011_workaround;
+#ifdef CONFIG_SYS_P4080_ERRATUM_CPU22
+ enable_cpu_a011_workaround = (SVR_MAJ(svr) < 3);
+#else
+ char buffer[HWCONFIG_BUFFER_SIZE];
+ char *buf = NULL;
+ int n, res;
+
+ n = getenv_f("hwconfig", buffer, sizeof(buffer));
+ if (n > 0)
+ buf = buffer;
+
+ res = hwconfig_arg_cmp_f("fsl_cpu_a011", "disable", buf);
+ if (res > 0) {
+ enable_cpu_a011_workaround = 0;
+ } else {
+ if (n >= HWCONFIG_BUFFER_SIZE) {
+ printf("fsl_cpu_a011 was not found. hwconfig variable "
+ "may be too long\n");
+ }
+ enable_cpu_a011_workaround =
+ (SVR_SOC_VER(svr) == SVR_P4080 && SVR_MAJ(svr) < 3) ||
+ (SVR_SOC_VER(svr) != SVR_P4080 && SVR_MAJ(svr) < 2);
+ }
+#endif
+ if (enable_cpu_a011_workaround) {
+ flush_dcache();
+ mtspr(L1CSR2, (mfspr(L1CSR2) | L1CSR2_DCWS));
+ sync();
+ }
+#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A005812
+ /*
+ * A-005812 workaround sets bit 32 of SPR 976 for SoCs running
+ * in write shadow mode. Checking DCWS before setting SPR 976.
+ */
+ if (mfspr(L1CSR2) & L1CSR2_DCWS)
+ mtspr(SPRN_HDBCR0, (mfspr(SPRN_HDBCR0) | 0x80000000));
+#endif
+
+#if defined(CONFIG_PPC_SPINTABLE_COMPATIBLE) && defined(CONFIG_MP)
+ spin = getenv("spin_table_compat");
+ if (spin && (*spin == 'n'))
+ spin_table_compat = 0;
+ else
+ spin_table_compat = 1;
+#endif
+
+ l2cache_init();
#if defined(CONFIG_RAMBOOT_PBL)
disable_cpc_sram();
#endif
#define fdt_fixup_usb(x)
#endif
+#if defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T4240) || \
+ defined(CONFIG_PPC_T4160) || defined(CONFIG_PPC_T4080)
+void fdt_fixup_dma3(void *blob)
+{
+ /* the 3rd DMA is not functional if SRIO2 is chosen */
+ int nodeoff;
+ ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+#define CONFIG_SYS_ELO3_DMA3 (0xffe000000 + 0x102300)
+#if defined(CONFIG_PPC_T2080)
+ u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
+ FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
+ srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
+
+ switch (srds_prtcl_s2) {
+ case 0x29:
+ case 0x2d:
+ case 0x2e:
+#elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \
+ defined(CONFIG_PPC_T4080)
+ u32 srds_prtcl_s4 = in_be32(&gur->rcwsr[4]) &
+ FSL_CORENET2_RCWSR4_SRDS4_PRTCL;
+ srds_prtcl_s4 >>= FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT;
+
+ switch (srds_prtcl_s4) {
+ case 6:
+ case 8:
+ case 14:
+ case 16:
+#endif
+ nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,elo3-dma",
+ CONFIG_SYS_ELO3_DMA3);
+ if (nodeoff > 0)
+ fdt_status_disabled(blob, nodeoff);
+ else
+ printf("WARNING: unable to disable dma3\n");
+ break;
+ default:
+ break;
+ }
+}
+#else
+#define fdt_fixup_dma3(x)
+#endif
+
#if defined(CONFIG_PPC_T1040)
static void fdt_fixup_l2_switch(void *blob)
{
fdt_fixup_usb(blob);
fdt_fixup_l2_switch(blob);
+
+ fdt_fixup_dma3(blob);
}
/*
}
}
-void video_putc (const char c)
+void video_putc(struct stdio_dev *dev, const char c)
{
if (!video_enable) {
serial_putc (c);
}
}
-void video_puts (const char *s)
+void video_puts(struct stdio_dev *dev, const char *s)
{
int count = strlen (s);
serial_putc (*s++);
else
while (count--)
- video_putc (*s++);
+ video_putc(dev, *s++);
}
/************************************************************************/
CPU_TYPE_ENTRY(T4080, T4080, 4),
CPU_TYPE_ENTRY(B4860, B4860, 0),
CPU_TYPE_ENTRY(G4860, G4860, 0),
- CPU_TYPE_ENTRY(G4060, G4060, 0),
CPU_TYPE_ENTRY(B4440, B4440, 0),
CPU_TYPE_ENTRY(B4460, B4460, 0),
CPU_TYPE_ENTRY(G4440, G4440, 0),
#endif /* CONFIG_SYS_INIT_RAM_LOCK */
#endif /* __ASSEMBLY__ */
+#if defined(__KERNEL__) && !defined(__ASSEMBLY__)
+int l2cache_init(void);
+void enable_cpc(void);
+void disable_cpc_sram(void);
+#endif
+
/* prep registers for L2 */
#define CACHECRBA 0x80000823 /* Cache configuration register address */
#define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */
#endif
#define CONFIG_SYS_FSL_CORENET_SERDES_OFFSET 0xEA000
#define CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET 0xEB000
+#define CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET 0xEC000
+#define CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET 0xED000
#define CONFIG_SYS_FSL_CPC_OFFSET 0x10000
#define CONFIG_SYS_FSL_SCFG_OFFSET 0xFC000
#define CONFIG_SYS_MPC85xx_DMA1_OFFSET 0x100000
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES_OFFSET)
#define CONFIG_SYS_FSL_CORENET_SERDES2_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES2_OFFSET)
+#define CONFIG_SYS_FSL_CORENET_SERDES3_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES3_OFFSET)
+#define CONFIG_SYS_FSL_CORENET_SERDES4_ADDR \
+ (CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_SERDES4_OFFSET)
#define CONFIG_SYS_MPC85xx_USB1_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_USB1_OFFSET)
#define CONFIG_SYS_MPC85xx_USB2_ADDR \
#define iobarrier_r() eieio()
#define iobarrier_w() eieio()
+#define mb() sync()
+#define isb() isync()
+
/*
* Non ordered and non-swapping "raw" accessors
*/
#define SVR_B4860 0X868000
#define SVR_G4860 0x868001
#define SVR_B4460 0x868003
-#define SVR_G4060 0x868003
#define SVR_B4440 0x868100
#define SVR_G4440 0x868101
#define SVR_B4420 0x868102
#ifdef CONFIG_DEEP_SLEEP
/* Jump to kernel in deep sleep case */
if (in_be32(&gur->scrtsr[0]) & (1 << 3)) {
+ l2cache_init();
+#if defined(CONFIG_RAMBOOT_PBL)
+ disable_cpc_sram();
+#endif
+ enable_cpc();
start_addr = in_be32(&scfg->sparecr[1]);
kernel_resume = (func_t)start_addr;
kernel_resume();
*/
#include <common.h>
+#include <dm/root.h>
#include <os.h>
#include <asm/state.h>
if (state_uninit())
os_exit(2);
+ if (dm_uninit())
+ os_exit(2);
+
/* This is considered normal termination for now */
os_exit(0);
}
#include <common.h>
#include <os.h>
#include <asm/getopt.h>
+#include <asm/io.h>
#include <asm/sections.h>
#include <asm/state.h>
int main(int argc, char *argv[])
{
struct sandbox_state *state;
+ gd_t data;
int ret;
ret = state_init();
if (state->ram_buf_rm && state->ram_buf_fname)
os_unlink(state->ram_buf_fname);
+ memset(&data, '\0', sizeof(data));
+ gd = &data;
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+ gd->malloc_base = CONFIG_MALLOC_F_ADDR;
+#endif
+
/* Do pre- and post-relocation init */
board_init_f(0);
#ifndef _ASM_CONFIG_H_
#define _ASM_CONFIG_H_
-#define CONFIG_SYS_GENERIC_GLOBAL_DATA
#define CONFIG_SANDBOX_ARCH
/* Used by drivers/spi/sandbox_spi.c and arch/sandbox/include/asm/state.h */
+++ /dev/null
-/*
- * Copyright (C) 2008 Nobuhiro Iwamatsu
- * Copyright (C) 2008 Renesas Solutions Corp.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- * entry and reloct_dst will be provided via ldflags
- */
- . = .;
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- KEEP(arch/sh/cpu/sh2/start.o (.text))
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
-
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
- PROVIDE (reloc_dst_end = .);
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (__bss_end = .);
-}
+++ /dev/null
-/*
- * Copyright (C) 2007
- * Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- *
- * Copyright (C) 2008-2009
- * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
-OUTPUT_ARCH(sh)
-ENTRY(_start)
-
-SECTIONS
-{
- /*
- * entry and reloct_dst will be provided via ldflags
- */
- . = .;
-
- PROVIDE (_ftext = .);
- PROVIDE (_fcode = .);
- PROVIDE (_start = .);
-
- .text :
- {
- KEEP(arch/sh/cpu/sh4/start.o (.text))
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenv)
- . = ALIGN(8192);
- common/env_embedded.o (.ppcenvr)
- . = ALIGN(8192);
- *(.text)
- . = ALIGN(4);
- } =0xFF
- PROVIDE (_ecode = .);
- .rodata :
- {
- *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
- . = ALIGN(4);
- }
- PROVIDE (_etext = .);
-
-
- PROVIDE (_fdata = .);
- .data :
- {
- *(.data)
- . = ALIGN(4);
- }
- PROVIDE (_edata = .);
-
- PROVIDE (_fgot = .);
- .got :
- {
- *(.got)
- . = ALIGN(4);
- }
- PROVIDE (_egot = .);
-
-
- .u_boot_list : {
- KEEP(*(SORT(.u_boot_list*)));
- }
-
- PROVIDE (reloc_dst_end = .);
- /* _reloc_dst_end = .; */
-
- PROVIDE (bss_start = .);
- PROVIDE (__bss_start = .);
- .bss (NOLOAD) :
- {
- *(.bss)
- . = ALIGN(4);
- }
- PROVIDE (bss_end = .);
-
- PROVIDE (__bss_end = .);
-}
/*
- * Copyright (C) 2007
- * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
- *
* Copyright (C) 2007
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
+ * Copyright (C) 2008-2009
+ * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
+ *
* Copyright (C) 2008
* Mark Jonas <mark.jonas@de.bosch.com>
*
.text :
{
- KEEP(arch/sh/cpu/sh3/start.o (.text))
+ KEEP(*/start.o (.text))
. = ALIGN(8192);
common/env_embedded.o (.ppcenv)
. = ALIGN(8192);
}
}
-static void video_putc(const char c)
+static void video_putc(struct stdio_dev *dev, const char c)
{
int x, y, pos;
outb_p(0xff & (pos >> 1), vidport+1);
}
-static void video_puts(const char *s)
+static void video_puts(struct stdio_dev *dev, const char *s)
{
int x, y, pos;
char c;
vga_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM;
vga_dev.putc = video_putc; /* 'putc' function */
vga_dev.puts = video_puts; /* 'puts' function */
- vga_dev.tstc = NULL; /* 'tstc' function */
- vga_dev.getc = NULL; /* 'getc' function */
if (stdio_register(&vga_dev) == 0)
return 1;
strcpy(kbd_dev.name, "kbd");
kbd_dev.ext = 0;
kbd_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
- kbd_dev.putc = NULL; /* 'putc' function */
- kbd_dev.puts = NULL; /* 'puts' function */
kbd_dev.tstc = i8042_tstc; /* 'tstc' function */
kbd_dev.getc = i8042_getc; /* 'getc' function */
#endif
}
-void video_putc(const char c)
-{
-}
-
-void video_puts(const char *s)
-{
-}
-
int drv_video_init(void)
{
int error, devices = 1;
strcpy(videodev.name, "video");
videodev.ext = DEV_EXT_VIDEO; /* Video extensions */
videodev.flags = DEV_FLAGS_SYSTEM; /* No Output */
- videodev.putc = video_putc; /* 'putc' function */
- videodev.puts = video_puts; /* 'puts' function */
error = stdio_register(&videodev);
}
-void video_putc(const char c)
-{
-}
-
-void video_puts(const char *s)
-{
-}
-
int drv_video_init(void)
{
int error, devices = 1;
strcpy(videodev.name, "video");
videodev.ext = DEV_EXT_VIDEO; /* Video extensions */
videodev.flags = DEV_FLAGS_SYSTEM; /* No Output */
- videodev.putc = video_putc; /* 'putc' function */
- videodev.puts = video_puts; /* 'puts' function */
error = stdio_register(&videodev);
}
-void video_putc(const char c)
-{
-}
-
-void video_puts(const char *s)
-{
-}
-
int drv_video_init(void)
{
int error, devices = 1;
strcpy(videodev.name, "video");
videodev.ext = DEV_EXT_VIDEO; /* Video extensions */
videodev.flags = DEV_FLAGS_SYSTEM; /* No Output */
- videodev.putc = video_putc; /* 'putc' function */
- videodev.puts = video_puts; /* 'puts' function */
error = stdio_register(&videodev);
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap bootflash region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for FLASH */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for FLASH */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
int ret;
/*
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
{
#ifndef CONFIG_SYS_NO_FLASH
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int board_early_init_r(void)
{
const unsigned long flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 1; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 1; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+++ /dev/null
-#
-# Copyright 2010-2011 Freescale Semiconductor, Inc.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y += p1023rds.o
-obj-y += law.o
-obj-y += tlb.o
+++ /dev/null
-Overview
---------
-The P1023 process includes a performance optimized implementation of the
-QorIQ data Path Acceleration Architecture (DPAA). This architecture
-provides the infrastructure to support simplified sharing of networking
-interfaces and accelerators by multiple CPU cores. P1023 is an e500 based
-dual core SOC.
-
-P1023RDS board is a Low End Dual core platform supporting the P1023
-processor of QorIQ series.
-
-Building U-boot
----------------
-To build the u-boot for P1023RDS:
-Configure to NOR boot:
- make P1023RDS_config
-Configure to NAND boot:
- make P1023RDS_NAND_config
-Build:
- make
-
-Board Switches
---------------
-Most switches on the board should not be changed. The most frequent
-user-settable switches on the board are used to configure
-the flash banks.
-
-J4: all open
-
-Default NOR flash boot switch setting:
- Sw3[1:8]: off on on off on on off off
- Sw4[1:8]: off off off on off off off off
- Sw6[1:8]: off on off on off on on off
- Sw7[1:8]: off on off off on off off off
- Sw8[1:8]: on off off off off off off off
-
-For NAND flash boot,set
-Sw4[1:4]: off on on on
-
-The default native ethernet setting is for RGMII mode.
-To use SGMII mode, set
-SW8[1:2]: OFF OFF
-SW7[6:7]: ON ON
-
-Memory Map
-----------
-0x0000_0000 0x7fff_ffff DDR 2G Cacheable
-0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable
-0xc000_0000 0xdfff_ffff PCI 512M non-cacheable
-0xe100_0000 0xe3ff_ffff PCI IO range 4M non-cacheable
-
-0xe000_0000 0xe003_ffff BCSR 256K BCSR
-0xee00_0000 0xefff_ffff NOR flash 32M NOR flash
-0xff00_0000 0xff3f_ffff DPAA_QBMAN 4M
-0xff60_0000 0xff7f_ffff CCSR 2M non-cacheable
-0xffa0_0000 0xffaf_ffff NAND FLASH 1M non-cacheable
-0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0
-
-Flashing u-boot Images
----------------
-To program the image in the boot flash bank:
-NOR flash boot:
- => tftp 1000000 u-boot.bin
- => protect off all
- => erase eff40000 efffffff
- => cp.b 1000000 eff40000 c0000
-
-NAND flash boot:
- => tftp 1000000 u-boot-nand.bin
- => nand erase 0 80000
- => nand write 1000000 0 80000
-
-Firmware ucode location
----------------------------------
-Microcode(ucode) to FMAN's IRAM is needed to make FMAN Ethernet work.
-u-boot loads ucode FLASH. The location for ucode:
-NOR Flash: 0xfe000000
-NAND Flash: 0x1f00000
-
-Using the Device Tree Source File
----------------------------------
-To create the DTB (Device Tree Binary) image file,
-use a command similar to this:
-
- dtc -b 0 -f -I dts -O dtb p1023rds.dts > p1023rds.dtb
-
-Likely, that .dts file will come from here;
-
- linux-2.6/arch/powerpc/boot/dts/p1023rds.dts
-or
- make p1023rds.dtb ARCH=powerpc
-in linux-2.6 directory.
-
-Booting Linux
--------------
-Place a linux uImage in the TFTP disk area.
-
- tftp 1000000 uImage
- tftp 2000000 rootfs.ext2.gz.uboot
- tftp c00000 p1023rds.dtb
- bootm 1000000 2000000 c00000
+++ /dev/null
-/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc.
- *
- * Authors: Chunhe Lan <b25806@freescale.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __BCSR_H_
-#define __BCSR_H_
-
-#include <common.h>
-
-/*
- * BCSR Bit definitions
- * BCSR 15 *
- 0 device insertion oriention
- 1 stack processor present
- 2 power supply shut down/normal operation
- 3 I2C bus0 drive enable
- 4 reserved
- 5:7 I2C bus0 select
- 5 - I2C_BUS_0_SS0
- 6 - I2C_BUS_0_SS1
- 7 - I2C_BUS_0_SS2
-*/
-
-/* BCSR register base address is 0xFX000020 */
-#define BCSR_BASE_REG_OFFSET 0x20
-#define BCSR_ACCESS_REG_ADDR (CONFIG_SYS_BCSR_BASE + BCSR_BASE_REG_OFFSET)
-
-#define BCSR15_DEV_INS_ORI 0x80
-#define BCSR15_STACK_PRO_PRE 0x40
-#define BCSR15_POWER_SUPPLY 0x20
-#define BCSR15_I2C_BUS0_EN 0x10
-#define BCSR15_I2C_BUS0_SEG0 0x00
-#define BCSR15_I2C_BUS0_SEG1 0x04
-#define BCSR15_I2C_BUS0_SEG2 0x02
-#define BCSR15_I2C_BUS0_SEG3 0x06
-#define BCSR15_I2C_BUS0_SEG4 0x01
-#define BCSR15_I2C_BUS0_SEG5 0x05
-#define BCSR15_I2C_BUS0_SEG6 0x03
-#define BCSR15_I2C_BUS0_SEG7 0x07
-#define BCSR15_I2C_BUS0_SEG_CLR 0x07
-#define BCSR19_SGMII_SEL_L 0x01
-
-/*BCSR Utils functions*/
-void fixup_i2c_bus0_sel_seg0(void);
-#endif /* __BCSR_H_ */
+++ /dev/null
-/*
- * Copyright 2010-2011 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/fsl_law.h>
-#include <asm/mmu.h>
-
-struct law_entry law_table[] = {
- SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
- SET_LAW(CONFIG_SYS_QMAN_MEM_PHYS, LAW_SIZE_4M,
- LAW_TRGT_IF_DPAA_SWP_SRAM),
- /* The LAW 0xe0000000 ~ 0xefffffff for BCSR and NOR flash */
- SET_LAW(CONFIG_SYS_BCSR_BASE_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
-};
-
-int num_law_entries = ARRAY_SIZE(law_table);
+++ /dev/null
-/*
- * Copyright 2010-2012 Freescale Semiconductor, Inc.
- *
- * Authors: Roy Zang <tie-fei.zang@freescale.com>
- * Chunhe Lan <b25806@freescale.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <command.h>
-#include <pci.h>
-#include <asm/io.h>
-#include <asm/cache.h>
-#include <asm/processor.h>
-#include <asm/mmu.h>
-#include <asm/immap_85xx.h>
-#include <asm/fsl_pci.h>
-#include <fsl_ddr_sdram.h>
-#include <asm/fsl_portals.h>
-#include <libfdt.h>
-#include <fdt_support.h>
-#include <netdev.h>
-#include <malloc.h>
-#include <fm_eth.h>
-#include <fsl_mdio.h>
-#include <miiphy.h>
-#include <phy.h>
-#include <asm/fsl_dtsec.h>
-
-#include "bcsr.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int board_early_init_f(void)
-{
- fsl_lbc_t *lbc = LBC_BASE_ADDR;
-
- /* Set ABSWP to implement conversion of addresses in the LBC */
- setbits_be32(&lbc->lbcr, CONFIG_SYS_LBC_LBCR);
-
- return 0;
-}
-
-int checkboard(void)
-{
- u8 *bcsr = (u8 *)BCSR_ACCESS_REG_ADDR;
-
- printf("Board: P1023 RDS\n");
-
- clrbits_8(&bcsr[15], BCSR15_I2C_BUS0_SEG_CLR);
- setbits_8(&bcsr[15], BCSR15_I2C_BUS0_SEG0);
-
- return 0;
-}
-
-/* Fixed sdram init -- doesn't use serial presence detect. */
-phys_size_t fixed_sdram(void)
-{
-#ifndef CONFIG_SYS_RAMBOOT
- struct ccsr_ddr __iomem *ddr =
- (struct ccsr_ddr __iomem *)CONFIG_SYS_FSL_DDR_ADDR;
-
- set_next_law(0, LAW_SIZE_2G, LAW_TRGT_IF_DDR_1);
-
- out_be32(&ddr->cs0_bnds, CONFIG_SYS_DDR_CS0_BNDS);
- out_be32(&ddr->cs0_config, CONFIG_SYS_DDR_CS0_CONFIG);
- out_be32(&ddr->cs1_bnds, CONFIG_SYS_DDR_CS1_BNDS);
- out_be32(&ddr->cs1_config, CONFIG_SYS_DDR_CS1_CONFIG);
- out_be32(&ddr->timing_cfg_3, CONFIG_SYS_DDR_TIMING_3);
- out_be32(&ddr->timing_cfg_0, CONFIG_SYS_DDR_TIMING_0);
- out_be32(&ddr->timing_cfg_1, CONFIG_SYS_DDR_TIMING_1);
- out_be32(&ddr->timing_cfg_2, CONFIG_SYS_DDR_TIMING_2);
- out_be32(&ddr->sdram_cfg_2, CONFIG_SYS_DDR_CONTROL2);
- out_be32(&ddr->sdram_mode, CONFIG_SYS_DDR_MODE_1);
- out_be32(&ddr->sdram_mode_2, CONFIG_SYS_DDR_MODE_2);
- out_be32(&ddr->sdram_interval, CONFIG_SYS_DDR_INTERVAL);
- out_be32(&ddr->sdram_data_init, CONFIG_SYS_DDR_DATA_INIT);
- out_be32(&ddr->sdram_clk_cntl, CONFIG_SYS_DDR_CLK_CTRL);
- out_be32(&ddr->timing_cfg_4, CONFIG_SYS_DDR_TIMING_4);
- out_be32(&ddr->timing_cfg_5, CONFIG_SYS_DDR_TIMING_5);
- out_be32(&ddr->ddr_zq_cntl, CONFIG_SYS_DDR_ZQ_CNTL);
- out_be32(&ddr->ddr_wrlvl_cntl, CONFIG_SYS_DDR_WRLVL_CNTL);
- out_be32(&ddr->ddr_cdr1, CONFIG_SYS_DDR_CDR_1);
- out_be32(&ddr->ddr_cdr2, CONFIG_SYS_DDR_CDR_2);
- out_be32(&ddr->sdram_cfg, CONFIG_SYS_DDR_CONTROL);
-#endif
- return CONFIG_SYS_SDRAM_SIZE * 1024 * 1024ul;
-}
-
-#ifdef CONFIG_PCI
-void pci_init_board(void)
-{
- fsl_pcie_init_board(0);
-}
-#endif
-
-int board_early_init_r(void)
-{
- const unsigned int flashbase = CONFIG_SYS_BCSR_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
-
- /*
- * Remap Boot flash + BCSR region to caching-inhibited
- * so that flash can be erased properly.
- */
-
- /* Flush d-cache and invalidate i-cache of any FLASH data */
- flush_dcache();
- invalidate_icache();
-
- /* invalidate existing TLB entry for flash + bcsr */
- disable_tlb(flash_esel);
-
- set_tlb(1, flashbase, CONFIG_SYS_BCSR_BASE_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, flash_esel, BOOKE_PAGESZ_256M, 1);
-
- setup_portals();
-
- return 0;
-}
-
-unsigned long get_board_sys_clk(ulong dummy)
-{
- return gd->bus_clk;
-}
-
-unsigned long get_board_ddr_clk(ulong dummy)
-{
- return gd->mem_clk;
-}
-
-int board_eth_init(bd_t *bis)
-{
- u8 *bcsr = (u8 *)BCSR_ACCESS_REG_ADDR;
- ccsr_gur_t *gur = (ccsr_gur_t *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
- struct fsl_pq_mdio_info dtsec_mdio_info;
-
- /*
- * Need to set dTSEC 1 pin multiplexing to TSEC. The default setting
- * is not correct.
- */
- setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_TSEC1_1);
-
- dtsec_mdio_info.regs =
- (struct tsec_mii_mng *)CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR;
- dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
-
- /* Register the 1G MDIO bus */
- fsl_pq_mdio_init(bis, &dtsec_mdio_info);
-
- fm_info_set_phy_address(FM1_DTSEC1, CONFIG_SYS_FM1_DTSEC1_PHY_ADDR);
- fm_info_set_phy_address(FM1_DTSEC2, CONFIG_SYS_FM1_DTSEC2_PHY_ADDR);
-
- fm_info_set_mdio(FM1_DTSEC1,
- miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
- fm_info_set_mdio(FM1_DTSEC2,
- miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
-
- /* Make SERDES connected to SGMII by cleaing bcsr19[7] */
- if (fm_info_get_enet_if(FM1_DTSEC1) == PHY_INTERFACE_MODE_SGMII)
- clrbits_8(&bcsr[19], BCSR19_SGMII_SEL_L);
-
-#ifdef CONFIG_FMAN_ENET
- cpu_eth_init(bis);
-#endif
-
- return pci_eth_init(bis);
-}
-
-#if defined(CONFIG_OF_BOARD_SETUP)
-void ft_board_setup(void *blob, bd_t *bd)
-{
- phys_addr_t base;
- phys_size_t size;
-
- ft_cpu_setup(blob, bd);
-
- base = getenv_bootm_low();
- size = getenv_bootm_size();
-
- fdt_fixup_memory(blob, (u64)base, (u64)size);
-
-#ifdef CONFIG_HAS_FSL_DR_USB
- fdt_fixup_dr_usb(blob, bd);
-#endif
-
- fdt_fixup_fman_ethernet(blob);
-}
-#endif
+++ /dev/null
-/*
- * Copyright 2010-2011 Freescale Semiconductor, Inc.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/mmu.h>
-
-struct fsl_e_tlb_entry tlb_table[] = {
- /* TLB 0 - for temp stack in cache */
- SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR, CONFIG_SYS_INIT_RAM_ADDR,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
- 0, 0, BOOKE_PAGESZ_4K, 0),
- SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
- CONFIG_SYS_INIT_RAM_ADDR + 4 * 1024,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
- 0, 0, BOOKE_PAGESZ_4K, 0),
- SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
- CONFIG_SYS_INIT_RAM_ADDR + 8 * 1024,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
- 0, 0, BOOKE_PAGESZ_4K, 0),
- SET_TLB_ENTRY(0, CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
- CONFIG_SYS_INIT_RAM_ADDR + 12 * 1024,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
- 0, 0, BOOKE_PAGESZ_4K, 0),
-
- /* TLB 1 */
- /* *I*** - Covers boot page */
- SET_TLB_ENTRY(1, 0xfffff000, 0xfffff000,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I,
- 0, 0, BOOKE_PAGESZ_4K, 1),
-
- /* *I*G* - CCSRBAR */
- SET_TLB_ENTRY(1, CONFIG_SYS_CCSRBAR, CONFIG_SYS_CCSRBAR_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 1, BOOKE_PAGESZ_4M, 1),
-
- /* *W*G* - BCSR and NOR flash on local bus*/
- /* This will be changed to *I*G* after relocation to RAM. */
- SET_TLB_ENTRY(1, CONFIG_SYS_BCSR_BASE, CONFIG_SYS_BCSR_BASE_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_W|MAS2_G,
- 0, 2, BOOKE_PAGESZ_256M, 1),
-
- /* *I*G* - PCI */
- SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT, CONFIG_SYS_PCIE3_MEM_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 3, BOOKE_PAGESZ_1G, 1),
-
- /* *I*G* - PCI */
- SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT + 0x40000000,
- CONFIG_SYS_PCIE3_MEM_PHYS + 0x40000000,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 4, BOOKE_PAGESZ_256M, 1),
-
- SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_MEM_VIRT + 0x50000000,
- CONFIG_SYS_PCIE3_MEM_PHYS + 0x50000000,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 5, BOOKE_PAGESZ_256M, 1),
-
- /* *I*G* - PCI I/O */
- SET_TLB_ENTRY(1, CONFIG_SYS_PCIE3_IO_VIRT, CONFIG_SYS_PCIE3_IO_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 6, BOOKE_PAGESZ_256K, 1),
-
- /* Bman/Qman */
- SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE, CONFIG_SYS_BMAN_MEM_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
- 0, 7, BOOKE_PAGESZ_1M, 1),
- SET_TLB_ENTRY(1, CONFIG_SYS_BMAN_MEM_BASE + 0x00100000,
- CONFIG_SYS_BMAN_MEM_PHYS + 0x00100000,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 8, BOOKE_PAGESZ_1M, 1),
- SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE, CONFIG_SYS_QMAN_MEM_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_M,
- 0, 9, BOOKE_PAGESZ_1M, 1),
- SET_TLB_ENTRY(1, CONFIG_SYS_QMAN_MEM_BASE + 0x00100000,
- CONFIG_SYS_QMAN_MEM_PHYS + 0x00100000,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 10, BOOKE_PAGESZ_1M, 1),
-
- /* *I*G - NAND */
- SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
- MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 11, BOOKE_PAGESZ_1M, 1),
-
-#ifdef CONFIG_SYS_RAMBOOT
- SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE,
- CONFIG_SYS_DDR_SDRAM_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
- 0, 12, BOOKE_PAGESZ_1G, 1),
-
- SET_TLB_ENTRY(1, CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
- CONFIG_SYS_DDR_SDRAM_BASE + 0x40000000,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
- 0, 13, BOOKE_PAGESZ_1G, 1),
-#endif
-};
-
-int num_tlb_entries = ARRAY_SIZE(tlb_table);
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
unsigned int orig_bus = i2c_get_bus_num();
u8 i2c_data;
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,/* perms, wimge */
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, /* perms, wimge */
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
{
u8 brdcfg9;
brdcfg9 = QIXIS_READ(brdcfg[9]);
- brdcfg9 |= (1 << 5);
+/* Initializing EPHY2 clock to RGMII mode */
+ brdcfg9 &= ~(BRDCFG9_EPHY2_MASK);
+ brdcfg9 |= (BRDCFG9_EPHY2_VAL);
QIXIS_WRITE(brdcfg[9], brdcfg9);
}
{
#ifdef CONFIG_SYS_FLASH_BASE
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
#define BRDCFG5_IMX_MASK 0xC0
#define BRDCFG5_IMX_DIU 0x80
+/* BRDCFG9[2] controls EPHY2 Clock */
+#define BRDCFG9_EPHY2_MASK 0x20
+#define BRDCFG9_EPHY2_VAL 0x00
+
/* BRDCFG15[3] controls LCD Panel Powerdown*/
#define BRDCFG15_LCDPD_MASK 0x10
#define BRDCFG15_LCDPD_ENABLED 0x00
{
#ifdef CONFIG_SYS_FLASH_BASE
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
* so that flash can be erased properly.
/* Flush d-cache and invalidate i-cache of any FLASH data */
flush_dcache();
invalidate_icache();
-
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
int misc_init_r(void)
{
u8 sw;
- serdes_corenet_t *srds_regs =
- (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
+ void *srds_base = (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
+ serdes_corenet_t *srds_regs;
u32 actual[MAX_SERDES];
+ u32 pllcr0, expected;
unsigned int i;
sw = QIXIS_READ(brdcfg[2]);
}
for (i = 0; i < MAX_SERDES; i++) {
- u32 pllcr0 = srds_regs->bank[i].pllcr0;
- u32 expected = pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK;
+ srds_regs = srds_base + i * 0x1000;
+ pllcr0 = srds_regs->bank[0].pllcr0;
+ expected = pllcr0 & SRDS_PLLCR0_RFCK_SEL_MASK;
if (expected != actual[i]) {
printf("Warning: SERDES%u expects reference clock %sMHz, but actual is %sMHz\n",
i + 1, serdes_clock_to_string(expected),
int board_early_init_r(void)
{
const unsigned int flashbase = CONFIG_SYS_FLASH_BASE;
- const u8 flash_esel = find_tlb_idx((void *)flashbase, 1);
+ int flash_esel = find_tlb_idx((void *)flashbase, 1);
/*
* Remap Boot flash + PROMJET region to caching-inhibited
flush_dcache();
invalidate_icache();
- /* invalidate existing TLB entry for flash + promjet */
- disable_tlb(flash_esel);
+ if (flash_esel == -1) {
+ /* very unlikely unless something is messed up */
+ puts("Error: Could not find TLB for FLASH BASE\n");
+ flash_esel = 2; /* give our best effort to continue */
+ } else {
+ /* invalidate existing TLB entry for flash + promjet */
+ disable_tlb(flash_esel);
+ }
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
memset (&kbddev, 0, sizeof(kbddev));
strcpy(kbddev.name, DEVNAME);
kbddev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
- kbddev.putc = NULL ;
- kbddev.puts = NULL ;
kbddev.getc = kbd_getc ;
kbddev.tstc = kbd_testc ;
}
/* test if a character is in the queue */
-int kbd_testc(void)
+int kbd_testc(struct stdio_dev *dev)
{
if(in_pointer==out_pointer)
return(0); /* no data */
return(1);
}
/* gets the character from the queue */
-int kbd_getc(void)
+int kbd_getc(struct stdio_dev *dev)
{
char c;
while(in_pointer==out_pointer);
#ifndef _KBD_H_
#define _KBD_H_
-extern int kbd_testc(void);
-extern int kbd_getc(void);
+struct stdio_dev;
+
+int kbd_testc(struct stdio_dev *sdev);
+int kbd_getc(struct stdio_dev *sdev);
extern void kbd_interrupt(void);
extern char *kbd_initialize(void);
PCICON_SET_REG(PCICON_DBELL_REG,PCIMSG_CON_DATA);
}
-void pci_con_putc(const char c)
+void pci_con_putc(struct stdio_dev *dev, const char c)
{
pci_con_put_it(c);
if(c == '\n')
}
-int pci_con_getc(void)
+int pci_con_getc(struct stdio_dev *dev)
{
int res;
int diff;
return res;
}
-int pci_con_tstc(void)
+int pci_con_tstc(struct stdio_dev *dev)
{
if(r_ptr==(volatile int)w_ptr)
return 0;
return 1;
}
-void pci_con_puts (const char *s)
+void pci_con_puts(struct stdio_dev *dev, const char *s)
{
while (*s) {
pci_con_putc(*s);
* Routine: rx51_kp_tstc
* Description: Test if key was pressed (from buffer).
*/
-int rx51_kp_tstc(void)
+int rx51_kp_tstc(struct stdio_dev *sdev)
{
u8 c, r, dk, i;
u8 intr;
* Routine: rx51_kp_getc
* Description: Get last pressed key (from buffer).
*/
-int rx51_kp_getc(void)
+int rx51_kp_getc(struct stdio_dev *sdev)
{
keybuf_head %= KEYBUF_SIZE;
- while (!rx51_kp_tstc())
+ while (!rx51_kp_tstc(sdev))
WATCHDOG_RESET();
return keybuf[keybuf_head++];
}
Active powerpc mpc85xx - freescale p1022ds P1022DS_SDCARD P1022DS:SDCARD Timur Tabi <timur@freescale.com>
Active powerpc mpc85xx - freescale p1022ds P1022DS_SPIFLASH P1022DS:SPIFLASH Timur Tabi <timur@freescale.com>
Active powerpc mpc85xx - freescale p1023rdb P1023RDB - -
-Active powerpc mpc85xx - freescale p1023rds P1023RDS - Roy Zang <tie-fei.zang@freescale.com>
Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB P1_P2_RDB:P1011RDB -
Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_36BIT P1_P2_RDB:P1011RDB,36BIT -
Active powerpc mpc85xx - freescale p1_p2_rdb P1011RDB_36BIT_SDCARD P1_P2_RDB:P1011RDB,36BIT,SDCARD -
#include <linux/compiler.h>
#include <version.h>
#include <environment.h>
+#include <dm.h>
#include <fdtdec.h>
#include <fs.h>
#if defined(CONFIG_CMD_IDE)
#ifdef CONFIG_SANDBOX
#include <asm/state.h>
#endif
+#include <dm/root.h>
#include <linux/compiler.h>
/*
return 0;
}
+static int initf_malloc(void)
+{
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+ assert(gd->malloc_base); /* Set up by crt0.S */
+ gd->malloc_limit = gd->malloc_base + CONFIG_SYS_MALLOC_F_LEN;
+ gd->malloc_ptr = 0;
+#endif
+
+ return 0;
+}
+
+static int initf_dm(void)
+{
+#if defined(CONFIG_DM) && defined(CONFIG_SYS_MALLOC_F_LEN)
+ int ret;
+
+ ret = dm_init_and_scan(true);
+ if (ret)
+ return ret;
+#endif
+
+ return 0;
+}
+
static init_fnc_t init_sequence_f[] = {
#ifdef CONFIG_SANDBOX
setup_ram_buf,
sdram_adjust_866,
init_timebase,
#endif
+ initf_malloc,
+ initf_dm,
init_baud_rate, /* initialze baudrate settings */
serial_init, /* serial communications setup */
console_init_f, /* stage 1 init of console */
{
ulong malloc_start;
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+ debug("Pre-reloc malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
+ gd->malloc_ptr / 1024);
+#endif
/* The malloc area is immediately below the monitor copy in DRAM */
malloc_start = gd->relocaddr - TOTAL_MALLOC_LEN;
mem_malloc_init((ulong)map_sysmem(malloc_start, TOTAL_MALLOC_LEN),
#ifdef CONFIG_DM
static int initr_dm(void)
{
- int ret;
-
- ret = dm_init();
- if (ret) {
- debug("dm_init() failed: %d\n", ret);
- return ret;
- }
- ret = dm_scan_platdata();
- if (ret) {
- debug("dm_scan_platdata() failed: %d\n", ret);
- return ret;
- }
-#ifdef CONFIG_OF_CONTROL
- ret = dm_scan_fdt(gd->fdt_blob);
- if (ret) {
- debug("dm_scan_fdt() failed: %d\n", ret);
- return ret;
- }
-#endif
-
- return 0;
+ /* Save the pre-reloc driver model and start a new one */
+ gd->dm_root_f = gd->dm_root;
+ gd->dm_root = NULL;
+ return dm_init_and_scan(false);
}
#endif
DECLARE_GLOBAL_DATA_PTR;
/* Local prototypes */
-static void logbuff_putc(const char c);
-static void logbuff_puts(const char *s);
+static void logbuff_putc(struct stdio_dev *dev, const char c);
+static void logbuff_puts(struct stdio_dev *dev, const char *s);
static int logbuff_printk(const char *line);
static char buf[1024];
return (rc == 0) ? 1 : rc;
}
-static void logbuff_putc(const char c)
+static void logbuff_putc(struct stdio_dev *dev, const char c)
{
char buf[2];
buf[0] = c;
logbuff_printk(buf);
}
-static void logbuff_puts(const char *s)
+static void logbuff_puts(struct stdio_dev *dev, const char *s)
{
logbuff_printk (s);
}
*/
int do_log(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
+ struct stdio_dev *sdev = NULL;
char *s;
unsigned long i, start, size;
/* Log concatenation of all arguments separated by spaces */
for (i = 2; i < argc; i++) {
logbuff_printk(argv[i]);
- logbuff_putc((i < argc - 1) ? ' ' : '\n');
+ logbuff_putc(sdev, (i < argc - 1) ? ' ' : '\n');
}
return 0;
}
case stderr:
/* Start new device */
if (dev->start) {
- error = dev->start();
+ error = dev->start(dev);
/* If it's not started dont use it */
if (error < 0)
break;
unsigned char ret;
/* This is never called with testcdev == NULL */
- ret = tstcdev->getc();
+ ret = tstcdev->getc(tstcdev);
tstcdev = NULL;
return ret;
}
for (i = 0; i < cd_count[file]; i++) {
dev = console_devices[file][i];
if (dev->tstc != NULL) {
- ret = dev->tstc();
+ ret = dev->tstc(dev);
if (ret > 0) {
tstcdev = dev;
disable_ctrlc(0);
for (i = 0; i < cd_count[file]; i++) {
dev = console_devices[file][i];
if (dev->putc != NULL)
- dev->putc(c);
+ dev->putc(dev, c);
}
}
for (i = 0; i < cd_count[file]; i++) {
dev = console_devices[file][i];
if (dev->puts != NULL)
- dev->puts(s);
+ dev->puts(dev, s);
}
}
#else
static inline int console_getc(int file)
{
- return stdio_devices[file]->getc();
+ return stdio_devices[file]->getc(stdio_devices[file]);
}
static inline int console_tstc(int file)
{
- return stdio_devices[file]->tstc();
+ return stdio_devices[file]->tstc(stdio_devices[file]);
}
static inline void console_putc(int file, const char c)
{
- stdio_devices[file]->putc(c);
+ stdio_devices[file]->putc(stdio_devices[file], c);
}
static inline void console_puts(int file, const char *s)
{
- stdio_devices[file]->puts(s);
+ stdio_devices[file]->puts(stdio_devices[file], s);
}
static inline void console_printdevs(int file)
void putc(const char c)
{
#ifdef CONFIG_SANDBOX
- if (!gd) {
+ if (!gd || !(gd->flags & GD_FLG_SERIAL_READY)) {
os_putc(c);
return;
}
void puts(const char *s)
{
#ifdef CONFIG_SANDBOX
- if (!gd) {
+ if (!gd || !(gd->flags & GD_FLG_SERIAL_READY)) {
os_puts(s);
return;
}
uint i;
char printbuffer[CONFIG_SYS_PBSIZE];
-#ifndef CONFIG_PRE_CONSOLE_BUFFER
+#if defined(CONFIG_PRE_CONSOLE_BUFFER) && !defined(CONFIG_SANDBOX)
if (!gd->have_console)
return 0;
#endif
#include <common.h>
+#ifdef CONFIG_SANDBOX
+#define DEBUG
+#endif
+
#if 0 /* Moved to malloc.h */
/* ---------- To make a malloc.h, start cutting here ------------ */
*/
-\f
+
/* Preliminaries */
#endif /* 0 */ /* Moved to malloc.h */
#include <malloc.h>
+#include <asm/io.h>
+
#ifdef DEBUG
#if __STD_C
static void malloc_update_mallinfo (void);
#endif
-\f
+
/*
Type declarations
serviced via calls to mmap, and then later released via munmap.
*/
-\f
+
/* sizes, alignments */
#define SIZE_SZ (sizeof(INTERNAL_SIZE_T))
#define aligned_OK(m) (((unsigned long)((m)) & (MALLOC_ALIGN_MASK)) == 0)
-\f
+
/*
Physical chunk operations
#define chunk_at_offset(p, s) ((mchunkptr)(((char*)(p)) + (s)))
-\f
+
/*
Dealing with use bits
(((mchunkptr)(((char*)(p)) + (s)))->size &= ~(PREV_INUSE))
-\f
+
/*
Dealing with size fields
#define set_foot(p, s) (((mchunkptr)((char*)(p) + (s)))->prev_size = (s))
-\f
+
/*
#define is_small_request(nb) (nb < MAX_SMALLBIN_SIZE - SMALLBIN_WIDTH)
-\f
+
/*
To help compensate for the large number of bins, a one-level index
#define clear_binblock(ii) (binblocks_w = (mbinptr)(binblocks_r & ~(idx2binblock(ii))))
-\f
+
/* Other static bookkeeping data */
static unsigned long max_mmapped_mem = 0;
#endif
-\f
+
/*
Debugging support
#define check_malloced_chunk(P,N)
#endif
-\f
+
/*
Macro-based internal utilities
(last_remainder->fd = last_remainder->bk = last_remainder)
-\f
+
/* Routines dealing with mmap(). */
#endif /* HAVE_MMAP */
-\f
+
/*
Extend the top-most chunk by obtaining memory from system.
}
-\f
+
/* Main public routines */
INTERNAL_SIZE_T nb;
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+ if (!(gd->flags & GD_FLG_RELOC)) {
+ ulong new_ptr;
+ void *ptr;
+
+ new_ptr = gd->malloc_ptr + bytes;
+ if (new_ptr > gd->malloc_limit)
+ panic("Out of pre-reloc memory");
+ ptr = map_sysmem(gd->malloc_base + gd->malloc_ptr, bytes);
+ gd->malloc_ptr = ALIGN(new_ptr, sizeof(new_ptr));
+ return ptr;
+ }
+#endif
+
/* check if mem_malloc_init() was run */
if ((mem_malloc_start == 0) && (mem_malloc_end == 0)) {
/* not initialized yet */
}
-\f
+
/*
mchunkptr fwd; /* misc temp for linking */
int islr; /* track whether merging with last_remainder */
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+ /* free() is a no-op - all the memory will be freed on relocation */
+ if (!(gd->flags & GD_FLG_RELOC))
+ return;
+#endif
+
if (mem == NULL) /* free(0) has no effect */
return;
}
-\f
+
/*
/* realloc of null is supposed to be same as malloc */
if (oldmem == NULL) return mALLOc(bytes);
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+ if (!(gd->flags & GD_FLG_RELOC)) {
+ /* This is harder to support and should not be needed */
+ panic("pre-reloc realloc() is not supported");
+ }
+#endif
+
newp = oldp = mem2chunk(oldmem);
newsize = oldsize = chunksize(oldp);
}
-\f
+
/*
}
-\f
+
/*
return NULL;
else
{
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+ if (!(gd->flags & GD_FLG_RELOC)) {
+ MALLOC_ZERO(mem, sz);
+ return mem;
+ }
+#endif
p = mem2chunk(mem);
/* Two optional cases in which clearing not necessary */
}
#endif
-\f
+
/*
}
}
-\f
+
/*
malloc_usable_size:
}
-\f
+
/* Utility to update current_mallinfo for malloc_stats and mallinfo() */
}
#endif /* DEBUG */
-\f
+
/*
#endif /* DEBUG */
-\f
+
/*
mallopt:
/*----------------------------------------------------------------------*/
+static void lcd_stub_putc(struct stdio_dev *dev, const char c)
+{
+ lcd_putc(c);
+}
+
void lcd_putc(const char c)
{
if (!lcd_is_enabled) {
/*----------------------------------------------------------------------*/
+static void lcd_stub_puts(struct stdio_dev *dev, const char *s)
+{
+ lcd_puts(s);
+}
+
void lcd_puts(const char *s)
{
if (!lcd_is_enabled) {
strcpy(lcddev.name, "lcd");
lcddev.ext = 0; /* No extensions */
lcddev.flags = DEV_FLAGS_OUTPUT; /* Output only */
- lcddev.putc = lcd_putc; /* 'putc' function */
- lcddev.puts = lcd_puts; /* 'puts' function */
+ lcddev.putc = lcd_stub_putc; /* 'putc' function */
+ lcddev.puts = lcd_stub_puts; /* 'puts' function */
rc = stdio_register(&lcddev);
#include <config.h>
#include <common.h>
+#include <errno.h>
#include <stdarg.h>
#include <malloc.h>
#include <stdio_dev.h>
#ifdef CONFIG_SYS_DEVICE_NULLDEV
-void nulldev_putc(const char c)
+void nulldev_putc(struct stdio_dev *dev, const char c)
{
/* nulldev is empty! */
}
-void nulldev_puts(const char *s)
+void nulldev_puts(struct stdio_dev *dev, const char *s)
{
/* nulldev is empty! */
}
-int nulldev_input(void)
+int nulldev_input(struct stdio_dev *dev)
{
/* nulldev is empty! */
return 0;
}
#endif
+void stdio_serial_putc(struct stdio_dev *dev, const char c)
+{
+ serial_putc(c);
+}
+
+void stdio_serial_puts(struct stdio_dev *dev, const char *s)
+{
+ serial_puts(s);
+}
+
+int stdio_serial_getc(struct stdio_dev *dev)
+{
+ return serial_getc();
+}
+
+int stdio_serial_tstc(struct stdio_dev *dev)
+{
+ return serial_tstc();
+}
+
/**************************************************************************
* SYSTEM DRIVERS
**************************************************************************
strcpy (dev.name, "serial");
dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
- dev.putc = serial_putc;
- dev.puts = serial_puts;
- dev.getc = serial_getc;
- dev.tstc = serial_tstc;
+ dev.putc = stdio_serial_putc;
+ dev.puts = stdio_serial_puts;
+ dev.getc = stdio_serial_getc;
+ dev.tstc = stdio_serial_tstc;
stdio_register (&dev);
#ifdef CONFIG_SYS_DEVICE_NULLDEV
return _dev;
}
-int stdio_register (struct stdio_dev * dev)
+int stdio_register_dev(struct stdio_dev *dev, struct stdio_dev **devp)
{
struct stdio_dev *_dev;
_dev = stdio_clone(dev);
if(!_dev)
- return -1;
+ return -ENODEV;
list_add_tail(&(_dev->list), &(devs.list));
+ if (devp)
+ *devp = _dev;
+
return 0;
}
+int stdio_register(struct stdio_dev *dev)
+{
+ return stdio_register_dev(dev, NULL);
+}
+
/* deregister the device "devname".
* returns 0 if success, -1 if device is assigned and 1 if devname not found
*/
#ifdef CONFIG_SYS_STDIO_DEREGISTER
-int stdio_deregister(const char *devname)
+int stdio_deregister_dev(struct stdio_dev *dev)
{
int l;
struct list_head *pos;
- struct stdio_dev *dev;
char temp_names[3][16];
- dev = stdio_get_by_name(devname);
-
- if(!dev) /* device not found */
- return -1;
/* get stdio devices (ListRemoveItem changes the dev list) */
for (l=0 ; l< MAX_FILES; l++) {
if (stdio_devices[l] == dev) {
}
return 0;
}
+
+int stdio_deregister(const char *devname)
+{
+ struct stdio_dev *dev;
+
+ dev = stdio_get_by_name(devname);
+
+ if (!dev) /* device not found */
+ return -ENODEV;
+
+ return stdio_deregister_dev(dev);
+}
#endif /* CONFIG_SYS_STDIO_DEREGISTER */
int stdio_init (void)
}
/* test if a character is in the queue */
-static int usb_kbd_testc(void)
+static int usb_kbd_testc(struct stdio_dev *sdev)
{
struct stdio_dev *dev;
struct usb_device *usb_kbd_dev;
}
/* gets the character from the queue */
-static int usb_kbd_getc(void)
+static int usb_kbd_getc(struct stdio_dev *sdev)
{
struct stdio_dev *dev;
struct usb_device *usb_kbd_dev;
memset(&usb_kbd_dev, 0, sizeof(struct stdio_dev));
strcpy(usb_kbd_dev.name, DEVNAME);
usb_kbd_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
- usb_kbd_dev.putc = NULL;
- usb_kbd_dev.puts = NULL;
usb_kbd_dev.getc = usb_kbd_getc;
usb_kbd_dev.tstc = usb_kbd_testc;
usb_kbd_dev.priv = (void *)dev;
You should see something like this:
<...U-Boot banner...>
- Running 12 driver model tests
+ Running 21 driver model tests
Test: dm_test_autobind
Test: dm_test_autoprobe
+ Test: dm_test_bus_children
+ Device 'd-test': seq 3 is in use by 'b-test'
+ Device 'c-test@0': seq 0 is in use by 'a-test'
+ Device 'c-test@1': seq 1 is in use by 'd-test'
+ Test: dm_test_bus_children_funcs
+ Test: dm_test_bus_parent_data
+ Test: dm_test_bus_parent_ops
Test: dm_test_children
Test: dm_test_fdt
+ Device 'd-test': seq 3 is in use by 'b-test'
+ Test: dm_test_fdt_offset
+ Test: dm_test_fdt_pre_reloc
+ Test: dm_test_fdt_uclass_seq
+ Device 'd-test': seq 3 is in use by 'b-test'
+ Device 'a-test': seq 0 is in use by 'd-test'
Test: dm_test_gpio
sandbox_gpio: sb_gpio_get_value: error: offset 4 not reserved
Test: dm_test_leak
- Warning: Please add '#define DEBUG' to the top of common/dlmalloc.c
- Warning: Please add '#define DEBUG' to the top of common/dlmalloc.c
Test: dm_test_lifecycle
Test: dm_test_operations
Test: dm_test_ordering
Test: dm_test_platdata
+ Test: dm_test_pre_reloc
Test: dm_test_remove
Test: dm_test_uclass
+ Test: dm_test_uclass_before_ready
Failures: 0
-(You can add '#define DEBUG' as suggested to check for memory leaks)
-
What is going on?
-----------------
end of the enum there, then declare your uclass as above.
+Device Sequence Numbers
+-----------------------
+
+U-Boot numbers devices from 0 in many situations, such as in the command
+line for I2C and SPI buses, and the device names for serial ports (serial0,
+serial1, ...). Driver model supports this numbering and permits devices
+to be locating by their 'sequence'.
+
+Sequence numbers start from 0 but gaps are permitted. For example, a board
+may have I2C buses 0, 1, 4, 5 but no 2 or 3. The choice of how devices are
+numbered is up to a particular board, and may be set by the SoC in some
+cases. While it might be tempting to automatically renumber the devices
+where there are gaps in the sequence, this can lead to confusion and is
+not the way that U-Boot works.
+
+Each device can request a sequence number. If none is required then the
+device will be automatically allocated the next available sequence number.
+
+To specify the sequence number in the device tree an alias is typically
+used.
+
+aliases {
+ serial2 = "/serial@22230000";
+};
+
+This indicates that in the uclass called "serial", the named node
+("/serial@22230000") will be given sequence number 2. Any command or driver
+which requests serial device 2 will obtain this device.
+
+Some devices represent buses where the devices on the bus are numbered or
+addressed. For example, SPI typically numbers its slaves from 0, and I2C
+uses a 7-bit address. In these cases the 'reg' property of the subnode is
+used, for example:
+
+{
+ aliases {
+ spi2 = "/spi@22300000";
+ };
+
+ spi@22300000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ spi-flash@0 {
+ reg = <0>;
+ ...
+ }
+ eeprom@1 {
+ reg = <1>;
+ };
+ };
+
+In this case we have a SPI bus with two slaves at 0 and 1. The SPI bus
+itself is numbered 2. So we might access the SPI flash with:
+
+ sf probe 2:0
+
+and the eeprom with
+
+ sspi 2:1 32 ef
+
+These commands simply need to look up the 2nd device in the SPI uclass to
+find the right SPI bus. Then, they look at the children of that bus for the
+right sequence number (0 or 1 in this case).
+
+Typically the alias method is used for top-level nodes and the 'reg' method
+is used only for buses.
+
+Device sequence numbers are resolved when a device is probed. Before then
+the sequence number is only a request which may or may not be honoured,
+depending on what other devices have been probed. However the numbering is
+entirely under the control of the board author so a conflict is generally
+an error.
+
+
+Bus Drivers
+-----------
+
+A common use of driver model is to implement a bus, a device which provides
+access to other devices. Example of buses include SPI and I2C. Typically
+the bus provides some sort of transport or translation that makes it
+possible to talk to the devices on the bus.
+
+Driver model provides a few useful features to help with implementing
+buses. Firstly, a bus can request that its children store some 'parent
+data' which can be used to keep track of child state. Secondly, the bus can
+define methods which are called when a child is probed or removed. This is
+similar to the methods the uclass driver provides.
+
+Here an explanation of how a bus fits with a uclass may be useful. Consider
+a USB bus with several devices attached to it, each from a different (made
+up) uclass:
+
+ xhci_usb (UCLASS_USB)
+ eth (UCLASS_ETHERNET)
+ camera (UCLASS_CAMERA)
+ flash (UCLASS_FLASH_STORAGE)
+
+Each of the devices is connected to a different address on the USB bus.
+The bus device wants to store this address and some other information such
+as the bus speed for each device.
+
+To achieve this, the bus device can use dev->parent_priv in each of its
+three children. This can be auto-allocated if the bus driver has a non-zero
+value for per_child_auto_alloc_size. If not, then the bus device can
+allocate the space itself before the child device is probed.
+
+Also the bus driver can define the child_pre_probe() and child_post_remove()
+methods to allow it to do some processing before the child is activated or
+after it is deactivated.
+
+Note that the information that controls this behaviour is in the bus's
+driver, not the child's. In fact it is possible that child has no knowledge
+that it is connected to a bus. The same child device may even be used on two
+different bus types. As an example. the 'flash' device shown above may also
+be connected on a SATA bus or standalone with no bus:
+
+ xhci_usb (UCLASS_USB)
+ flash (UCLASS_FLASH_STORAGE) - parent data/methods defined by USB bus
+
+ sata (UCLASS_SATA)
+ flash (UCLASS_FLASH_STORAGE) - parent data/methods defined by SATA bus
+
+ flash (UCLASS_FLASH_STORAGE) - no parent data/methods (not on a bus)
+
+Above you can see that the driver for xhci_usb/sata controls the child's
+bus methods. In the third example the device is not on a bus, and therefore
+will not have these methods at all. Consider the case where the flash
+device defines child methods. These would be used for *its* children, and
+would be quite separate from the methods defined by the driver for the bus
+that the flash device is connetced to. The act of attaching a device to a
+parent device which is a bus, causes the device to start behaving like a
+bus device, regardless of its own views on the matter.
+
+The uclass for the device can also contain data private to that uclass.
+But note that each device on the bus may be a memeber of a different
+uclass, and this data has nothing to do with the child data for each child
+on the bus.
+
+
Driver Lifecycle
----------------
stored in the device, but it is uclass data. owned by the uclass driver.
It is possible for the device to access it.
- d. All parent devices are probed. It is not possible to activate a device
+ d. If the device's immediate parent specifies a per_child_auto_alloc_size
+ then this space is allocated. This is intended for use by the parent
+ device to keep track of things related to the child. For example a USB
+ flash stick attached to a USB host controller would likely use this
+ space. The controller can hold information about the USB state of each
+ of its children.
+
+ e. All parent devices are probed. It is not possible to activate a device
unless its predecessors (all the way up to the root device) are activated.
This means (for example) that an I2C driver will require that its bus
be activated.
- e. If the driver provides an ofdata_to_platdata() method, then this is
+ f. The device's sequence number is assigned, either the requested one
+ (assuming no conflicts) or the next available one if there is a conflict
+ or nothing particular is requested.
+
+ g. If the driver provides an ofdata_to_platdata() method, then this is
called to convert the device tree data into platform data. This should
do various calls like fdtdec_get_int(gd->fdt_blob, dev->of_offset, ...)
to access the node and store the resulting information into dev->platdata.
data, one day it is possible that U-Boot will cache platformat data for
devices which are regularly de/activated).
- f. The device's probe() method is called. This should do anything that
+ h. The device's probe() method is called. This should do anything that
is required by the device to get it going. This could include checking
that the hardware is actually present, setting up clocks for the
hardware and setting up hardware registers to initial values. The code
allocate the priv space here yourself. The same applies also to
platdata_auto_alloc_size. Remember to free them in the remove() method.
- g. The device is marked 'activated'
+ i. The device is marked 'activated'
- h. The uclass's post_probe() method is called, if one exists. This may
+ j. The uclass's post_probe() method is called, if one exists. This may
cause the uclass to do some housekeeping to record the device as
activated and 'known' by the uclass.
to be sure that no hardware is running, it should be enough to remove
all devices.
- d. The device memory is freed (platform data, private data, uclass data).
+ d. The device memory is freed (platform data, private data, uclass data,
+ parent data).
Note: Because the platform data for a U_BOOT_DEVICE() is defined with a
static pointer, it is not de-allocated during the remove() method. For
or preferably ofdata_to_platdata()) and the deallocation in remove()
are the responsibility of the driver author.
- e. The device is marked inactive. Note that it is still bound, so the
+ e. The device sequence number is set to -1, meaning that it no longer
+ has an allocated sequence. If the device is later reactivated and that
+ sequence number is still free, it may well receive the name sequence
+ number again. But from this point, the sequence number previously used
+ by this device will no longer exist (think of SPI bus 2 being removed
+ and bus 2 is no longer available for use).
+
+ f. The device is marked inactive. Note that it is still bound, so the
device structure itself is not freed at this point. Should the device be
activated again, then the cycle starts again at step 2 above.
- Implemented a GPIO system, trying to keep it simple
+Pre-Relocation Support
+----------------------
+
+For pre-relocation we simply call the driver model init function. Only
+drivers marked with DM_FLAG_PRE_RELOC or the device tree
+'u-boot,dm-pre-reloc' flag are initialised prior to relocation. This helps
+to reduce the driver model overhead.
+
+Then post relocation we throw that away and re-init driver model again.
+For drivers which require some sort of continuity between pre- and
+post-relocation devices, we can provide access to the pre-relocation
+device pointers, but this is not currently implemented (the root device
+pointer is saved but not made available through the driver model API).
+
+
Things to punt for later
------------------------
- SPL support - this will have to be present before many drivers can be
converted, but it seems like we can add it once we are happy with the
core implementation.
-- Pre-relocation support - similar story
-That is not to say that no thinking has gone into these - in fact there
+That is not to say that no thinking has gone into this - in fact there
is quite a lot there. However, getting these right is non-trivial and
there is a high cost associated with going down the wrong path.
For SPL, it may be possible to fit in a simplified driver model with only
bind and probe methods, to reduce size.
-For pre-relocation we can simply call the driver model init function. Then
-post relocation we throw that away and re-init driver model again. For drivers
-which require some sort of continuity between pre- and post-relocation
-devices, we can provide access to the pre-relocation device pointers.
-
Uclasses are statically numbered at compile time. It would be possible to
change this to dynamic numbering, but then we would require some sort of
lookup service, perhaps searching by name. This is slightly less efficient
#endif /* defined(CONFIG_MPC8260) */
#if defined(CONFIG_QE)
-#include <asm/immap_qe.h>
+#include <linux/immap_qe.h>
#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_IMMR + 0x110000 + \
QE_MURAM_SIZE - 2 * sizeof(u32))
*/
#include <common.h>
+#include <fdtdec.h>
#include <malloc.h>
#include <dm/device.h>
#include <dm/device-internal.h>
#include <linux/err.h>
#include <linux/list.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/**
* device_chld_unbind() - Unbind all device's children from the device
*
dev->parent = parent;
dev->driver = drv;
dev->uclass = uc;
+
+ /*
+ * For some devices, such as a SPI or I2C bus, the 'reg' property
+ * is a reasonable indicator of the sequence number. But if there is
+ * an alias, we use that in preference. In any case, this is just
+ * a 'requested' sequence, and will be resolved (and ->seq updated)
+ * when the device is probed.
+ */
+ dev->req_seq = fdtdec_get_int(gd->fdt_blob, of_offset, "reg", -1);
+ dev->seq = -1;
+ if (uc->uc_drv->name && of_offset != -1) {
+ fdtdec_get_alias_seq(gd->fdt_blob, uc->uc_drv->name, of_offset,
+ &dev->req_seq);
+ }
+
if (!dev->platdata && drv->platdata_auto_alloc_size)
dev->flags |= DM_FLAG_ALLOC_PDATA;
return ret;
}
-int device_bind_by_name(struct udevice *parent, const struct driver_info *info,
- struct udevice **devp)
+int device_bind_by_name(struct udevice *parent, bool pre_reloc_only,
+ const struct driver_info *info, struct udevice **devp)
{
struct driver *drv;
drv = lists_driver_lookup_name(info->name);
if (!drv)
return -ENOENT;
+ if (pre_reloc_only && !(drv->flags & DM_FLAG_PRE_RELOC))
+ return -EPERM;
return device_bind(parent, drv, info->name, (void *)info->platdata,
-1, devp);
free(dev->uclass_priv);
dev->uclass_priv = NULL;
}
+ if (dev->parent) {
+ size = dev->parent->driver->per_child_auto_alloc_size;
+ if (size) {
+ free(dev->parent_priv);
+ dev->parent_priv = NULL;
+ }
+ }
}
int device_probe(struct udevice *dev)
struct driver *drv;
int size = 0;
int ret;
+ int seq;
if (!dev)
return -EINVAL;
/* Ensure all parents are probed */
if (dev->parent) {
+ size = dev->parent->driver->per_child_auto_alloc_size;
+ if (size) {
+ dev->parent_priv = calloc(1, size);
+ if (!dev->parent_priv) {
+ ret = -ENOMEM;
+ goto fail;
+ }
+ }
+
ret = device_probe(dev->parent);
if (ret)
goto fail;
}
+ seq = uclass_resolve_seq(dev);
+ if (seq < 0) {
+ ret = seq;
+ goto fail;
+ }
+ dev->seq = seq;
+
+ if (dev->parent && dev->parent->driver->child_pre_probe) {
+ ret = dev->parent->driver->child_pre_probe(dev);
+ if (ret)
+ goto fail;
+ }
+
if (drv->ofdata_to_platdata && dev->of_offset >= 0) {
ret = drv->ofdata_to_platdata(dev);
if (ret)
__func__, dev->name);
}
fail:
+ dev->seq = -1;
device_free(dev);
return ret;
goto err_remove;
}
+ if (dev->parent && dev->parent->driver->child_post_remove) {
+ ret = dev->parent->driver->child_post_remove(dev);
+ if (ret) {
+ dm_warn("%s: Device '%s' failed child_post_remove()",
+ __func__, dev->name);
+ }
+ }
+
device_free(dev);
+ dev->seq = -1;
dev->flags &= ~DM_FLAG_ACTIVATED;
- return 0;
+ return ret;
err_remove:
/* We can't put the children back */
return dev->priv;
}
+
+void *dev_get_parentdata(struct udevice *dev)
+{
+ if (!dev) {
+ dm_warn("%s: null device", __func__);
+ return NULL;
+ }
+
+ return dev->parent_priv;
+}
+
+static int device_get_device_tail(struct udevice *dev, int ret,
+ struct udevice **devp)
+{
+ if (ret)
+ return ret;
+
+ ret = device_probe(dev);
+ if (ret)
+ return ret;
+
+ *devp = dev;
+
+ return 0;
+}
+
+int device_get_child(struct udevice *parent, int index, struct udevice **devp)
+{
+ struct udevice *dev;
+
+ list_for_each_entry(dev, &parent->child_head, sibling_node) {
+ if (!index--)
+ return device_get_device_tail(dev, 0, devp);
+ }
+
+ return -ENODEV;
+}
+
+int device_find_child_by_seq(struct udevice *parent, int seq_or_req_seq,
+ bool find_req_seq, struct udevice **devp)
+{
+ struct udevice *dev;
+
+ *devp = NULL;
+ if (seq_or_req_seq == -1)
+ return -ENODEV;
+
+ list_for_each_entry(dev, &parent->child_head, sibling_node) {
+ if ((find_req_seq ? dev->req_seq : dev->seq) ==
+ seq_or_req_seq) {
+ *devp = dev;
+ return 0;
+ }
+ }
+
+ return -ENODEV;
+}
+
+int device_get_child_by_seq(struct udevice *parent, int seq,
+ struct udevice **devp)
+{
+ struct udevice *dev;
+ int ret;
+
+ *devp = NULL;
+ ret = device_find_child_by_seq(parent, seq, false, &dev);
+ if (ret == -ENODEV) {
+ /*
+ * We didn't find it in probed devices. See if there is one
+ * that will request this seq if probed.
+ */
+ ret = device_find_child_by_seq(parent, seq, true, &dev);
+ }
+ return device_get_device_tail(dev, ret, devp);
+}
+
+int device_find_child_by_of_offset(struct udevice *parent, int of_offset,
+ struct udevice **devp)
+{
+ struct udevice *dev;
+
+ *devp = NULL;
+
+ list_for_each_entry(dev, &parent->child_head, sibling_node) {
+ if (dev->of_offset == of_offset) {
+ *devp = dev;
+ return 0;
+ }
+ }
+
+ return -ENODEV;
+}
+
+int device_get_child_by_of_offset(struct udevice *parent, int seq,
+ struct udevice **devp)
+{
+ struct udevice *dev;
+ int ret;
+
+ *devp = NULL;
+ ret = device_find_child_by_of_offset(parent, seq, &dev);
+ return device_get_device_tail(dev, ret, devp);
+}
return NULL;
}
-int lists_bind_drivers(struct udevice *parent)
+int lists_bind_drivers(struct udevice *parent, bool pre_reloc_only)
{
struct driver_info *info =
ll_entry_start(struct driver_info, driver_info);
int ret;
for (entry = info; entry != info + n_ents; entry++) {
- ret = device_bind_by_name(parent, entry, &dev);
- if (ret) {
+ ret = device_bind_by_name(parent, pre_reloc_only, entry, &dev);
+ if (ret && ret != -EPERM) {
dm_warn("No match for driver '%s'\n", entry->name);
if (!result || ret != -ENOENT)
result = ret;
const int n_ents = ll_entry_count(struct driver, driver);
struct driver *entry;
struct udevice *dev;
+ bool found = false;
const char *name;
int result = 0;
- int ret;
+ int ret = 0;
dm_dbg("bind node %s\n", fdt_get_name(blob, offset, NULL));
for (entry = driver; entry != driver + n_ents; entry++) {
ret = driver_check_compatible(blob, offset, entry->of_match);
+ name = fdt_get_name(blob, offset, NULL);
if (ret == -ENOENT) {
continue;
} else if (ret == -ENODEV) {
+ dm_dbg("Device '%s' has no compatible string\n", name);
break;
} else if (ret) {
dm_warn("Device tree error at offset %d\n", offset);
break;
}
- name = fdt_get_name(blob, offset, NULL);
dm_dbg(" - found match at '%s'\n", entry->name);
ret = device_bind(parent, entry, name, NULL, offset, &dev);
if (ret) {
- dm_warn("No match for driver '%s'\n", entry->name);
+ dm_warn("Error binding driver '%s'\n", entry->name);
if (!result || ret != -ENOENT)
result = ret;
+ } else {
+ found = true;
}
+ break;
+ }
+
+ if (!found && !result && ret != -ENODEV) {
+ dm_dbg("No match for node '%s'\n",
+ fdt_get_name(blob, offset, NULL));
}
return result;
}
INIT_LIST_HEAD(&DM_UCLASS_ROOT_NON_CONST);
- ret = device_bind_by_name(NULL, &root_info, &DM_ROOT_NON_CONST);
+ ret = device_bind_by_name(NULL, false, &root_info, &DM_ROOT_NON_CONST);
if (ret)
return ret;
+ ret = device_probe(DM_ROOT_NON_CONST);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+int dm_uninit(void)
+{
+ device_remove(dm_root());
+ device_unbind(dm_root());
return 0;
}
-int dm_scan_platdata(void)
+int dm_scan_platdata(bool pre_reloc_only)
{
int ret;
- ret = lists_bind_drivers(DM_ROOT_NON_CONST);
+ ret = lists_bind_drivers(DM_ROOT_NON_CONST, pre_reloc_only);
if (ret == -ENOENT) {
dm_warn("Some drivers were not found\n");
ret = 0;
}
#ifdef CONFIG_OF_CONTROL
-int dm_scan_fdt(const void *blob)
+int dm_scan_fdt_node(struct udevice *parent, const void *blob, int offset,
+ bool pre_reloc_only)
{
- int offset = 0;
int ret = 0, err;
- int depth = 0;
- do {
- offset = fdt_next_node(blob, offset, &depth);
- if (offset > 0 && depth == 1) {
- err = lists_bind_fdt(gd->dm_root, blob, offset);
- if (err && !ret)
- ret = err;
- }
- } while (offset > 0);
+ for (offset = fdt_first_subnode(blob, offset);
+ offset > 0;
+ offset = fdt_next_subnode(blob, offset)) {
+ if (pre_reloc_only &&
+ !fdt_getprop(blob, offset, "u-boot,dm-pre-reloc", NULL))
+ continue;
+ err = lists_bind_fdt(parent, blob, offset);
+ if (err && !ret)
+ ret = err;
+ }
if (ret)
dm_warn("Some drivers failed to bind\n");
return ret;
}
+
+int dm_scan_fdt(const void *blob, bool pre_reloc_only)
+{
+ return dm_scan_fdt_node(gd->dm_root, blob, 0, pre_reloc_only);
+}
+#endif
+
+__weak int dm_scan_other(bool pre_reloc_only)
+{
+ return 0;
+}
+
+int dm_init_and_scan(bool pre_reloc_only)
+{
+ int ret;
+
+ ret = dm_init();
+ if (ret) {
+ debug("dm_init() failed: %d\n", ret);
+ return ret;
+ }
+ ret = dm_scan_platdata(pre_reloc_only);
+ if (ret) {
+ debug("dm_scan_platdata() failed: %d\n", ret);
+ return ret;
+ }
+#ifdef CONFIG_OF_CONTROL
+ ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
+ if (ret) {
+ debug("dm_scan_fdt() failed: %d\n", ret);
+ return ret;
+ }
#endif
+ ret = dm_scan_other(pre_reloc_only);
+ if (ret)
+ return ret;
+
+ return 0;
+}
/* This is the root driver - all drivers are children of this */
U_BOOT_DRIVER(root_driver) = {
{
struct uclass *uc;
+ if (!gd->dm_root)
+ return NULL;
/*
* TODO(sjg@chromium.org): Optimise this, perhaps moving the found
* node to the start of the list, or creating a linear array mapping
return -ENODEV;
}
-int uclass_get_device(enum uclass_id id, int index, struct udevice **devp)
+int uclass_find_device_by_seq(enum uclass_id id, int seq_or_req_seq,
+ bool find_req_seq, struct udevice **devp)
{
+ struct uclass *uc;
struct udevice *dev;
int ret;
*devp = NULL;
- ret = uclass_find_device(id, index, &dev);
+ debug("%s: %d %d\n", __func__, find_req_seq, seq_or_req_seq);
+ if (seq_or_req_seq == -1)
+ return -ENODEV;
+ ret = uclass_get(id, &uc);
+ if (ret)
+ return ret;
+
+ list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+ debug(" - %d %d\n", dev->req_seq, dev->seq);
+ if ((find_req_seq ? dev->req_seq : dev->seq) ==
+ seq_or_req_seq) {
+ *devp = dev;
+ debug(" - found\n");
+ return 0;
+ }
+ }
+ debug(" - not found\n");
+
+ return -ENODEV;
+}
+
+static int uclass_find_device_by_of_offset(enum uclass_id id, int node,
+ struct udevice **devp)
+{
+ struct uclass *uc;
+ struct udevice *dev;
+ int ret;
+
+ *devp = NULL;
+ if (node < 0)
+ return -ENODEV;
+ ret = uclass_get(id, &uc);
+ if (ret)
+ return ret;
+
+ list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+ if (dev->of_offset == node) {
+ *devp = dev;
+ return 0;
+ }
+ }
+
+ return -ENODEV;
+}
+
+/**
+ * uclass_get_device_tail() - handle the end of a get_device call
+ *
+ * This handles returning an error or probing a device as needed.
+ *
+ * @dev: Device that needs to be probed
+ * @ret: Error to return. If non-zero then the device is not probed
+ * @devp: Returns the value of 'dev' if there is no error
+ * @return ret, if non-zero, else the result of the device_probe() call
+ */
+static int uclass_get_device_tail(struct udevice *dev, int ret,
+ struct udevice **devp)
+{
if (ret)
return ret;
return 0;
}
+int uclass_get_device(enum uclass_id id, int index, struct udevice **devp)
+{
+ struct udevice *dev;
+ int ret;
+
+ *devp = NULL;
+ ret = uclass_find_device(id, index, &dev);
+ return uclass_get_device_tail(dev, ret, devp);
+}
+
+int uclass_get_device_by_seq(enum uclass_id id, int seq, struct udevice **devp)
+{
+ struct udevice *dev;
+ int ret;
+
+ *devp = NULL;
+ ret = uclass_find_device_by_seq(id, seq, false, &dev);
+ if (ret == -ENODEV) {
+ /*
+ * We didn't find it in probed devices. See if there is one
+ * that will request this seq if probed.
+ */
+ ret = uclass_find_device_by_seq(id, seq, true, &dev);
+ }
+ return uclass_get_device_tail(dev, ret, devp);
+}
+
+int uclass_get_device_by_of_offset(enum uclass_id id, int node,
+ struct udevice **devp)
+{
+ struct udevice *dev;
+ int ret;
+
+ *devp = NULL;
+ ret = uclass_find_device_by_of_offset(id, node, &dev);
+ return uclass_get_device_tail(dev, ret, devp);
+}
+
int uclass_first_device(enum uclass_id id, struct udevice **devp)
{
struct uclass *uc;
return 0;
}
+int uclass_resolve_seq(struct udevice *dev)
+{
+ struct udevice *dup;
+ int seq;
+ int ret;
+
+ assert(dev->seq == -1);
+ ret = uclass_find_device_by_seq(dev->uclass->uc_drv->id, dev->req_seq,
+ false, &dup);
+ if (!ret) {
+ dm_warn("Device '%s': seq %d is in use by '%s'\n",
+ dev->name, dev->req_seq, dup->name);
+ } else if (ret == -ENODEV) {
+ /* Our requested sequence number is available */
+ if (dev->req_seq != -1)
+ return dev->req_seq;
+ } else {
+ return ret;
+ }
+
+ for (seq = 0; seq < DM_MAX_SEQ; seq++) {
+ ret = uclass_find_device_by_seq(dev->uclass->uc_drv->id, seq,
+ false, &dup);
+ if (ret == -ENODEV)
+ break;
+ if (ret)
+ return ret;
+ }
+ return seq;
+}
+
int uclass_post_probe_device(struct udevice *dev)
{
struct uclass_driver *uc_drv = dev->uclass->uc_drv;
free(dev->uclass_priv);
dev->uclass_priv = NULL;
}
+ dev->seq = -1;
return 0;
}
acttoact_bg = picos_to_mclk(common_dimm->trrdl_ps);
wrtord_bg = max(4, picos_to_mclk(7500));
+ if (popts->otf_burst_chop_en)
+ wrtord_bg += 2;
+
pre_all_rec = 0;
ddr->timing_cfg_8 = (0
#include <asm/io.h>
#include <fsl_ddr_sdram.h>
#include <asm/processor.h>
+#include <fsl_immap.h>
#include <fsl_ddr.h>
#if (CONFIG_CHIP_SELECTS_PER_CTRL > 4)
* we choose the max, that is 500 us for all of case.
*/
udelay(500);
- asm volatile("sync;isync");
+ mb();
+ isb();
/* Let the controller go */
temp_sdram_cfg = ddr_in32(&ddr->sdram_cfg) & ~SDRAM_CFG_BI;
ddr_out32(&ddr->sdram_cfg, temp_sdram_cfg | SDRAM_CFG_MEM_EN);
- asm volatile("sync;isync");
+ mb();
+ isb();
total_gb_size_per_controller = 0;
for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
DECLARE_GLOBAL_DATA_PTR;
UCLASS_DRIVER(demo) = {
+ .name = "demo",
.id = UCLASS_DEMO,
};
# SPDX-License-Identifier: GPL-2.0+
#
+ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_DM_GPIO) += gpio-uclass.o
+endif
obj-$(CONFIG_AT91_GPIO) += at91_gpio.o
obj-$(CONFIG_INTEL_ICH6_GPIO) += intel_ich6_gpio.o
*
* @return 0 if no keys available, 1 if keys are available
*/
-static int kbd_tstc(void)
+static int kbd_tstc(struct stdio_dev *dev)
{
/* Just get input to do this for us */
return config.inited ? input_tstc(&config.input) : 0;
*
* @return ASCII key code, or 0 if no key, or -1 if error
*/
-static int kbd_getc(void)
+static int kbd_getc(struct stdio_dev *dev)
{
/* Just get input to do this for us */
return config.inited ? input_getc(&config.input) : 0;
*
* @return 0 if ok, -1 on error
*/
-static int cros_ec_init_keyboard(void)
+static int cros_ec_init_keyboard(struct stdio_dev *dev)
{
const void *blob = gd->fdt_blob;
int node;
* i8042_tstc - test if keyboard input is available
* option: cursor blinking if called in a loop
*/
-int i8042_tstc(void)
+int i8042_tstc(struct stdio_dev *dev)
{
unsigned char scan_code = 0;
* i8042_getc - wait till keyboard input is available
* option: turn on/off cursor while waiting
*/
-int i8042_getc(void)
+int i8042_getc(struct stdio_dev *dev)
{
int ret_chr;
unsigned char scan_code;
}
/* test if a character is in the queue */
-static int kbd_testc(void)
+static int kbd_testc(struct stdio_dev *dev)
{
#if defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || defined(CONFIG_MPC8555)
/* no ISR is used, so received chars must be polled */
}
/* gets the character from the queue */
-static int kbd_getc(void)
+static int kbd_getc(struct stdio_dev *dev)
{
char c;
while(in_pointer==out_pointer) {
memset (&kbddev, 0, sizeof(kbddev));
strcpy(kbddev.name, DEVNAME);
kbddev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM;
- kbddev.putc = NULL ;
- kbddev.puts = NULL ;
kbddev.getc = kbd_getc ;
kbddev.tstc = kbd_testc ;
*
* @return 0 if no keys available, 1 if keys are available
*/
-static int kbd_tstc(void)
+static int kbd_tstc(struct stdio_dev *dev)
{
/* Just get input to do this for us */
return input_tstc(&config.input);
*
* @return ASCII key code, or 0 if no key, or -1 if error
*/
-static int kbd_getc(void)
+static int kbd_getc(struct stdio_dev *dev)
{
/* Just get input to do this for us */
return input_getc(&config.input);
*
* @return 0 if ok, -ve on error
*/
-static int init_tegra_keyboard(void)
+static int init_tegra_keyboard(struct stdio_dev *dev)
{
/* check if already created */
if (config.created)
static struct cbmem_console *cbmem_console_p;
-void cbmemc_putc(char data)
+void cbmemc_putc(struct stdio_dev *dev, char data)
{
int cursor;
cbmem_console_p->buffer_body[cursor] = data;
}
-void cbmemc_puts(const char *str)
+void cbmemc_puts(struct stdio_dev *dev, const char *str)
{
char c;
while ((c = *str++) != 0)
- cbmemc_putc(c);
+ cbmemc_putc(dev, c);
}
int cbmemc_init(void)
#include <asm/errno.h>
#include <fsl_ifc.h>
-#define FSL_IFC_V1_1_0 0x01010000
-#define MAX_BANKS 4
+#ifndef CONFIG_SYS_FSL_IFC_BANK_COUNT
+#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
+#endif
+
+#define MAX_BANKS CONFIG_SYS_FSL_IFC_BANK_COUNT
#define ERR_BYTE 0xFF /* Value returned for read bytes
when read failed */
#define IFC_TIMEOUT_MSECS 10 /* Maximum number of mSecs to wait for IFC
{
}
-static void fsl_ifc_sram_init(void)
+static int fsl_ifc_sram_init(uint32_t ver)
{
struct fsl_ifc *ifc = ifc_ctrl->regs;
uint32_t cs = 0, csor = 0, csor_8k = 0, csor_ext = 0;
+ uint32_t ncfgr = 0;
long long end_tick;
+ if (ver > FSL_IFC_V1_1_0) {
+ ncfgr = ifc_in32(&ifc->ifc_nand.ncfgr);
+ ifc_out32(&ifc->ifc_nand.ncfgr, ncfgr | IFC_NAND_SRAM_INIT_EN);
+
+ /* wait for SRAM_INIT bit to be clear or timeout */
+ end_tick = usec2ticks(IFC_TIMEOUT_MSECS * 1000) + get_ticks();
+ while (end_tick > get_ticks()) {
+ ifc_ctrl->status =
+ ifc_in32(&ifc->ifc_nand.nand_evter_stat);
+
+ if (!(ifc_ctrl->status & IFC_NAND_SRAM_INIT_EN))
+ return 0;
+ }
+ printf("fsl-ifc: Failed to Initialise SRAM\n");
+ return 1;
+ }
+
cs = ifc_ctrl->cs_nand >> IFC_NAND_CSEL_SHIFT;
/* Save CSOR and CSOR_ext */
break;
}
+ if (ifc_ctrl->status != IFC_NAND_EVTER_STAT_OPC) {
+ printf("fsl-ifc: Failed to Initialise SRAM\n");
+ return 1;
+ }
+
ifc_out32(&ifc->ifc_nand.nand_evter_stat, ifc_ctrl->status);
/* Restore CSOR and CSOR_ext */
ifc_out32(&ifc_ctrl->regs->csor_cs[cs].csor, csor);
ifc_out32(&ifc_ctrl->regs->csor_cs[cs].csor_ext, csor_ext);
+
+ return 0;
}
static int fsl_ifc_chip_init(int devnum, u8 *addr)
struct fsl_ifc_mtd *priv;
struct nand_ecclayout *layout;
uint32_t cspr = 0, csor = 0, ver = 0;
- int ret;
+ int ret = 0;
if (!ifc_ctrl) {
fsl_ifc_ctrl_init();
}
ver = ifc_in32(&ifc_ctrl->regs->ifc_rev);
- if (ver == FSL_IFC_V1_1_0)
- fsl_ifc_sram_init();
+ if (ver >= FSL_IFC_V1_1_0)
+ ret = fsl_ifc_sram_init(ver);
+ if (ret)
+ return ret;
+
+ if (ver >= FSL_IFC_V2_0_0)
+ priv->bufnum_mask = (priv->bufnum_mask * 2) + 1;
ret = nand_scan_ident(mtd, 1, NULL);
if (ret)
int pages_per_blk;
int blk_size;
int bad_marker = 0;
- int bufnum_mask, bufnum;
+ int bufnum_mask, bufnum, ver = 0;
int csor, cspr;
int pos = 0;
bad_marker = 5;
}
+ ver = ifc_in32(&ifc->ifc_rev);
+ if (ver >= FSL_IFC_V2_0_0)
+ bufnum_mask = (bufnum_mask * 2) + 1;
+
pages_per_blk =
32 << ((csor & CSOR_NAND_PB_MASK) >> CSOR_NAND_PB_SHIFT);
#define MAX_RXBUF_LOG2 11
#define MAX_RXBUF_LEN (1 << MAX_RXBUF_LOG2)
-#define PORT_IS_ENABLED(port) fm_info[fm_port_to_index(port)].enabled
+#define PORT_IS_ENABLED(port) (fm_port_to_index(port) == -1 ? \
+ 0 : fm_info[fm_port_to_index(port)].enabled)
#endif /* __FM_H__ */
{
int i = fm_port_to_index(port);
+ if (i == -1)
+ return;
+
fm_info[i].enabled = 0;
fman_disable_port(port);
}
{
int i = fm_port_to_index(port);
+ if (i == -1)
+ return;
+
fm_info[i].enabled = 1;
fman_enable_port(port);
}
}
}
-static int nc_start(void)
+static int nc_start(struct stdio_dev *dev)
{
int retval;
return 0;
}
-static void nc_putc(char c)
+static void nc_putc(struct stdio_dev *dev, char c)
{
if (output_recursion)
return;
output_recursion = 0;
}
-static void nc_puts(const char *s)
+static void nc_puts(struct stdio_dev *dev, const char *s)
{
int len;
output_recursion = 0;
}
-static int nc_getc(void)
+static int nc_getc(struct stdio_dev *dev)
{
uchar c;
return c;
}
-static int nc_tstc(void)
+static int nc_tstc(struct stdio_dev *dev)
{
struct eth_device *eth;
}
#endif
if (!enabled) {
- /* Let the user know there's no PCIe link */
- printf("no link, regs @ 0x%lx\n", pci_info->regs);
+ /* Let the user know there's no PCIe link for root
+ * complex. for endpoint, the link may not setup, so
+ * print undetermined.
+ */
+ if (fsl_is_pci_agent(hose))
+ printf("undetermined, regs @ 0x%lx\n", pci_info->regs);
+ else
+ printf("no link, regs @ 0x%lx\n", pci_info->regs);
hose->last_busno = hose->first_busno;
return;
}
#include <command.h>
#include "asm/errno.h"
#include "asm/io.h"
-#include "asm/immap_qe.h"
+#include "linux/immap_qe.h"
#include "qe.h"
#define MPC85xx_DEVDISR_QE_DISABLE 0x1
#include "malloc.h"
#include "asm/errno.h"
#include "asm/io.h"
-#include "asm/immap_qe.h"
+#include "linux/immap_qe.h"
#include "qe.h"
#include "uccf.h"
#include "common.h"
#include "qe.h"
-#include "asm/immap_qe.h"
+#include "linux/immap_qe.h"
/* Fast or Giga ethernet
*/
#include "malloc.h"
#include "asm/errno.h"
#include "asm/io.h"
-#include "asm/immap_qe.h"
+#include "linux/immap_qe.h"
#include "qe.h"
#include "uccf.h"
#include "uec.h"
#include "net.h"
#include "malloc.h"
#include "asm/errno.h"
-#include "asm/immap_qe.h"
+#include "linux/immap_qe.h"
#include "asm/io.h"
#include "qe.h"
#include "uccf.h"
serial_assign(default_serial_console()->name);
}
+int serial_stub_start(struct stdio_dev *sdev)
+{
+ struct serial_device *dev = sdev->priv;
+
+ return dev->start();
+}
+
+int serial_stub_stop(struct stdio_dev *sdev)
+{
+ struct serial_device *dev = sdev->priv;
+
+ return dev->stop();
+}
+
+void serial_stub_putc(struct stdio_dev *sdev, const char ch)
+{
+ struct serial_device *dev = sdev->priv;
+
+ dev->putc(ch);
+}
+
+void serial_stub_puts(struct stdio_dev *sdev, const char *str)
+{
+ struct serial_device *dev = sdev->priv;
+
+ dev->puts(str);
+}
+
+int serial_stub_getc(struct stdio_dev *sdev)
+{
+ struct serial_device *dev = sdev->priv;
+
+ return dev->getc();
+}
+
+int serial_stub_tstc(struct stdio_dev *sdev)
+{
+ struct serial_device *dev = sdev->priv;
+
+ return dev->tstc();
+}
+
/**
* serial_stdio_init() - Register serial ports with STDIO core
*
strcpy(dev.name, s->name);
dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT;
- dev.start = s->start;
- dev.stop = s->stop;
- dev.putc = s->putc;
- dev.puts = s->puts;
- dev.getc = s->getc;
- dev.tstc = s->tstc;
+ dev.start = serial_stub_start;
+ dev.stop = serial_stub_stop;
+ dev.putc = serial_stub_putc;
+ dev.puts = serial_stub_puts;
+ dev.getc = serial_stub_getc;
+ dev.tstc = serial_stub_tstc;
stdio_register(&dev);
*/
int serial_init(void)
{
+ gd->flags |= GD_FLG_SERIAL_READY;
return get_current()->start();
}
* Test whether a character is in the RX buffer
*/
-int usbtty_tstc (void)
+int usbtty_tstc(struct stdio_dev *dev)
{
struct usb_endpoint_instance *endpoint =
&endpoint_instance[rx_endpoint];
* written into its argument c.
*/
-int usbtty_getc (void)
+int usbtty_getc(struct stdio_dev *dev)
{
char c;
struct usb_endpoint_instance *endpoint =
/*
* Output a single byte to the usb client port.
*/
-void usbtty_putc (const char c)
+void usbtty_putc(struct stdio_dev *dev, const char c)
{
if (!usbtty_configured ())
return;
}
}
-void usbtty_puts (const char *str)
+void usbtty_puts(struct stdio_dev *dev, const char *str)
{
int n;
int len;
CURSOR_SET;
}
-void video_putc(const char c)
+void video_putc(struct stdio_dev *dev, const char c)
{
#ifdef CONFIG_CFB_CONSOLE_ANSI
int i;
flush_cache(VIDEO_FB_ADRS, VIDEO_SIZE);
}
-void video_puts(const char *s)
+void video_puts(struct stdio_dev *dev, const char *s)
{
int count = strlen(s);
while (count--)
- video_putc(*s++);
+ video_putc(dev, *s++);
}
/*
console_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM;
console_dev.putc = video_putc; /* 'putc' function */
console_dev.puts = video_puts; /* 'puts' function */
- console_dev.tstc = NULL; /* 'tstc' function */
- console_dev.getc = NULL; /* 'getc' function */
#if !defined(CONFIG_VGA_AS_SINGLE_DEVICE)
/* Also init console device */
struct global_data *new_gd; /* relocated global data */
#ifdef CONFIG_DM
- struct udevice *dm_root;/* Root instance for Driver Model */
+ struct udevice *dm_root; /* Root instance for Driver Model */
+ struct udevice *dm_root_f; /* Pre-relocation root instance */
struct list_head uclass_root; /* Head of core tree */
#endif
#endif
unsigned long timebase_h;
unsigned long timebase_l;
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+ unsigned long malloc_base; /* base address of early malloc() */
+ unsigned long malloc_limit; /* limit address */
+ unsigned long malloc_ptr; /* current address */
+#endif
struct arch_global_data arch; /* architecture-specific data */
} gd_t;
#endif
#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
#define GD_FLG_ENV_READY 0x00080 /* Env. imported into hash table */
+#define GD_FLG_SERIAL_READY 0x00100 /* Pre-reloc serial console ready */
#endif /* __ASM_GENERIC_GBL_DATA_H */
int serial_getc (void);
int serial_tstc (void);
+/* These versions take a stdio_dev pointer */
+struct stdio_dev;
+int serial_stub_getc(struct stdio_dev *sdev);
+int serial_stub_tstc(struct stdio_dev *sdev);
+
void _serial_setbrg (const int);
void _serial_putc (const char, const int);
void _serial_putc_raw(const char, const int);
#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \
FTIM1_GPCM_TRAD(0x1f))
#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \
- FTIM2_GPCM_TCH(0x0) | \
+ FTIM2_GPCM_TCH(0x8) | \
FTIM2_GPCM_TWP(0x1f))
#define CONFIG_SYS_CS3_FTIM3 0x0
#define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \
FTIM1_GPCM_TRAD(0x1f))
#define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \
- FTIM2_GPCM_TCH(0x0) | \
+ FTIM2_GPCM_TCH(0x8) | \
FTIM2_GPCM_TWP(0x1f))
#define CONFIG_SYS_CS2_FTIM3 0x0
#endif
#define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \
FTIM1_GPCM_TRAD(0x1f))
#define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \
- FTIM2_GPCM_TCH(0x0) | \
+ FTIM2_GPCM_TCH(0x8) | \
FTIM2_GPCM_TWP(0x1f))
#define CONFIG_SYS_CS2_FTIM3 0x0
#define CONFIG_VIDEO
#define CONFIG_CFB_CONSOLE
#define VIDEO_KBD_INIT_FCT (simple_strtol (getenv("console"), NULL, 10))
-#define VIDEO_TSTC_FCT serial_tstc
-#define VIDEO_GETC_FCT serial_getc
+#define VIDEO_TSTC_FCT serial_stub_tstc
+#define VIDEO_GETC_FCT serial_stub_getc
#define CONFIG_VIDEO_SMI_LYNXEM
#define CONFIG_VIDEO_LOGO
#define CONFIG_VIDEO_LOGO
#define VIDEO_KBD_INIT_FCT 0 /* no KBD dev on MHPC - use serial */
-#define VIDEO_TSTC_FCT serial_tstc
-#define VIDEO_GETC_FCT serial_getc
+#define VIDEO_TSTC_FCT serial_stub_tstc
+#define VIDEO_GETC_FCT serial_stub_getc
#define CONFIG_BR0_WORKAROUND 1
#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \
FTIM1_GPCM_TRAD(0x1f))
#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \
- FTIM2_GPCM_TCH(0x0) | \
+ FTIM2_GPCM_TCH(0x8) | \
FTIM2_GPCM_TWP(0x1f))
#define CONFIG_SYS_CS3_FTIM3 0x0
+++ /dev/null
-/*
- * Copyright 2010-2012 Freescale Semiconductor, Inc.
- *
- * Authors: Roy Zang <tie-fei.zang@freescale.com>
- * Chunhe Lan <b25806@freescale.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-/*
- * p1023rds board configuration file
- *
- */
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE 0xeff40000
-#endif
-
-#ifndef CONFIG_SYS_MONITOR_BASE
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
-#endif
-
-#ifndef CONFIG_RESET_VECTOR_ADDRESS
-#define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc
-#endif
-
-/* High Level Configuration Options */
-#define CONFIG_BOOKE /* BOOKE */
-#define CONFIG_E500 /* BOOKE e500 family */
-#define CONFIG_P1023
-#define CONFIG_P1023RDS
-#define CONFIG_MP /* support multiple processors */
-
-#define CONFIG_FSL_ELBC /* Has Enhanced localbus controller */
-#define CONFIG_PCI /* Enable PCI/PCIE */
-#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */
-#define CONFIG_PCIE3 /* PCIE controler 3 (slot 3) */
-#define CONFIG_FSL_PCI_INIT /* Use common FSL init code */
-#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
-#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */
-#define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */
-#define CONFIG_FSL_LAW /* Use common FSL init code */
-
-#ifndef __ASSEMBLY__
-extern unsigned long get_clock_freq(void);
-#endif
-
-#define CONFIG_SYS_CLK_FREQ 66666666
-#define CONFIG_DDR_CLK_FREQ CONFIG_SYS_CLK_FREQ
-
-/*
- * These can be toggled for performance analysis, otherwise use default.
- */
-#define CONFIG_L2_CACHE /* toggle L2 cache */
-#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_HWCONFIG
-
-#define CONFIG_ENABLE_36BIT_PHYS
-
-#define CONFIG_SYS_MEMTEST_START 0x00000000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x1fffffff /* fix me, only 1G */
-#define CONFIG_PANIC_HANG /* do not reset board on panic */
-
-#define CONFIG_SYS_LBC_LBCR 0x00000000 /* Implement conversion of
- addresses in the LBC */
-
-/* DDR Setup */
-#define CONFIG_VERY_BIG_RAM
-
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
-#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
-
-#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-
-#define CONFIG_DIMM_SLOTS_PER_CTLR 1
-#define CONFIG_CHIP_SELECTS_PER_CTRL 2
-
-/* These are used when DDR doesn't use SPD. */
-#define CONFIG_SYS_SDRAM_SIZE 2048u /* DDR is 2GB */
-
-/* Default settings for "stable" mode */
-#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F
-#define CONFIG_SYS_DDR_CS1_BNDS 0x0040007F
-#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014302
-#define CONFIG_SYS_DDR_CS1_CONFIG 0x80014302
-#define CONFIG_SYS_DDR_TIMING_3 0x00020000
-#define CONFIG_SYS_DDR_TIMING_0 0x40110104
-#define CONFIG_SYS_DDR_TIMING_1 0x5C59E544
-#define CONFIG_SYS_DDR_TIMING_2 0x0fA888CA
-#define CONFIG_SYS_DDR_MODE_1 0x00441210
-#define CONFIG_SYS_DDR_MODE_2 0x00000000
-#define CONFIG_SYS_DDR_MODE_CTRL 0x00000000
-#define CONFIG_SYS_DDR_INTERVAL 0x0A280100
-#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef
-#define CONFIG_SYS_DDR_CLK_CTRL 0x01800000
-#define CONFIG_SYS_DDR_TIMING_4 0x00000001
-#define CONFIG_SYS_DDR_TIMING_5 0x01401400
-#define CONFIG_SYS_DDR_ZQ_CNTL 0x89080600
-#define CONFIG_SYS_DDR_WRLVL_CNTL 0x8675F605
-#define CONFIG_SYS_DDR_CONTROL 0xC70C0008 /* Type = DDR3: No Interleaving */
-#define CONFIG_SYS_DDR_CONTROL2 0x24401010
-#define CONFIG_SYS_DDR_CDR1 0x00000000
-#define CONFIG_SYS_DDR_CDR2 0x00000000
-
-#define CONFIG_SYS_DDR_ERR_INT_EN 0x00000000
-#define CONFIG_SYS_DDR_ERR_DIS 0x00000000
-#define CONFIG_SYS_DDR_SBE 0x00000000
-
-/* Settings that differ for "performance" mode */
-#define CONFIG_SYS_DDR_CS0_BNDS_PERF 0x0000007F /* Interleaving Enabled */
-#define CONFIG_SYS_DDR_CS1_BNDS_PERF 0x00000000 /* Interleaving Enabled */
-#define CONFIG_SYS_DDR_CS1_CONFIG_PERF 0x80014302
-#define CONFIG_SYS_DDR_TIMING_1_PERF 0x5C58E544
-#define CONFIG_SYS_DDR_TIMING_2_PERF 0x0FA888CA
-/* Type = DDR3: cs0-cs1 interleaving */
-#define CONFIG_SYS_DDR_CONTROL_PERF 0xC70C4008
-#define CONFIG_SYS_DDR_CDR_1 0x00000000
-#define CONFIG_SYS_DDR_CDR_2 0x00000000
-
-
-/*
- * Memory map
- *
- * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable
- * 0x8000_0000 0xbfff_ffff PCI Express Mem 1G non-cacheable
- * 0xc000_0000 0xdfff_ffff PCI 512M non-cacheable
- * 0xe100_0000 0xe3ff_ffff PCI IO range 4M non-cacheable
- *
- * Localbus non-cacheable
- * 0xe000_0000 0xe003_ffff BCSR 256K BCSR
- * 0xee00_0000 0xefff_ffff NOR flash 32M NOR flash
- * 0xff00_0000 0xff3f_ffff DPAA_QBMAN 4M
- * 0xff60_0000 0xff7f_ffff CCSR 2M non-cacheable
- * 0xffa0_0000 0xffaf_ffff NAND 1M non-cacheable
- * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0
- */
-
-/*
- * Local Bus Definitions
- */
-#define CONFIG_SYS_BCSR_BASE 0xe0000000 /* start of on board FPGA */
-#define CONFIG_SYS_BCSR_BASE_PHYS CONFIG_SYS_BCSR_BASE
-
-#define CONFIG_SYS_FLASH_BASE 0xee000000 /* start of FLASH 32M */
-
-#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE
-
-#define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
- | BR_PS_16 | BR_V)
-#define CONFIG_FLASH_OR_PRELIM 0xfe000ff7
-
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_EMPTY_INFO
-
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
-#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
-#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-
-#if defined(CONFIG_SYS_SPL)
-#define CONFIG_SYS_RAMBOOT
-#endif
-
-#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f function */
-#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
-
-#define CONFIG_SYS_INIT_RAM_LOCK
-#define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */
-#define CONFIG_SYS_INIT_RAM_END 0x00004000 /* End of used area in RAM */
-
-#define CONFIG_SYS_GBL_DATA_OFFSET \
- (CONFIG_SYS_INIT_RAM_END - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
-#define CONFIG_SYS_MALLOC_LEN (6 * 1024 * 1024) /* Reserved for malloc */
-
-#ifndef CONFIG_NAND_SPL
-#define CONFIG_SYS_NAND_BASE 0xffa00000
-#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
-#else
-#define CONFIG_SYS_NAND_BASE 0xfff00000
-#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
-#endif
-
-#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE}
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_MTD_NAND_VERIFY_WRITE
-#define CONFIG_CMD_NAND
-#define CONFIG_NAND_FSL_ELBC
-#define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024)
-
-/* NAND boot: 4K NAND loader config */
-#define CONFIG_SYS_NAND_SPL_SIZE 0x1000
-#define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) + CONFIG_SYS_NAND_SPL_SIZE)
-#define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000 - CONFIG_SYS_NAND_SPL_SIZE)
-#define CONFIG_SYS_NAND_U_BOOT_START 0x11000000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS (0)
-#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000
-#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
-
-/* NAND flash config */
-#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \
- | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
- | BR_PS_8 /* Port Size = 8bit */ \
- | BR_MS_FCM /* MSEL = FCM */ \
- | BR_V) /* valid */
-#define CONFIG_SYS_NAND_OR_PRELIM (0xFFF80000 /* length 32K */ \
- | OR_FCM_CSCT \
- | OR_FCM_CST \
- | OR_FCM_CHT \
- | OR_FCM_SCY_1 \
- | OR_FCM_TRLX \
- | OR_FCM_EHTR)
-
-#define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */
-#define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */
-/* chip select 1 - BCSR */
-#define CONFIG_SYS_BR1_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_BCSR_BASE_PHYS) \
- | BR_MS_GPCM | BR_PS_8 | BR_V)
-#define CONFIG_SYS_OR1_PRELIM (OR_AM_32KB | OR_GPCM_CSNT | OR_GPCM_XACS \
- | OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR \
- | OR_GPCM_EAD)
-
-/* Serial Port
- * open - index 2
- * shorted - index 1
- */
-#define CONFIG_CONS_INDEX 1
-#undef CONFIG_SERIAL_SOFTWARE_FIFO
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE 1
-#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
-#ifdef CONFIG_NAND_SPL
-#define CONFIG_NS16550_MIN_FUNCTIONS
-#endif
-
-#define CONFIG_SYS_BAUDRATE_TABLE \
- {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
-
-#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
-#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
-
-/* Use the HUSH parser */
-#define CONFIG_SYS_HUSH_PARSER
-
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE /* enable fit_format_{error,warning}() */
-
-/* I2C */
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
-#define CONFIG_SYS_FSL_I2C_SPEED 400000
-#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
-#define CONFIG_SYS_FSL_I2C2_SPEED 400000
-#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
-
-/*
- * I2C2 EEPROM
- */
-#define CONFIG_ID_EEPROM
-#ifdef CONFIG_ID_EEPROM
-#define CONFIG_SYS_I2C_EEPROM_NXID
-#endif
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_BUS_NUM 0
-
-#define CONFIG_CMD_I2C
-
-/*
- * eSPI - Enhanced SPI
- */
-#define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_ATMEL
-
-#define CONFIG_HARD_SPI
-#define CONFIG_FSL_ESPI
-
-#define CONFIG_CMD_SF
-#define CONFIG_SF_DEFAULT_SPEED 10000000
-#define CONFIG_SF_DEFAULT_MODE 0
-
-/*
- * General PCI
- * Memory space is mapped 1-1, but I/O space must start from 0.
- */
-
-/* controller 3, Slot 1, tgtid 3, Base address b000 */
-#define CONFIG_SYS_PCIE3_NAME "Slot 3"
-#define CONFIG_SYS_PCIE3_MEM_VIRT 0x80000000
-#define CONFIG_SYS_PCIE3_MEM_BUS 0x80000000
-#define CONFIG_SYS_PCIE3_MEM_PHYS 0x80000000
-#define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCIE3_IO_VIRT 0xffc00000
-#define CONFIG_SYS_PCIE3_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE3_IO_PHYS 0xffc00000
-#define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */
-
-/* controller 2, direct to uli, tgtid 2, Base address 9000 */
-#define CONFIG_SYS_PCIE2_NAME "Slot 2"
-#define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000
-#define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000
-#define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000
-#define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000
-#define CONFIG_SYS_PCIE2_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000
-#define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */
-
-/* controller 1, Slot 2, tgtid 1, Base address a000 */
-#define CONFIG_SYS_PCIE1_NAME "Slot 1"
-#define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000
-#define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000
-#define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000
-#define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */
-#define CONFIG_SYS_PCIE1_IO_VIRT 0xffc20000
-#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
-#define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000
-#define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */
-
-#if defined(CONFIG_PCI)
-#define CONFIG_E1000 /* Defind e1000 pci Ethernet card */
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#endif /* CONFIG_PCI */
-
-/*
- * Environment
- */
-#define CONFIG_ENV_OVERWRITE
-
-#if defined(CONFIG_SYS_RAMBOOT)
-#define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x4000)
-#define CONFIG_ENV_SIZE 0x2000
-#else
-#define CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE 0x2000
-#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */
-#endif
-
-#define CONFIG_LOADS_ECHO /* echo on for serial download */
-#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_IRQ
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_SETEXPR
-#define CONFIG_CMD_REGINFO
-
-#if defined(CONFIG_PCI)
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
-#endif
-
-/*
- * USB
- */
-#define CONFIG_HAS_FSL_DR_USB
-#ifdef CONFIG_HAS_FSL_DR_USB
-#define CONFIG_USB_EHCI
-
-#ifdef CONFIG_USB_EHCI
-#define CONFIG_CMD_USB
-#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_USB_EHCI_FSL
-#define CONFIG_USB_STORAGE
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_DOS_PARTITION
-#endif
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_CMDLINE_EDITING /* Command-line editing */
-#define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT)+16)
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 16 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization.
- */
-#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/
-#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */
-
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
-#endif
-
-/*
- * Environment Configuration
- */
-#define CONFIG_BOOTFILE "uImage"
-#define CONFIG_UBOOTPATH (u-boot.bin) /* U-Boot image on TFTP server */
-
-/* default location for tftp and bootm */
-#define CONFIG_LOADADDR 1000000
-
-#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
-
-#define CONFIG_BAUDRATE 115200
-
-/* Qman/Bman */
-#define CONFIG_SYS_DPAA_QBMAN /* support Q/Bman */
-#define CONFIG_SYS_QMAN_MEM_BASE 0xff000000
-#define CONFIG_SYS_QMAN_MEM_PHYS CONFIG_SYS_QMAN_MEM_BASE
-#define CONFIG_SYS_QMAN_MEM_SIZE 0x00200000
-#define CONFIG_SYS_BMAN_MEM_BASE 0xff200000
-#define CONFIG_SYS_BMAN_MEM_PHYS CONFIG_SYS_BMAN_MEM_BASE
-#define CONFIG_SYS_BMAN_MEM_SIZE 0x00200000
-
-/* For FM */
-#define CONFIG_SYS_DPAA_FMAN
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
-
-#ifdef CONFIG_SYS_DPAA_FMAN
-#define CONFIG_FMAN_ENET
-#define CONFIG_PHY_MARVELL
-#endif
-
-/* Default address of microcode for the Linux Fman driver */
-/* QE microcode/firmware address */
-#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
-#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
-#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
-
-#ifdef CONFIG_FMAN_ENET
-#define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2
-#define CONFIG_SYS_FM1_DTSEC2_PHY_ADDR 0x7
-
-#define CONFIG_SYS_TBIPA_VALUE 8
-#define CONFIG_MII /* MII PHY management */
-#define CONFIG_ETHPRIME "FM1@DTSEC1"
-#endif
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0"
-
-#endif /* __CONFIG_H */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_SYS_FSL_I2C_SPEED 50000 /* I2C speed in Hz */
+#define CONFIG_SYS_FSL_I2C2_SPEED 50000
+#define CONFIG_SYS_FSL_I2C3_SPEED 50000
+#define CONFIG_SYS_FSL_I2C4_SPEED 50000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_SPEED 50000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
+#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
+#define CONFIG_SYS_FSL_I2C4_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x119000
+#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
+#define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000
+#define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100
#define I2C_MUX_PCA_ADDR 0x77
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/
#define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \
FTIM1_GPCM_TRAD(0x1f))
#define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \
- FTIM2_GPCM_TCH(0x0) | \
+ FTIM2_GPCM_TCH(0x8) | \
FTIM2_GPCM_TWP(0x1f))
#define CONFIG_SYS_CS2_FTIM3 0x0
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_FSL /* Use FSL common I2C driver */
#define CONFIG_SYS_FSL_I2C_SPEED 400000 /* I2C speed in Hz */
+#define CONFIG_SYS_FSL_I2C2_SPEED 400000
+#define CONFIG_SYS_FSL_I2C3_SPEED 400000
+#define CONFIG_SYS_FSL_I2C4_SPEED 400000
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
-#define CONFIG_SYS_FSL_I2C2_SPEED 400000 /* I2C speed in Hz */
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
+#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
+#define CONFIG_SYS_FSL_I2C4_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000
-#define CONFIG_SYS_FSL_I2C2_OFFSET 0x119000
+#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100
+#define CONFIG_SYS_FSL_I2C3_OFFSET 0x119000
+#define CONFIG_SYS_FSL_I2C4_OFFSET 0x119100
/* I2C bus multiplexer */
#define I2C_MUX_PCA_ADDR 0x70
#ifndef __T208xQDS_H
#define __T208xQDS_H
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
#define CONFIG_MMC
#define CONFIG_SPI_FLASH
#ifdef CONFIG_SPI_FLASH
#define CONFIG_FSL_ESPI
#define CONFIG_SPI_FLASH_STMICRO
-#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_RAMBOOT_PBL)
+#ifndef CONFIG_SPL_BUILD
#define CONFIG_SPI_FLASH_SST
#define CONFIG_SPI_FLASH_EON
#endif
#ifndef __T2080RDB_H
#define __T2080RDB_H
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_T2080RDB
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */
#define CONFIG_MMC
#define CONFIG_SYS_CS2_FTIM1 (FTIM1_GPCM_TACO(0x0e) | \
FTIM1_GPCM_TRAD(0x1f))
#define CONFIG_SYS_CS2_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \
- FTIM2_GPCM_TCH(0x0) | \
+ FTIM2_GPCM_TCH(0x8) | \
FTIM2_GPCM_TWP(0x1f))
#define CONFIG_SYS_CS2_FTIM3 0x0
#define CONFIG_SYS_CS3_FTIM1 (FTIM1_GPCM_TACO(0xff) | \
FTIM1_GPCM_TRAD(0x3f))
#define CONFIG_SYS_CS3_FTIM2 (FTIM2_GPCM_TCS(0x0e) | \
- FTIM2_GPCM_TCH(0x0) | \
+ FTIM2_GPCM_TCH(0x8) | \
FTIM2_GPCM_TWP(0x1f))
#define CONFIG_SYS_CS3_FTIM3 0x0
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (800*480 + 256*4 + 10*1024)
#define VIDEO_FB_16BPP_WORD_SWAP
#define VIDEO_KBD_INIT_FCT 0
-#define VIDEO_TSTC_FCT serial_tstc
-#define VIDEO_GETC_FCT serial_getc
+#define VIDEO_TSTC_FCT serial_stub_tstc
+#define VIDEO_GETC_FCT serial_stub_getc
/*
* BOOTP options
#define VIDEO_TSTC_FCT rx51_kp_tstc
#define VIDEO_GETC_FCT rx51_kp_getc
#ifndef __ASSEMBLY__
+struct stdio_dev;
int rx51_kp_init(void);
-int rx51_kp_tstc(void);
-int rx51_kp_getc(void);
+int rx51_kp_tstc(struct stdio_dev *sdev);
+int rx51_kp_getc(struct stdio_dev *sdev);
#endif
#ifndef MTDPARTS_DEFAULT
#define CONFIG_EFI_PARTITION
/*
- * Size of malloc() pool, although we don't actually use this yet.
+ * Size of malloc() pool, before and after relocation
*/
+#define CONFIG_SYS_MALLOC_F_LEN (1 << 10)
+#define CONFIG_MALLOC_F_ADDR 0x0010000
#define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */
#define CONFIG_SYS_HUSH_PARSER
* tree.
*
* @parent: Pointer to device's parent
+ * @pre_reloc_only: If true, bind the driver only if its DM_INIT_F flag is set.
+ * If false bind the driver always.
* @info: Name and platdata for this device
* @devp: Returns a pointer to the bound device
* @return 0 if OK, -ve on error
*/
-int device_bind_by_name(struct udevice *parent, const struct driver_info *info,
- struct udevice **devp);
+int device_bind_by_name(struct udevice *parent, bool pre_reloc_only,
+ const struct driver_info *info, struct udevice **devp);
/**
* device_probe() - Probe a device, activating it
/* DM is responsible for allocating and freeing platdata */
#define DM_FLAG_ALLOC_PDATA (1 << 1)
+/* DM should init this device prior to relocation */
+#define DM_FLAG_PRE_RELOC (1 << 2)
+
/**
* struct udevice - An instance of a driver
*
* @priv: Private data for this device
* @uclass: Pointer to uclass for this device
* @uclass_priv: The uclass's private data for this device
+ * @parent_priv: The parent's private data for this device
* @uclass_node: Used by uclass to link its devices
* @child_head: List of children of this device
* @sibling_node: Next device in list of all devices
* @flags: Flags for this device DM_FLAG_...
+ * @req_seq: Requested sequence number for this device (-1 = any)
+ * @seq: Allocated sequence number for this device (-1 = none)
*/
struct udevice {
struct driver *driver;
void *priv;
struct uclass *uclass;
void *uclass_priv;
+ void *parent_priv;
struct list_head uclass_node;
struct list_head child_head;
struct list_head sibling_node;
uint32_t flags;
+ int req_seq;
+ int seq;
};
+/* Maximum sequence number supported */
+#define DM_MAX_SEQ 999
+
/* Returns the operations for a device */
#define device_get_ops(dev) (dev->driver->ops)
* @remove: Called to remove a device, i.e. de-activate it
* @unbind: Called to unbind a device from its driver
* @ofdata_to_platdata: Called before probe to decode device tree data
+ * @child_pre_probe: Called before a child device is probed. The device has
+ * memory allocated but it has not yet been probed.
+ * @child_post_remove: Called after a child device is removed. The device
+ * has memory allocated but its device_remove() method has been called.
* @priv_auto_alloc_size: If non-zero this is the size of the private data
* to be allocated in the device's ->priv pointer. If zero, then the driver
* is responsible for allocating any data required.
* This is typically only useful for device-tree-aware drivers (those with
* an of_match), since drivers which use platdata will have the data
* provided in the U_BOOT_DEVICE() instantiation.
- * ops: Driver-specific operations. This is typically a list of function
+ * @per_child_auto_alloc_size: Each device can hold private data owned by
+ * its parent. If required this will be automatically allocated if this
+ * value is non-zero.
+ * @ops: Driver-specific operations. This is typically a list of function
* pointers defined by the driver, to implement driver functions required by
* the uclass.
+ * @flags: driver flags - see DM_FLAGS_...
*/
struct driver {
char *name;
int (*remove)(struct udevice *dev);
int (*unbind)(struct udevice *dev);
int (*ofdata_to_platdata)(struct udevice *dev);
+ int (*child_pre_probe)(struct udevice *dev);
+ int (*child_post_remove)(struct udevice *dev);
int priv_auto_alloc_size;
int platdata_auto_alloc_size;
+ int per_child_auto_alloc_size;
const void *ops; /* driver-specific operations */
+ uint32_t flags;
};
/* Declare a new U-Boot driver */
*/
void *dev_get_platdata(struct udevice *dev);
+/**
+ * dev_get_parentdata() - Get the parent data for a device
+ *
+ * The parent data is data stored in the device but owned by the parent.
+ * For example, a USB device may have parent data which contains information
+ * about how to talk to the device over USB.
+ *
+ * This checks that dev is not NULL, but no other checks for now
+ *
+ * @dev Device to check
+ * @return parent data, or NULL if none
+ */
+void *dev_get_parentdata(struct udevice *dev);
+
/**
* dev_get_priv() - Get the private data for a device
*
*/
void *dev_get_priv(struct udevice *dev);
+/**
+ * device_get_child() - Get the child of a device by index
+ *
+ * Returns the numbered child, 0 being the first. This does not use
+ * sequence numbers, only the natural order.
+ *
+ * @dev: Parent device to check
+ * @index: Child index
+ * @devp: Returns pointer to device
+ */
+int device_get_child(struct udevice *parent, int index, struct udevice **devp);
+
+/**
+ * device_find_child_by_seq() - Find a child device based on a sequence
+ *
+ * This searches for a device with the given seq or req_seq.
+ *
+ * For seq, if an active device has this sequence it will be returned.
+ * If there is no such device then this will return -ENODEV.
+ *
+ * For req_seq, if a device (whether activated or not) has this req_seq
+ * value, that device will be returned. This is a strong indication that
+ * the device will receive that sequence when activated.
+ *
+ * @parent: Parent device
+ * @seq_or_req_seq: Sequence number to find (0=first)
+ * @find_req_seq: true to find req_seq, false to find seq
+ * @devp: Returns pointer to device (there is only one per for each seq).
+ * Set to NULL if none is found
+ * @return 0 if OK, -ve on error
+ */
+int device_find_child_by_seq(struct udevice *parent, int seq_or_req_seq,
+ bool find_req_seq, struct udevice **devp);
+
+/**
+ * device_get_child_by_seq() - Get a child device based on a sequence
+ *
+ * If an active device has this sequence it will be returned. If there is no
+ * such device then this will check for a device that is requesting this
+ * sequence.
+ *
+ * The device is probed to activate it ready for use.
+ *
+ * @parent: Parent device
+ * @seq: Sequence number to find (0=first)
+ * @devp: Returns pointer to device (there is only one per for each seq)
+ * Set to NULL if none is found
+ * @return 0 if OK, -ve on error
+ */
+int device_get_child_by_seq(struct udevice *parent, int seq,
+ struct udevice **devp);
+
+/**
+ * device_find_child_by_of_offset() - Find a child device based on FDT offset
+ *
+ * Locates a child device by its device tree offset.
+ *
+ * @parent: Parent device
+ * @of_offset: Device tree offset to find
+ * @devp: Returns pointer to device if found, otherwise this is set to NULL
+ * @return 0 if OK, -ve on error
+ */
+int device_find_child_by_of_offset(struct udevice *parent, int of_offset,
+ struct udevice **devp);
+
+/**
+ * device_get_child_by_of_offset() - Get a child device based on FDT offset
+ *
+ * Locates a child device by its device tree offset.
+ *
+ * The device is probed to activate it ready for use.
+ *
+ * @parent: Parent device
+ * @of_offset: Device tree offset to find
+ * @devp: Returns pointer to device if found, otherwise this is set to NULL
+ * @return 0 if OK, -ve on error
+ */
+int device_get_child_by_of_offset(struct udevice *parent, int seq,
+ struct udevice **devp);
+
#endif
* @early_only: If true, bind only drivers with the DM_INIT_F flag. If false
* bind all drivers.
*/
-int lists_bind_drivers(struct udevice *parent);
+int lists_bind_drivers(struct udevice *parent, bool pre_reloc_only);
/**
* lists_bind_fdt() - bind a device tree node
#ifndef _DM_PLATDATA_H
#define _DM_PLATDATA_H
+/**
+ * struct driver_info - Information required to instantiate a device
+ *
+ * @name: Device name
+ * @platdata: Driver-specific platform data
+ */
struct driver_info {
- const char *name;
- const void *platdata;
+ const char *name;
+ const void *platdata;
};
#define U_BOOT_DEVICE(__name) \
*
* This scans all available platdata and creates drivers for each
*
+ * @pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
+ * flag. If false bind all drivers.
* @return 0 if OK, -ve on error
*/
-int dm_scan_platdata(void);
+int dm_scan_platdata(bool pre_reloc_only);
/**
* dm_scan_fdt() - Scan the device tree and bind drivers
*
- * This scans the device tree and creates a driver for each node
+ * This scans the device tree and creates a driver for each node. Only
+ * the top-level subnodes are examined.
*
* @blob: Pointer to device tree blob
+ * @pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
+ * flag. If false bind all drivers.
* @return 0 if OK, -ve on error
*/
-int dm_scan_fdt(const void *blob);
+int dm_scan_fdt(const void *blob, bool pre_reloc_only);
+
+/**
+ * dm_scan_fdt_node() - Scan the device tree and bind drivers for a node
+ *
+ * This scans the subnodes of a device tree node and and creates a driver
+ * for each one.
+ *
+ * @parent: Parent device for the devices that will be created
+ * @blob: Pointer to device tree blob
+ * @offset: Offset of node to scan
+ * @pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
+ * flag. If false bind all drivers.
+ * @return 0 if OK, -ve on error
+ */
+int dm_scan_fdt_node(struct udevice *parent, const void *blob, int offset,
+ bool pre_reloc_only);
+
+/**
+ * dm_scan_other() - Scan for other devices
+ *
+ * Some devices may not be visible to Driver Model. This weak function can
+ * be provided by boards which wish to create their own devices
+ * programmaticaly. They should do this by calling device_bind() on each
+ * device.
+ *
+ * @pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
+ * flag. If false bind all drivers.
+ */
+int dm_scan_other(bool pre_reloc_only);
+
+/**
+ * dm_init_and_scan() - Initialise Driver Model structures and scan for devices
+ *
+ * This function initialises the roots of the driver tree and uclass trees,
+ * then scans and binds available devices from platform data and the FDT.
+ * This calls dm_init() to set up Driver Model structures.
+ *
+ * @pre_reloc_only: If true, bind only drivers with the DM_FLAG_PRE_RELOC
+ * flag. If false bind all drivers.
+ * @return 0 if OK, -ve on error
+ */
+int dm_init_and_scan(bool pre_reloc_only);
/**
* dm_init() - Initialise Driver Model structures
*/
int dm_init(void);
+/**
+ * dm_uninit - Uninitialise Driver Model structures
+ *
+ * All devices will be removed and unbound
+ * @return 0 if OK, -ve on error
+ */
+int dm_uninit(void);
+
#endif
int total_add;
};
+/**
+ * struct dm_test_parent_data - parent's information on each child
+ *
+ * @sum: Test value used to check parent data works correctly
+ * @flag: Used to track calling of parent operations
+ */
+struct dm_test_parent_data {
+ int sum;
+ int flag;
+};
+
/*
* Operation counts for the test driver, used to check that each method is
* called correctly
* @fail_count: Number of tests that failed
* @force_fail_alloc: Force all memory allocs to fail
* @skip_post_probe: Skip uclass post-probe processing
+ * @removed: Used to keep track of a device that was removed
*/
struct dm_test_state {
struct udevice *root;
int fail_count;
int force_fail_alloc;
int skip_post_probe;
+ struct udevice *removed;
};
/* Test flags for each test */
int dm_check_operations(struct dm_test_state *dms, struct udevice *dev,
uint32_t base, struct dm_test_priv *priv);
+/**
+ * dm_check_devices() - check the devices respond to operations correctly
+ *
+ * @dms: Overall test state
+ * @num_devices: Number of test devices to check
+ * @return 0 if OK, -ve on error
+ */
+int dm_check_devices(struct dm_test_state *dms, int num_devices);
+
/**
* dm_test_main() - Run all the tests
*
UCLASS_DEMO,
UCLASS_TEST,
UCLASS_TEST_FDT,
+ UCLASS_TEST_BUS,
/* U-Boot uclasses start here */
- UCLASS_GPIO,
+ UCLASS_GPIO, /* Bank of general-purpose I/O pins */
UCLASS_COUNT,
UCLASS_INVALID = -1,
*/
int uclass_destroy(struct uclass *uc);
+/**
+ * uclass_find_device_by_seq() - Find uclass device based on ID and sequence
+ *
+ * This searches for a device with the given seq or req_seq.
+ *
+ * For seq, if an active device has this sequence it will be returned.
+ * If there is no such device then this will return -ENODEV.
+ *
+ * For req_seq, if a device (whether activated or not) has this req_seq
+ * value, that device will be returned. This is a strong indication that
+ * the device will receive that sequence when activated.
+ *
+ * The device is NOT probed, it is merely returned.
+ *
+ * @id: ID to look up
+ * @seq_or_req_seq: Sequence number to find (0=first)
+ * @find_req_seq: true to find req_seq, false to find seq
+ * @devp: Returns pointer to device (there is only one per for each seq)
+ * @return 0 if OK, -ve on error
+ */
+int uclass_find_device_by_seq(enum uclass_id id, int seq_or_req_seq,
+ bool find_req_seq, struct udevice **devp);
+
#endif
*
* The device is probed to activate it ready for use.
*
- * id: ID to look up
+ * @id: ID to look up
* @index: Device number within that uclass (0=first)
* @devp: Returns pointer to device (there is only one per for each ID)
* @return 0 if OK, -ve on error
*/
int uclass_get_device(enum uclass_id id, int index, struct udevice **devp);
+/**
+ * uclass_get_device_by_seq() - Get a uclass device based on an ID and sequence
+ *
+ * If an active device has this sequence it will be returned. If there is no
+ * such device then this will check for a device that is requesting this
+ * sequence.
+ *
+ * The device is probed to activate it ready for use.
+ *
+ * @id: ID to look up
+ * @seq: Sequence number to find (0=first)
+ * @devp: Returns pointer to device (there is only one for each seq)
+ * @return 0 if OK, -ve on error
+ */
+int uclass_get_device_by_seq(enum uclass_id id, int seq, struct udevice **devp);
+
+/**
+ * uclass_get_device_by_of_offset() - Get a uclass device by device tree node
+ *
+ * This searches the devices in the uclass for one attached to the given
+ * device tree node.
+ *
+ * The device is probed to activate it ready for use.
+ *
+ * @id: ID to look up
+ * @node: Device tree offset to search for (if -ve then -ENODEV is returned)
+ * @devp: Returns pointer to device (there is only one for each node)
+ * @return 0 if OK, -ve on error
+ */
+int uclass_get_device_by_of_offset(enum uclass_id id, int node,
+ struct udevice **devp);
+
/**
* uclass_first_device() - Get the first device in a uclass
*
*/
int uclass_next_device(struct udevice **devp);
+/**
+ * uclass_resolve_seq() - Resolve a device's sequence number
+ *
+ * On entry dev->seq is -1, and dev->req_seq may be -1 (to allocate a
+ * sequence number automatically, or >= 0 to select a particular number.
+ * If the requested sequence number is in use, then this device will
+ * be allocated another one.
+ *
+ * Note that the device's seq value is not changed by this function.
+ *
+ * @dev: Device for which to allocate sequence number
+ * @return sequence number allocated, or -ve on error
+ */
+int uclass_resolve_seq(struct udevice *dev);
+
/**
* uclass_foreach_dev() - Helper function to iteration through devices
*
int fdtdec_add_aliases_for_id(const void *blob, const char *name,
enum fdt_compat_id id, int *node_list, int maxcount);
+/**
+ * Get the alias sequence number of a node
+ *
+ * This works out whether a node is pointed to by an alias, and if so, the
+ * sequence number of that alias. Aliases are of the form <base><num> where
+ * <num> is the sequence number. For example spi2 would be sequence number
+ * 2.
+ *
+ * @param blob Device tree blob (if NULL, then error is returned)
+ * @param base Base name for alias (before the underscore)
+ * @param node Node to look up
+ * @param seqp This is set to the sequence number if one is found,
+ * but otherwise the value is left alone
+ * @return 0 if a sequence was found, -ve if not
+ */
+int fdtdec_get_alias_seq(const void *blob, const char *base, int node,
+ int *seqp);
+
+/**
+ * Get the offset of the given alias node
+ *
+ * This looks up an alias in /aliases then finds the offset of that node.
+ *
+ * @param blob Device tree blob (if NULL, then error is returned)
+ * @param name Alias name, e.g. "console"
+ * @return Node offset referred to by that alias, or -ve FDT_ERR_...
+ */
+int fdtdec_get_alias_node(const void *blob, const char *name);
+
/*
* Get the name for a compatible ID
*
#include <config.h>
#include <common.h>
+#define FSL_IFC_V1_1_0 0x01010000
+#define FSL_IFC_V2_0_0 0x02000000
#ifdef CONFIG_SYS_FSL_IFC_LE
#define ifc_in32(a) in_le32(a)
*/
/* Auto Boot Mode */
#define IFC_NAND_NCFGR_BOOT 0x80000000
+/* SRAM INIT EN */
+#define IFC_NAND_SRAM_INIT_EN 0x20000000
/* Addressing Mode-ROW0+n/COL0 */
#define IFC_NAND_NCFGR_ADDR_MODE_RC0 0x00000000
/* Addressing Mode-ROW0+n/COL0+n */
*/
int i8042_disable(void);
+struct stdio_dev;
+
int i8042_kbd_init(void);
-int i8042_tstc(void);
-int i8042_getc(void);
+int i8042_tstc(struct stdio_dev *dev);
+int i8042_getc(struct stdio_dev *dev);
#endif /* _I8042_H_ */
#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR)
#elif defined(CONFIG_MPC8360)
-#include <asm/immap_qe.h>
+#include <linux/immap_qe.h>
#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR)
#elif defined (CONFIG_MPC85xx)
/* GENERAL functions */
- int (*start) (void); /* To start the device */
- int (*stop) (void); /* To stop the device */
+ int (*start)(struct stdio_dev *dev); /* To start the device */
+ int (*stop)(struct stdio_dev *dev); /* To stop the device */
/* OUTPUT functions */
- void (*putc) (const char c); /* To put a char */
- void (*puts) (const char *s); /* To put a string (accelerator) */
+ /* To put a char */
+ void (*putc)(struct stdio_dev *dev, const char c);
+ /* To put a string (accelerator) */
+ void (*puts)(struct stdio_dev *dev, const char *s);
/* INPUT functions */
- int (*tstc) (void); /* To test if a char is ready... */
- int (*getc) (void); /* To get that char */
+ /* To test if a char is ready... */
+ int (*tstc)(struct stdio_dev *dev);
+ int (*getc)(struct stdio_dev *dev); /* To get that char */
/* Other functions */
* PROTOTYPES
*/
int stdio_register (struct stdio_dev * dev);
+int stdio_register_dev(struct stdio_dev *dev, struct stdio_dev **devp);
int stdio_init (void);
void stdio_print_current_devices(void);
#ifdef CONFIG_SYS_STDIO_DEREGISTER
int stdio_deregister(const char *devname);
+int stdio_deregister_dev(struct stdio_dev *dev);
#endif
struct list_head* stdio_get_list(void);
struct stdio_dev* stdio_get_by_name(const char* name);
/* Video functions */
-int video_init (void *videobase);
-void video_putc (const char c);
-void video_puts (const char *s);
+struct stdio_dev;
+
+int video_init(void *videobase);
+void video_putc(struct stdio_dev *dev, const char c);
+void video_puts(struct stdio_dev *dev, const char *s);
/**
* Display a BMP format bitmap on the screen
DEFINE(GD_SIZE, sizeof(struct global_data));
DEFINE(GD_BD, offsetof(struct global_data, bd));
+#ifdef CONFIG_SYS_MALLOC_F_LEN
+ DEFINE(GD_MALLOC_BASE, offsetof(struct global_data, malloc_base));
+#endif
#if defined(CONFIG_ARM)
#ifndef USE_HOSTCC
#include <common.h>
+#include <errno.h>
#include <serial.h>
#include <libfdt.h>
#include <fdtdec.h>
+#include <linux/ctype.h>
#include <asm/gpio.h>
return num_found;
}
+int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
+ int *seqp)
+{
+ int base_len = strlen(base);
+ const char *find_name;
+ int find_namelen;
+ int prop_offset;
+ int aliases;
+
+ find_name = fdt_get_name(blob, offset, &find_namelen);
+ debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
+
+ aliases = fdt_path_offset(blob, "/aliases");
+ for (prop_offset = fdt_first_property_offset(blob, aliases);
+ prop_offset > 0;
+ prop_offset = fdt_next_property_offset(blob, prop_offset)) {
+ const char *prop;
+ const char *name;
+ const char *slash;
+ const char *p;
+ int len;
+
+ prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
+ debug(" - %s, %s\n", name, prop);
+ if (len < find_namelen || *prop != '/' || prop[len - 1] ||
+ strncmp(name, base, base_len))
+ continue;
+
+ slash = strrchr(prop, '/');
+ if (strcmp(slash + 1, find_name))
+ continue;
+ for (p = name; *p; p++) {
+ if (isdigit(*p)) {
+ *seqp = simple_strtoul(p, NULL, 10);
+ debug("Found seq %d\n", *seqp);
+ return 0;
+ }
+ }
+ }
+
+ debug("Not found\n");
+ return -ENOENT;
+}
+
+int fdtdec_get_alias_node(const void *blob, const char *name)
+{
+ const char *prop;
+ int alias_node;
+ int len;
+
+ if (!blob)
+ return -FDT_ERR_NOTFOUND;
+ alias_node = fdt_path_offset(blob, "/aliases");
+ prop = fdt_getprop(blob, alias_node, name, &len);
+ if (!prop)
+ return -FDT_ERR_NOTFOUND;
+ return fdt_path_offset(blob, prop);
+}
+
int fdtdec_check_fdt(void)
{
/*
#
obj-$(CONFIG_CMD_DM) += cmd_dm.o
+obj-$(CONFIG_DM_TEST) += bus.o
obj-$(CONFIG_DM_TEST) += test-driver.o
obj-$(CONFIG_DM_TEST) += test-fdt.o
obj-$(CONFIG_DM_TEST) += test-main.o
--- /dev/null
+/*
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device-internal.h>
+#include <dm/root.h>
+#include <dm/test.h>
+#include <dm/ut.h>
+#include <dm/util.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+ FLAG_CHILD_PROBED = 10,
+ FLAG_CHILD_REMOVED = -7,
+};
+
+static struct dm_test_state *test_state;
+
+static int testbus_drv_probe(struct udevice *dev)
+{
+ return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false);
+}
+
+static int testbus_child_pre_probe(struct udevice *dev)
+{
+ struct dm_test_parent_data *parent_data = dev_get_parentdata(dev);
+
+ parent_data->flag += FLAG_CHILD_PROBED;
+
+ return 0;
+}
+
+static int testbus_child_post_remove(struct udevice *dev)
+{
+ struct dm_test_parent_data *parent_data = dev_get_parentdata(dev);
+ struct dm_test_state *dms = test_state;
+
+ parent_data->flag += FLAG_CHILD_REMOVED;
+ if (dms)
+ dms->removed = dev;
+
+ return 0;
+}
+
+static const struct udevice_id testbus_ids[] = {
+ {
+ .compatible = "denx,u-boot-test-bus",
+ .data = DM_TEST_TYPE_FIRST },
+ { }
+};
+
+U_BOOT_DRIVER(testbus_drv) = {
+ .name = "testbus_drv",
+ .of_match = testbus_ids,
+ .id = UCLASS_TEST_BUS,
+ .probe = testbus_drv_probe,
+ .priv_auto_alloc_size = sizeof(struct dm_test_priv),
+ .platdata_auto_alloc_size = sizeof(struct dm_test_pdata),
+ .per_child_auto_alloc_size = sizeof(struct dm_test_parent_data),
+ .child_pre_probe = testbus_child_pre_probe,
+ .child_post_remove = testbus_child_post_remove,
+};
+
+UCLASS_DRIVER(testbus) = {
+ .name = "testbus",
+ .id = UCLASS_TEST_BUS,
+};
+
+/* Test that we can probe for children */
+static int dm_test_bus_children(struct dm_test_state *dms)
+{
+ int num_devices = 4;
+ struct udevice *bus;
+ struct uclass *uc;
+
+ ut_assertok(uclass_get(UCLASS_TEST_FDT, &uc));
+ ut_asserteq(num_devices, list_count_items(&uc->dev_head));
+
+ /* Probe the bus, which should yield 3 more devices */
+ ut_assertok(uclass_get_device(UCLASS_TEST_BUS, 0, &bus));
+ num_devices += 3;
+
+ ut_assertok(uclass_get(UCLASS_TEST_FDT, &uc));
+ ut_asserteq(num_devices, list_count_items(&uc->dev_head));
+
+ ut_assert(!dm_check_devices(dms, num_devices));
+
+ return 0;
+}
+DM_TEST(dm_test_bus_children, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test our functions for accessing children */
+static int dm_test_bus_children_funcs(struct dm_test_state *dms)
+{
+ const void *blob = gd->fdt_blob;
+ struct udevice *bus, *dev;
+ int node;
+
+ ut_assertok(uclass_get_device(UCLASS_TEST_BUS, 0, &bus));
+
+ /* device_get_child() */
+ ut_assertok(device_get_child(bus, 0, &dev));
+ ut_asserteq(-ENODEV, device_get_child(bus, 4, &dev));
+ ut_assertok(device_get_child_by_seq(bus, 5, &dev));
+ ut_assert(dev->flags & DM_FLAG_ACTIVATED);
+ ut_asserteq_str("c-test@5", dev->name);
+
+ /* Device with sequence number 0 should be accessible */
+ ut_asserteq(-ENODEV, device_find_child_by_seq(bus, -1, true, &dev));
+ ut_assertok(device_find_child_by_seq(bus, 0, true, &dev));
+ ut_assert(!(dev->flags & DM_FLAG_ACTIVATED));
+ ut_asserteq(-ENODEV, device_find_child_by_seq(bus, 0, false, &dev));
+ ut_assertok(device_get_child_by_seq(bus, 0, &dev));
+ ut_assert(dev->flags & DM_FLAG_ACTIVATED);
+
+ /* There is no device with sequence number 2 */
+ ut_asserteq(-ENODEV, device_find_child_by_seq(bus, 2, false, &dev));
+ ut_asserteq(-ENODEV, device_find_child_by_seq(bus, 2, true, &dev));
+ ut_asserteq(-ENODEV, device_get_child_by_seq(bus, 2, &dev));
+
+ /* Looking for something that is not a child */
+ node = fdt_path_offset(blob, "/junk");
+ ut_asserteq(-ENODEV, device_find_child_by_of_offset(bus, node, &dev));
+ node = fdt_path_offset(blob, "/d-test");
+ ut_asserteq(-ENODEV, device_find_child_by_of_offset(bus, node, &dev));
+
+ /* Find a valid child */
+ node = fdt_path_offset(blob, "/some-bus/c-test@1");
+ ut_assertok(device_find_child_by_of_offset(bus, node, &dev));
+ ut_assert(!(dev->flags & DM_FLAG_ACTIVATED));
+ ut_assertok(device_get_child_by_of_offset(bus, node, &dev));
+ ut_assert(dev->flags & DM_FLAG_ACTIVATED);
+
+ return 0;
+}
+DM_TEST(dm_test_bus_children_funcs, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test that the bus can store data about each child */
+static int dm_test_bus_parent_data(struct dm_test_state *dms)
+{
+ struct dm_test_parent_data *parent_data;
+ struct udevice *bus, *dev;
+ struct uclass *uc;
+ int value;
+
+ ut_assertok(uclass_get_device(UCLASS_TEST_BUS, 0, &bus));
+
+ /* Check that parent data is allocated */
+ ut_assertok(device_find_child_by_seq(bus, 0, true, &dev));
+ ut_asserteq_ptr(NULL, dev_get_parentdata(dev));
+ ut_assertok(device_get_child_by_seq(bus, 0, &dev));
+ parent_data = dev_get_parentdata(dev);
+ ut_assert(NULL != parent_data);
+
+ /* Check that it starts at 0 and goes away when device is removed */
+ parent_data->sum += 5;
+ ut_asserteq(5, parent_data->sum);
+ device_remove(dev);
+ ut_asserteq_ptr(NULL, dev_get_parentdata(dev));
+
+ /* Check that we can do this twice */
+ ut_assertok(device_get_child_by_seq(bus, 0, &dev));
+ parent_data = dev_get_parentdata(dev);
+ ut_assert(NULL != parent_data);
+ parent_data->sum += 5;
+ ut_asserteq(5, parent_data->sum);
+
+ /* Add parent data to all children */
+ ut_assertok(uclass_get(UCLASS_TEST_FDT, &uc));
+ value = 5;
+ uclass_foreach_dev(dev, uc) {
+ /* Ignore these if they are not on this bus */
+ if (dev->parent != bus) {
+ ut_asserteq_ptr(NULL, dev_get_parentdata(dev));
+ continue;
+ }
+ ut_assertok(device_probe(dev));
+ parent_data = dev_get_parentdata(dev);
+
+ parent_data->sum = value;
+ value += 5;
+ }
+
+ /* Check it is still there */
+ value = 5;
+ uclass_foreach_dev(dev, uc) {
+ /* Ignore these if they are not on this bus */
+ if (dev->parent != bus)
+ continue;
+ parent_data = dev_get_parentdata(dev);
+
+ ut_asserteq(value, parent_data->sum);
+ value += 5;
+ }
+
+ return 0;
+}
+
+DM_TEST(dm_test_bus_parent_data, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test that the bus ops are called when a child is probed/removed */
+static int dm_test_bus_parent_ops(struct dm_test_state *dms)
+{
+ struct dm_test_parent_data *parent_data;
+ struct udevice *bus, *dev;
+ struct uclass *uc;
+
+ test_state = dms;
+ ut_assertok(uclass_get_device(UCLASS_TEST_BUS, 0, &bus));
+ ut_assertok(uclass_get(UCLASS_TEST_FDT, &uc));
+
+ uclass_foreach_dev(dev, uc) {
+ /* Ignore these if they are not on this bus */
+ if (dev->parent != bus)
+ continue;
+ ut_asserteq_ptr(NULL, dev_get_parentdata(dev));
+
+ ut_assertok(device_probe(dev));
+ parent_data = dev_get_parentdata(dev);
+ ut_asserteq(FLAG_CHILD_PROBED, parent_data->flag);
+ }
+
+ uclass_foreach_dev(dev, uc) {
+ /* Ignore these if they are not on this bus */
+ if (dev->parent != bus)
+ continue;
+ parent_data = dev_get_parentdata(dev);
+ ut_asserteq(FLAG_CHILD_PROBED, parent_data->flag);
+ ut_assertok(device_remove(dev));
+ ut_asserteq_ptr(NULL, dev_get_parentdata(dev));
+ ut_asserteq_ptr(dms->removed, dev);
+ }
+ test_state = NULL;
+
+ return 0;
+}
+DM_TEST(dm_test_bus_parent_ops, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
#include <dm/test.h>
#include <dm/uclass-internal.h>
+/**
+ * dm_display_line() - Display information about a single device
+ *
+ * Displays a single line of information with an option prefix
+ *
+ * @dev: Device to display
+ * @buf: Prefix to display at the start of the line
+ */
+static void dm_display_line(struct udevice *dev, char *buf)
+{
+ printf("%s- %c %s @ %08lx", buf,
+ dev->flags & DM_FLAG_ACTIVATED ? '*' : ' ',
+ dev->name, (ulong)map_to_sysmem(dev));
+ if (dev->req_seq != -1)
+ printf(", %d", dev->req_seq);
+ puts("\n");
+}
+
static int display_succ(struct udevice *in, char *buf)
{
int len;
char local[16];
struct udevice *pos, *n, *prev = NULL;
- printf("%s- %c %s @ %08lx", buf,
- in->flags & DM_FLAG_ACTIVATED ? '*' : ' ',
- in->name, (ulong)map_to_sysmem(in));
- puts("\n");
+ dm_display_line(in, buf);
if (list_empty(&in->child_head))
return 0;
continue;
printf("uclass %d: %s\n", id, uc->uc_drv->name);
- for (ret = uclass_first_device(id, &dev);
- dev;
- ret = uclass_next_device(&dev)) {
- printf(" %c %s @ %08lx:\n",
- dev->flags & DM_FLAG_ACTIVATED ? '*' : ' ',
- dev->name, (ulong)map_to_sysmem(dev));
+ if (list_empty(&uc->dev_head))
+ continue;
+ list_for_each_entry(dev, &uc->dev_head, uclass_node) {
+ dm_display_line(dev, "");
}
puts("\n");
}
U_BOOT_CMD(
dm, 2, 1, do_dm,
"Driver model low level access",
- "tree Dump driver model tree\n"
+ "tree Dump driver model tree ('*' = activated)\n"
"dm uclass Dump list of instances for each uclass"
TEST_HELP
);
TEST_INTVAL2 = 3,
TEST_INTVAL3 = 6,
TEST_INTVAL_MANUAL = 101112,
+ TEST_INTVAL_PRE_RELOC = 7,
};
static const struct dm_test_pdata test_pdata[] = {
.ping_add = TEST_INTVAL_MANUAL,
};
+static const struct dm_test_pdata test_pdata_pre_reloc = {
+ .ping_add = TEST_INTVAL_PRE_RELOC,
+};
+
U_BOOT_DEVICE(dm_test_info1) = {
.name = "test_drv",
.platdata = &test_pdata[0],
.platdata = &test_pdata_manual,
};
+static struct driver_info driver_info_pre_reloc = {
+ .name = "test_pre_reloc_drv",
+ .platdata = &test_pdata_manual,
+};
+
/* Test that binding with platdata occurs correctly */
static int dm_test_autobind(struct dm_test_state *dms)
{
ut_asserteq(0, list_count_items(&gd->dm_root->child_head));
ut_asserteq(0, dm_testdrv_op_count[DM_TEST_OP_POST_BIND]);
- ut_assertok(dm_scan_platdata());
+ ut_assertok(dm_scan_platdata(false));
/* We should have our test class now at least, plus more children */
ut_assert(1 < list_count_items(&gd->uclass_root));
ut_asserteq(0, dm_testdrv_op_count[DM_TEST_OP_POST_PROBE]);
/* The root device should not be activated until needed */
- ut_assert(!(dms->root->flags & DM_FLAG_ACTIVATED));
+ ut_assert(dms->root->flags & DM_FLAG_ACTIVATED);
/*
* We should be able to find the three test devices, and they should
memcpy(op_count, dm_testdrv_op_count, sizeof(op_count));
- ut_assertok(device_bind_by_name(dms->root, &driver_info_manual,
+ ut_assertok(device_bind_by_name(dms->root, false, &driver_info_manual,
&dev));
ut_assert(dev);
ut_assert(dm_testdrv_op_count[DM_TEST_OP_BIND]
struct udevice *dev, *dev_penultimate, *dev_last, *test_dev;
int pingret;
- ut_assertok(device_bind_by_name(dms->root, &driver_info_manual,
+ ut_assertok(device_bind_by_name(dms->root, false, &driver_info_manual,
&dev));
ut_assert(dev);
/* Bind two new devices (numbers 4 and 5) */
- ut_assertok(device_bind_by_name(dms->root, &driver_info_manual,
+ ut_assertok(device_bind_by_name(dms->root, false, &driver_info_manual,
&dev_penultimate));
ut_assert(dev_penultimate);
- ut_assertok(device_bind_by_name(dms->root, &driver_info_manual,
+ ut_assertok(device_bind_by_name(dms->root, false, &driver_info_manual,
&dev_last));
ut_assert(dev_last);
ut_assert(dev_last == test_dev);
/* Add back the original device 3, now in position 5 */
- ut_assertok(device_bind_by_name(dms->root, &driver_info_manual, &dev));
+ ut_assertok(device_bind_by_name(dms->root, false, &driver_info_manual,
+ &dev));
ut_assert(dev);
/* Try ping */
if (!start.uordblks)
puts("Warning: Please add '#define DEBUG' to the top of common/dlmalloc.c\n");
- ut_assertok(dm_scan_platdata());
- ut_assertok(dm_scan_fdt(gd->fdt_blob));
+ ut_assertok(dm_scan_platdata(false));
+ ut_assertok(dm_scan_fdt(gd->fdt_blob, false));
/* Scanning the uclass is enough to probe all the devices */
for (id = UCLASS_ROOT; id < UCLASS_COUNT; id++) {
for (i = 0; i < count; i++) {
struct dm_test_pdata *pdata;
- ut_assertok(device_bind_by_name(parent, &driver_info_manual,
- &dev));
+ ut_assertok(device_bind_by_name(parent, false,
+ &driver_info_manual, &dev));
pdata = calloc(1, sizeof(*pdata));
pdata->ping_add = key + i;
dev->platdata = pdata;
return 0;
}
DM_TEST(dm_test_children, 0);
+
+/* Test that pre-relocation devices work as expected */
+static int dm_test_pre_reloc(struct dm_test_state *dms)
+{
+ struct udevice *dev;
+
+ /* The normal driver should refuse to bind before relocation */
+ ut_asserteq(-EPERM, device_bind_by_name(dms->root, true,
+ &driver_info_manual, &dev));
+
+ /* But this one is marked pre-reloc */
+ ut_assertok(device_bind_by_name(dms->root, true,
+ &driver_info_pre_reloc, &dev));
+
+ return 0;
+}
+DM_TEST(dm_test_pre_reloc, 0);
+
+static int dm_test_uclass_before_ready(struct dm_test_state *dms)
+{
+ struct uclass *uc;
+
+ ut_assertok(uclass_get(UCLASS_TEST, &uc));
+
+ memset(gd, '\0', sizeof(*gd));
+ ut_asserteq_ptr(NULL, uclass_find(UCLASS_TEST));
+
+ return 0;
+}
+
+DM_TEST(dm_test_uclass_before_ready, 0);
.remove = test_manual_remove,
.unbind = test_manual_unbind,
};
+
+U_BOOT_DRIVER(test_pre_reloc_drv) = {
+ .name = "test_pre_reloc_drv",
+ .id = UCLASS_TEST,
+ .ops = &test_manual_ops,
+ .bind = test_manual_bind,
+ .probe = test_manual_probe,
+ .remove = test_manual_remove,
+ .unbind = test_manual_unbind,
+ .flags = DM_FLAG_PRE_RELOC,
+};
pdata->ping_add = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
"ping-add", -1);
- pdata->base = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
+ pdata->base = fdtdec_get_addr(gd->fdt_blob, dev->of_offset,
+ "ping-expect");
return 0;
}
.id = UCLASS_TEST_FDT,
};
+int dm_check_devices(struct dm_test_state *dms, int num_devices)
+{
+ struct udevice *dev;
+ int ret;
+ int i;
+
+ /*
+ * Now check that the ping adds are what we expect. This is using the
+ * ping-add property in each node.
+ */
+ for (i = 0; i < num_devices; i++) {
+ uint32_t base;
+
+ ret = uclass_get_device(UCLASS_TEST_FDT, i, &dev);
+ ut_assert(!ret);
+
+ /*
+ * Get the 'ping-expect' property, which tells us what the
+ * ping add should be. We don't use the platdata because we
+ * want to test the code that sets that up
+ * (testfdt_drv_probe()).
+ */
+ base = fdtdec_get_addr(gd->fdt_blob, dev->of_offset,
+ "ping-expect");
+ debug("dev=%d, base=%d: %s\n", i, base,
+ fdt_get_name(gd->fdt_blob, dev->of_offset, NULL));
+
+ ut_assert(!dm_check_operations(dms, dev, base,
+ dev_get_priv(dev)));
+ }
+
+ return 0;
+}
+
/* Test that FDT-based binding works correctly */
static int dm_test_fdt(struct dm_test_state *dms)
{
- const int num_drivers = 3;
+ const int num_devices = 4;
struct udevice *dev;
struct uclass *uc;
int ret;
int i;
- ret = dm_scan_fdt(gd->fdt_blob);
+ ret = dm_scan_fdt(gd->fdt_blob, false);
ut_assert(!ret);
ret = uclass_get(UCLASS_TEST_FDT, &uc);
ut_assert(!ret);
- /* These are num_drivers compatible root-level device tree nodes */
- ut_asserteq(num_drivers, list_count_items(&uc->dev_head));
+ /* These are num_devices compatible root-level device tree nodes */
+ ut_asserteq(num_devices, list_count_items(&uc->dev_head));
/* Each should have no platdata / priv */
- for (i = 0; i < num_drivers; i++) {
+ for (i = 0; i < num_devices; i++) {
ret = uclass_find_device(UCLASS_TEST_FDT, i, &dev);
ut_assert(!ret);
ut_assert(!dev_get_priv(dev));
ut_assert(!dev->platdata);
}
+ ut_assertok(dm_check_devices(dms, num_devices));
+
+ return 0;
+}
+DM_TEST(dm_test_fdt, 0);
+
+static int dm_test_fdt_pre_reloc(struct dm_test_state *dms)
+{
+ struct uclass *uc;
+ int ret;
+
+ ret = dm_scan_fdt(gd->fdt_blob, true);
+ ut_assert(!ret);
+
+ ret = uclass_get(UCLASS_TEST_FDT, &uc);
+ ut_assert(!ret);
+
+ /* These is only one pre-reloc device */
+ ut_asserteq(1, list_count_items(&uc->dev_head));
+
+ return 0;
+}
+DM_TEST(dm_test_fdt_pre_reloc, 0);
+
+/* Test that sequence numbers are allocated properly */
+static int dm_test_fdt_uclass_seq(struct dm_test_state *dms)
+{
+ struct udevice *dev;
+
+ /* A few basic santiy tests */
+ ut_assertok(uclass_find_device_by_seq(UCLASS_TEST_FDT, 3, true, &dev));
+ ut_asserteq_str("b-test", dev->name);
+
+ ut_assertok(uclass_find_device_by_seq(UCLASS_TEST_FDT, 0, true, &dev));
+ ut_asserteq_str("a-test", dev->name);
+
+ ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_TEST_FDT, 5,
+ true, &dev));
+ ut_asserteq_ptr(NULL, dev);
+
+ /* Test aliases */
+ ut_assertok(uclass_get_device_by_seq(UCLASS_TEST_FDT, 6, &dev));
+ ut_asserteq_str("e-test", dev->name);
+
+ ut_asserteq(-ENODEV, uclass_find_device_by_seq(UCLASS_TEST_FDT, 7,
+ true, &dev));
+
/*
- * Now check that the ping adds are what we expect. This is using the
- * ping-add property in each node.
+ * Note that c-test nodes are not probed since it is not a top-level
+ * node
*/
- for (i = 0; i < num_drivers; i++) {
- uint32_t base;
+ ut_assertok(uclass_get_device_by_seq(UCLASS_TEST_FDT, 3, &dev));
+ ut_asserteq_str("b-test", dev->name);
- ret = uclass_get_device(UCLASS_TEST_FDT, i, &dev);
- ut_assert(!ret);
+ /*
+ * d-test wants sequence number 3 also, but it can't have it because
+ * b-test gets it first.
+ */
+ ut_assertok(uclass_get_device(UCLASS_TEST_FDT, 2, &dev));
+ ut_asserteq_str("d-test", dev->name);
- /*
- * Get the 'reg' property, which tells us what the ping add
- * should be. We don't use the platdata because we want
- * to test the code that sets that up (testfdt_drv_probe()).
- */
- base = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg");
- debug("dev=%d, base=%d: %s\n", i, base,
- fdt_get_name(gd->fdt_blob, dev->of_offset, NULL));
+ /* d-test actually gets 0 */
+ ut_assertok(uclass_get_device_by_seq(UCLASS_TEST_FDT, 0, &dev));
+ ut_asserteq_str("d-test", dev->name);
- ut_assert(!dm_check_operations(dms, dev, base,
- dev_get_priv(dev)));
- }
+ /* initially no one wants seq 1 */
+ ut_asserteq(-ENODEV, uclass_get_device_by_seq(UCLASS_TEST_FDT, 1,
+ &dev));
+ ut_assertok(uclass_get_device(UCLASS_TEST_FDT, 0, &dev));
+ ut_assertok(uclass_get_device(UCLASS_TEST_FDT, 1, &dev));
+
+ /* But now that it is probed, we can find it */
+ ut_assertok(uclass_get_device_by_seq(UCLASS_TEST_FDT, 1, &dev));
+ ut_asserteq_str("a-test", dev->name);
return 0;
}
-DM_TEST(dm_test_fdt, 0);
+DM_TEST(dm_test_fdt_uclass_seq, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test that we can find a device by device tree offset */
+static int dm_test_fdt_offset(struct dm_test_state *dms)
+{
+ const void *blob = gd->fdt_blob;
+ struct udevice *dev;
+ int node;
+
+ node = fdt_path_offset(blob, "/e-test");
+ ut_assert(node > 0);
+ ut_assertok(uclass_get_device_by_of_offset(UCLASS_TEST_FDT, node,
+ &dev));
+ ut_asserteq_str("e-test", dev->name);
+
+ /* This node should not be bound */
+ node = fdt_path_offset(blob, "/junk");
+ ut_assert(node > 0);
+ ut_asserteq(-ENODEV, uclass_get_device_by_of_offset(UCLASS_TEST_FDT,
+ node, &dev));
+
+ /* This is not a top level node so should not be probed */
+ node = fdt_path_offset(blob, "/some-bus/c-test@5");
+ ut_assert(node > 0);
+ ut_asserteq(-ENODEV, uclass_get_device_by_of_offset(UCLASS_TEST_FDT,
+ node, &dev));
+
+ return 0;
+}
+DM_TEST(dm_test_fdt_offset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
ut_assertok(dm_test_init(dms));
if (test->flags & DM_TESTF_SCAN_PDATA)
- ut_assertok(dm_scan_platdata());
+ ut_assertok(dm_scan_platdata(false));
if (test->flags & DM_TESTF_PROBE_TEST)
ut_assertok(do_autoprobe(dms));
if (test->flags & DM_TESTF_SCAN_FDT)
- ut_assertok(dm_scan_fdt(gd->fdt_blob));
+ ut_assertok(dm_scan_fdt(gd->fdt_blob, false));
if (test->func(dms))
break;
#address-cells = <1>;
#size-cells = <0>;
+ aliases {
+ console = &uart0;
+ testfdt6 = "/e-test";
+ };
+
+ uart0: serial {
+ compatible = "sandbox,serial";
+ u-boot,dm-pre-reloc;
+ };
+
a-test {
reg = <0>;
compatible = "denx,u-boot-fdt-test";
+ ping-expect = <0>;
ping-add = <0>;
+ u-boot,dm-pre-reloc;
};
junk {
b-test {
reg = <3>;
compatible = "denx,u-boot-fdt-test";
+ ping-expect = <3>;
ping-add = <3>;
};
some-bus {
#address-cells = <1>;
#size-cells = <0>;
- reg = <4>;
+ compatible = "denx,u-boot-test-bus";
+ reg = <3>;
+ ping-expect = <4>;
ping-add = <4>;
- c-test {
+ c-test@5 {
compatible = "denx,u-boot-fdt-test";
reg = <5>;
+ ping-expect = <5>;
ping-add = <5>;
};
+ c-test@0 {
+ compatible = "denx,u-boot-fdt-test";
+ reg = <0>;
+ ping-expect = <6>;
+ ping-add = <6>;
+ };
+ c-test@1 {
+ compatible = "denx,u-boot-fdt-test";
+ reg = <1>;
+ ping-expect = <7>;
+ ping-add = <7>;
+ };
};
d-test {
- reg = <6>;
+ reg = <3>;
+ ping-expect = <6>;
+ ping-add = <6>;
+ compatible = "google,another-fdt-test";
+ };
+
+ e-test {
+ reg = <3>;
+ ping-expect = <6>;
ping-add = <6>;
compatible = "google,another-fdt-test";
};
return self.builder.do_make(commit, brd, stage, cwd, *args,
**kwargs)
- def RunCommit(self, commit_upto, brd, work_dir, do_config, force_build):
+ def RunCommit(self, commit_upto, brd, work_dir, do_config, force_build,
+ force_build_failures):
"""Build a particular commit.
If the build is already done, and we are not forcing a build, we skip
work_dir: Directory to which the source will be checked out
do_config: True to run a make <board>_config on the source
force_build: Force a build even if one was previously done
+ force_build_failures: Force a bulid if the previous result showed
+ failure
Returns:
tuple containing:
# self.Make() below, in the event that we do a build.
result = command.CommandResult()
result.return_code = 0
- out_dir = os.path.join(work_dir, 'build')
+ if self.builder.in_tree:
+ out_dir = work_dir
+ else:
+ out_dir = os.path.join(work_dir, 'build')
# Check if the job was already completed last time
done_file = self.builder.GetDoneFile(commit_upto, brd.target)
result.already_done = os.path.exists(done_file)
- if result.already_done and not force_build:
+ will_build = (force_build or force_build_failures or
+ not result.already_done)
+ if result.already_done and will_build:
# Get the return code from that build and use it
with open(done_file, 'r') as fd:
result.return_code = int(fd.readline())
err_file = self.builder.GetErrFile(commit_upto, brd.target)
if os.path.exists(err_file) and os.stat(err_file).st_size:
result.stderr = 'bad'
- else:
+ elif not force_build:
+ # The build passed, so no need to build it again
+ will_build = False
+
+ if will_build:
# We are going to have to build it. First, get a toolchain
if not self.toolchain:
try:
# Set up the environment and command line
env = self.toolchain.MakeEnvironment()
Mkdir(out_dir)
- args = ['O=build', '-s']
+ args = []
+ if not self.builder.in_tree:
+ args.append('O=build')
+ args.append('-s')
if self.builder.num_jobs is not None:
args.extend(['-j', str(self.builder.num_jobs)])
config_args = ['%s_config' % brd.target]
for commit_upto in range(0, len(job.commits), job.step):
result, request_config = self.RunCommit(commit_upto, brd,
work_dir, do_config,
- force_build or self.builder.force_build)
+ force_build or self.builder.force_build,
+ self.builder.force_build_failures)
failed = result.return_code or result.stderr
+ did_config = do_config
if failed and not do_config:
# If our incremental build failed, try building again
# with a reconfig.
if self.builder.force_config_on_failure:
result, request_config = self.RunCommit(commit_upto,
- brd, work_dir, True, True)
- do_config = request_config
+ brd, work_dir, True, True, False)
+ did_config = True
+ if not self.builder.force_reconfig:
+ do_config = request_config
# If we built that commit, then config is done. But if we got
# an warning, reconfig next time to force it to build the same
# Of course this is substantially slower if there are build
# errors/warnings (e.g. 2-3x slower even if only 10% of builds
# have problems).
- if (failed and not result.already_done and not do_config and
+ if (failed and not result.already_done and not did_config and
self.builder.force_config_on_failure):
# If this build failed, try the next one with a
# reconfigure.
force_config_on_failure: If a commit fails for a board, disable
incremental building for the next commit we build for that
board, so that we will see all warnings/errors again.
+ force_build_failures: If a previously-built build (i.e. built on
+ a previous run of buildman) is marked as failed, rebuild it.
git_dir: Git directory containing source repository
last_line_len: Length of the last line we printed (used for erasing
it with new progress information)
toolchains: Toolchains object to use for building
upto: Current commit number we are building (0.count-1)
warned: Number of builds that produced at least one warning
+ force_reconfig: Reconfigure U-Boot on each comiit. This disables
+ incremental building, where buildman reconfigures on the first
+ commit for a baord, and then just does an incremental build for
+ the following commits. In fact buildman will reconfigure and
+ retry for any failing commits, so generally the only effect of
+ this option is to slow things down.
+ in_tree: Build U-Boot in-tree instead of specifying an output
+ directory separate from the source code. This option is really
+ only useful for testing in-tree builds.
Private members:
_base_board_dict: Last-summarised Dict of boards
self._complete_delay = None
self._next_delay_update = datetime.now()
self.force_config_on_failure = True
+ self.force_build_failures = False
+ self.force_reconfig = False
self._step = step
+ self.in_tree = False
self.col = terminal.Color()
help='Show changes in function code size for each board')
parser.add_option('-c', '--count', dest='count', type='int',
default=-1, help='Run build on the top n commits')
+parser.add_option('-C', '--force-reconfig', dest='force_reconfig',
+ action='store_true', default=False,
+ help='Reconfigure for every commit (disable incremental build)')
parser.add_option('-e', '--show_errors', action='store_true',
default=False, help='Show errors and warnings')
parser.add_option('-f', '--force-build', dest='force_build',
action='store_true', default=False,
help='Force build of boards even if already built')
+parser.add_option('-F', '--force-build-failures', dest='force_build_failures',
+ action='store_true', default=False,
+ help='Force build of previously-failed build')
parser.add_option('-d', '--detail', dest='show_detail',
action='store_true', default=False,
help='Show detailed information for each board in summary')
help='Git repo containing branch to build', default='.')
parser.add_option('-H', '--full-help', action='store_true', dest='full_help',
default=False, help='Display the README file')
+parser.add_option('-i', '--in-tree', dest='in_tree',
+ action='store_true', default=False,
+ help='Build in the source tree instead of a separate directory')
parser.add_option('-j', '--jobs', dest='jobs', type='int',
default=None, help='Number of jobs to run at once (passed to make)')
parser.add_option('-k', '--keep-outputs', action='store_true',
ShowActions(series, why_selected, selected, builder, options)
else:
builder.force_build = options.force_build
+ builder.force_build_failures = options.force_build_failures
+ builder.force_reconfig = options.force_reconfig
+ builder.in_tree = options.in_tree
# Work out which boards to build
board_selected = boards.GetSelectedDict()
"""
to = BuildEmailList(series.get('to'), '--to', alias, raise_on_error)
if not to:
- print ("No recipient, please add something like this to a commit\n"
- "Series-to: Fred Bloggs <f.blogs@napier.co.nz>")
- return
+ git_config_to = command.Output('git', 'config', 'sendemail.to')
+ if not git_config_to:
+ print ("No recipient.\n"
+ "Please add something like this to a commit\n"
+ "Series-to: Fred Bloggs <f.blogs@napier.co.nz>\n"
+ "Or do something like this\n"
+ "git config sendemail.to u-boot@lists.denx.de")
+ return
cc = BuildEmailList(series.get('cc'), '--cc', alias, raise_on_error)
if self_only:
to = BuildEmailList([os.getenv('USER')], '--to', alias, raise_on_error)
projects / people / ms / u-boot.git / commitdiff
