]> git.ipfire.org Git - thirdparty/util-linux.git/commitdiff
lscpu: Fix loongarch op-mode output with recent kernel
authorXi Ruoyao <xry111@xry111.site>
Thu, 22 May 2025 05:04:48 +0000 (13:04 +0800)
committerXi Ruoyao <xry111@xry111.site>
Thu, 22 May 2025 05:06:44 +0000 (13:06 +0800)
Since Linux-6.12, the "loongarch32" item in the ISA field is separated
to "loongarch32r" and "loongarch32s," breaking our expectation.

Link: https://git.kernel.org/torvalds/c/34e3c4500cdc
Signed-off-by: Xi Ruoyao <xry111@xry111.site>
sys-utils/lscpu-cputype.c
tests/expected/lscpu/lscpu-loongarch-kvm_on_loongson_3c6000 [new file with mode: 0644]
tests/ts/lscpu/dumps/loongarch-kvm_on_loongson_3c6000.tar.gz [new file with mode: 0644]

index 0626df6a0cdff9582a9fd4c631ce9f213e32e924..50eec6a373e41a7cee26df01582bf4c883717baf 100644 (file)
@@ -773,7 +773,9 @@ struct lscpu_arch *lscpu_read_architecture(struct lscpu_cxt *cxt)
                char buf[BUFSIZ];
 
                snprintf(buf, sizeof(buf), " %s ", ct->isa);
-               if (strstr(buf, " loongarch32 "))
+               if (strstr(buf, " loongarch32 ")
+                   || strstr(buf, " loongarch32s ")
+                   || strstr(buf, " loongarch32r "))
                        ar->bit32 = 1;
                if (strstr(buf, " loongarch64 "))
                        ar->bit64 = 1;
diff --git a/tests/expected/lscpu/lscpu-loongarch-kvm_on_loongson_3c6000 b/tests/expected/lscpu/lscpu-loongarch-kvm_on_loongson_3c6000
new file mode 100644 (file)
index 0000000..564a501
--- /dev/null
@@ -0,0 +1,108 @@
+CPU op-mode(s):                       32-bit, 64-bit
+Address sizes:                        48 bits physical, 48 bits virtual
+Byte Order:                           Little Endian
+CPU(s):                               32
+On-line CPU(s) list:                  0-31
+Model name:                           Loongson-3A5000
+CPU family:                           Loongson-64bit
+Model:                                0x10
+Thread(s) per core:                   1
+Core(s) per socket:                   1
+Socket(s):                            32
+BogoMIPS:                             4000.00
+Flags:                                cpucfg lam ual fpu lsx lasx crc32 lspw lbt_x86 lbt_arm lbt_mips
+L1d cache:                            2 MiB (32 instances)
+L1i cache:                            2 MiB (32 instances)
+L2 cache:                             8 MiB (32 instances)
+L3 cache:                             16 MiB (1 instance)
+NUMA node(s):                         1
+NUMA node0 CPU(s):                    0-31
+Vulnerability Gather data sampling:   Not affected
+Vulnerability Ghostwrite:             Not affected
+Vulnerability Itlb multihit:          Not affected
+Vulnerability L1tf:                   Not affected
+Vulnerability Mds:                    Not affected
+Vulnerability Meltdown:               Not affected
+Vulnerability Mmio stale data:        Not affected
+Vulnerability Reg file data sampling: Not affected
+Vulnerability Retbleed:               Not affected
+Vulnerability Spec rstack overflow:   Not affected
+Vulnerability Spec store bypass:      Not affected
+Vulnerability Spectre v1:             Not affected
+Vulnerability Spectre v2:             Not affected
+Vulnerability Srbds:                  Not affected
+Vulnerability Tsx async abort:        Not affected
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting usually from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,1,0,,1,1,1,0
+2,2,2,0,,2,2,2,0
+3,3,3,0,,3,3,3,0
+4,4,4,0,,4,4,4,0
+5,5,5,0,,5,5,5,0
+6,6,6,0,,6,6,6,0
+7,7,7,0,,7,7,7,0
+8,8,8,0,,8,8,8,0
+9,9,9,0,,9,9,9,0
+10,10,10,0,,10,10,10,0
+11,11,11,0,,11,11,11,0
+12,12,12,0,,12,12,12,0
+13,13,13,0,,13,13,13,0
+14,14,14,0,,14,14,14,0
+15,15,15,0,,15,15,15,0
+16,16,16,0,,16,16,16,0
+17,17,17,0,,17,17,17,0
+18,18,18,0,,18,18,18,0
+19,19,19,0,,19,19,19,0
+20,20,20,0,,20,20,20,0
+21,21,21,0,,21,21,21,0
+22,22,22,0,,22,22,22,0
+23,23,23,0,,23,23,23,0
+24,24,24,0,,24,24,24,0
+25,25,25,0,,25,25,25,0
+26,26,26,0,,26,26,26,0
+27,27,27,0,,27,27,27,0
+28,28,28,0,,28,28,28,0
+29,29,29,0,,29,29,29,0
+30,30,30,0,,30,30,30,0
+31,31,31,0,,31,31,31,0
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting usually from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,0,,0,0,0,0
+1,1,1,0,,1,1,1,0
+2,2,2,0,,2,2,2,0
+3,3,3,0,,3,3,3,0
+4,4,4,0,,4,4,4,0
+5,5,5,0,,5,5,5,0
+6,6,6,0,,6,6,6,0
+7,7,7,0,,7,7,7,0
+8,8,8,0,,8,8,8,0
+9,9,9,0,,9,9,9,0
+10,10,10,0,,10,10,10,0
+11,11,11,0,,11,11,11,0
+12,12,12,0,,12,12,12,0
+13,13,13,0,,13,13,13,0
+14,14,14,0,,14,14,14,0
+15,15,15,0,,15,15,15,0
+16,16,16,0,,16,16,16,0
+17,17,17,0,,17,17,17,0
+18,18,18,0,,18,18,18,0
+19,19,19,0,,19,19,19,0
+20,20,20,0,,20,20,20,0
+21,21,21,0,,21,21,21,0
+22,22,22,0,,22,22,22,0
+23,23,23,0,,23,23,23,0
+24,24,24,0,,24,24,24,0
+25,25,25,0,,25,25,25,0
+26,26,26,0,,26,26,26,0
+27,27,27,0,,27,27,27,0
+28,28,28,0,,28,28,28,0
+29,29,29,0,,29,29,29,0
+30,30,30,0,,30,30,30,0
+31,31,31,0,,31,31,31,0
diff --git a/tests/ts/lscpu/dumps/loongarch-kvm_on_loongson_3c6000.tar.gz b/tests/ts/lscpu/dumps/loongarch-kvm_on_loongson_3c6000.tar.gz
new file mode 100644 (file)
index 0000000..84ed103
Binary files /dev/null and b/tests/ts/lscpu/dumps/loongarch-kvm_on_loongson_3c6000.tar.gz differ