tests: add dump from ARM with A510+A710+A715+X3

Signed-off-by: Karel Zak <kzak@redhat.com>

diff --git a/tests/expected/lscpu/lscpu-arm-A510-A710-A715-X3 b/tests/expected/lscpu/lscpu-arm-A510-A710-A715-X3
new file mode 100644 (file)
index 0000000..c67aafe
--- /dev/null
+++ b/tests/expected/lscpu/lscpu-arm-A510-A710-A715-X3
@@ -0,0 +1,83 @@
+CPU(s):                          8
+On-line CPU(s) list:             0-7
+Vendor ID:                       ARM
+Model name:                      Cortex-A510
+Model:                           1
+Thread(s) per core:              1
+Core(s) per socket:              3
+Socket(s):                       1
+Stepping:                        r1p1
+Frequency boost:                 enabled
+CPU(s) scaling MHz:              50%
+CPU max MHz:                     2016.0000
+CPU min MHz:                     307.2000
+BogoMIPS:                        38.40
+Flags:                           fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bf16 bti
+Model name:                      Cortex-A710
+Model:                           0
+Thread(s) per core:              1
+Core(s) per socket:              2
+Socket(s):                       1
+Stepping:                        r2p0
+CPU(s) scaling MHz:              38%
+CPU max MHz:                     2803.2000
+CPU min MHz:                     499.2000
+BogoMIPS:                        38.40
+Flags:                           fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bf16 bti
+Model name:                      Cortex-A715
+Model:                           0
+Thread(s) per core:              1
+Core(s) per socket:              2
+Socket(s):                       1
+Stepping:                        r1p0
+CPU(s) scaling MHz:              38%
+CPU max MHz:                     2803.2000
+CPU min MHz:                     499.2000
+BogoMIPS:                        38.40
+Flags:                           fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bf16 bti
+Model name:                      Cortex-X3
+Model:                           0
+Thread(s) per core:              1
+Core(s) per socket:              1
+Socket(s):                       1
+Stepping:                        r1p0
+CPU(s) scaling MHz:              27%
+CPU max MHz:                     3187.2000
+CPU min MHz:                     595.2000
+BogoMIPS:                        38.40
+Flags:                           fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp asimdhp cpuid asimdrdm jscvt fcma lrcpc dcpop sha3 sm3 sm4 asimddp sha512 asimdfhm dit uscat ilrcpc flagm ssbs sb paca pacg dcpodp flagm2 frint i8mm bf16 bti
+Vulnerability Itlb multihit:     Not affected
+Vulnerability L1tf:              Not affected
+Vulnerability Mds:               Not affected
+Vulnerability Meltdown:          Not affected
+Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl
+Vulnerability Spectre v1:        Mitigation; __user pointer sanitization
+Vulnerability Spectre v2:        Vulnerable: Unprivileged eBPF enabled
+Vulnerability Srbds:             Not affected
+Vulnerability Tsx async abort:   Not affected
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting usually from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,,,0,0,0,0
+1,1,0,,,1,1,1,0
+2,2,0,,,2,2,1,0
+3,0,0,,,3,3,2,0
+4,1,0,,,4,4,3,0
+5,0,0,,,5,5,4,0
+6,1,0,,,6,6,5,0
+7,0,0,,,7,7,6,0
+
+# The following is the parsable format, which can be fed to other
+# programs. Each different item in every column has an unique ID
+# starting usually from zero.
+# CPU,Core,Socket,Node,,L1d,L1i,L2,L3
+0,0,0,,,0,0,0,0
+1,1,0,,,1,1,1,0
+2,2,0,,,2,2,1,0
+3,0,1,,,3,3,2,0
+4,1,1,,,4,4,3,0
+5,2,1,,,5,5,4,0
+6,3,1,,,6,6,5,0
+7,0,2,,,7,7,6,0

diff --git a/tests/ts/lscpu/dumps/arm-A510-A710-A715-X3.tar.gz b/tests/ts/lscpu/dumps/arm-A510-A710-A715-X3.tar.gz
new file mode 100644 (file)
index 0000000..05ad0c2
Binary files /dev/null and b/tests/ts/lscpu/dumps/arm-A510-A710-A715-X3.tar.gz differ