The clock source for master clock can be slow clock, main clock,
plla clock or upll clock. So, make the clock source selection
field in mckr can be configured.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
u32 tmp;
tmp = readl(&pmc->mckr);
- tmp &= ~(AT91_PMC_MCKR_PRES_MASK |
+ tmp &= ~(AT91_PMC_MCKR_CSS_MASK |
+ AT91_PMC_MCKR_PRES_MASK |
AT91_PMC_MCKR_MDIV_MASK |
AT91_PMC_MCKR_PLLADIV_2);
- tmp |= mckr & (AT91_PMC_MCKR_PRES_MASK |
+ tmp |= mckr & (AT91_PMC_MCKR_CSS_MASK |
+ AT91_PMC_MCKR_PRES_MASK |
AT91_PMC_MCKR_MDIV_MASK |
AT91_PMC_MCKR_PLLADIV_2);
writel(tmp, &pmc->mckr);