sys-utils/lscpu-virt.c \
sys-utils/lscpu-arm.c \
sys-utils/lscpu-dmi.c \
+ sys-utils/lscpu-riscv.c \
sys-utils/lscpu.h
lscpu_LDADD = $(LDADD) libcommon.la libsmartcols.la $(RTAS_LIBS)
lscpu_CFLAGS = $(AM_CFLAGS) -I$(ul_libsmartcols_incdir)
DEF_PAT_CPUTYPE( "family", PAT_FAMILY, family),
DEF_PAT_CPUTYPE( "features", PAT_FEATURES, flags), /* s390 */
DEF_PAT_CPUTYPE( "flags", PAT_FLAGS, flags), /* x86 */
+ DEF_PAT_CPUTYPE( "isa", PAT_ISA, isa), /* riscv */
DEF_PAT_CPUTYPE( "marchid", PAT_FAMILY, family), /* riscv */
DEF_PAT_CPUTYPE( "max thread id", PAT_MAX_THREAD_ID, mtid), /* s390 */
DEF_PAT_CPUTYPE( "mimpid", PAT_MODEL, model), /* riscv */
--- /dev/null
+/*
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * Copyright (C) 2025 Ventana Micro Systems Inc.
+ *
+ */
+#include "lscpu.h"
+#include "strutils.h"
+#include "strv.h"
+
+static int riscv_cmp_func(const void *a, const void *b)
+{
+ return strcmp(*(const char **)a, *(const char **)b);
+}
+
+bool is_riscv(struct lscpu_cputype *ct)
+{
+ const char *base_isa[] = {"rv32", "rv64", "rv128"};
+ size_t i;
+
+ for (i = 0; i < ARRAY_SIZE(base_isa); i++) {
+ if (!strncasecmp(ct->isa, base_isa[i], strlen(base_isa[i])))
+ return true;
+ }
+
+ return false;
+}
+
+/*
+ * Reformat the isa string, but the length stays the same.
+ */
+void lscpu_format_isa_riscv(struct lscpu_cputype *ct)
+{
+ char **split;
+ size_t i;
+
+ split = strv_split(ct->isa, "_");
+
+ /* Sort multi-letter extensions alphabetically */
+ if (strv_length(split) > 1)
+ qsort(&split[1], strv_length(split) - 1, sizeof(char *), riscv_cmp_func);
+
+ /* Keep Base ISA and single-letter extensions at the start */
+ strcpy(ct->isa, split[0]);
+
+ for (i = 1; i < strv_length(split); i++) {
+ strcat(ct->isa, " ");
+ strcat(ct->isa, split[i]);
+ }
+
+ strv_free(split);
+}
if (ct->flags)
add_summary_s(tb, sec, _("Flags:"), ct->flags);
+
+ if (ct->isa && is_riscv(ct)) {
+ lscpu_format_isa_riscv(ct);
+ add_summary_s(tb, sec, _("ISA:"), ct->isa);
+ }
}
/*
CPU_ISSET_S((_cpu)->logical_id, (_cxt)->setsize, (_cxt)->present))
int is_arm(struct lscpu_cxt *cxt);
+bool is_riscv(struct lscpu_cputype *ct);
struct lscpu_cputype *lscpu_new_cputype(void);
void lscpu_ref_cputype(struct lscpu_cputype *ct);
struct lscpu_cpu *lscpu_cpus_loopup_by_type(struct lscpu_cxt *cxt, struct lscpu_cputype *ct);
void lscpu_decode_arm(struct lscpu_cxt *cxt);
+void lscpu_format_isa_riscv(struct lscpu_cputype *ct);
int lookup(char *line, char *pattern, char **value);
'lscpu-virt.c',
'lscpu-arm.c',
'lscpu-dmi.c',
+ 'lscpu-riscv.c',
)
lscpu_manadocs = files('lscpu.1.adoc')