#define IMSM_OROM_CAPABILITIES_ReadPatrol (1 << 6)
#define IMSM_OROM_CAPABILITIES_XorHw (1 << 7)
#define IMSM_OROM_CAPABILITIES_SKUMode ((1 << 8)|(1 << 9))
+ #define IMSM_OROM_CAPABILITIES_SKUMode_LOW ((1 << 8) | (1 << 9))
+ #define IMSM_OROM_CAPABILITIES_SKUMode_LOW_SHIFT 8
#define IMSM_OROM_CAPABILITIES_TPV (1 << 10)
+ #define IMSM_OROM_CAPABILITIES_SKUMode_HIGH ((1 << 11) | (1 << 12))
+ #define IMSM_OROM_CAPABILITIES_SKUMode_HIGH_SHIFT 9
+ #define IMSM_OROM_CAPABILITIES_SKUMode_NON_PRODUCTION (1 << 13)
} __attribute__((packed));
/* IMSM metadata requirements for each level */
int dev_idx;
};
+enum imsm_sku {
+ SKU_NO_KEY = 0,
+ SKU_STANDARD_KEY = 1,
+ SKU_PREMIUM_KEY = 2,
+ SKU_INTEL_SSD_ONLY_KEY = 3,
+ SKU_RAID1_ONLY_KEY = 4
+};
+
static const char *_sys_dev_type[] = {
[SYS_DEV_UNKNOWN] = "Unknown",
[SYS_DEV_SAS] = "SAS",
printf("%s ", imsm_level_ops[idx].name);
}
+static void print_imsm_sku_capability(const struct imsm_orom *orom)
+{
+ int key_val;
+
+ key_val = (orom->driver_features & IMSM_OROM_CAPABILITIES_SKUMode_LOW) >>
+ IMSM_OROM_CAPABILITIES_SKUMode_LOW_SHIFT;
+ key_val |= (orom->driver_features & IMSM_OROM_CAPABILITIES_SKUMode_HIGH) >>
+ IMSM_OROM_CAPABILITIES_SKUMode_HIGH_SHIFT;
+
+ switch (key_val) {
+ case SKU_NO_KEY:
+ printf("Pass-through");
+ break;
+ case SKU_STANDARD_KEY:
+ printf("Standard");
+ break;
+ case SKU_PREMIUM_KEY:
+ printf("Premium");
+ break;
+ case SKU_INTEL_SSD_ONLY_KEY:
+ printf("Intel-SSD-only");
+ break;
+ case SKU_RAID1_ONLY_KEY:
+ printf("RAID1 Only");
+ break;
+ default:
+ printf("Unknown");
+ }
+
+ if (orom->driver_features & IMSM_OROM_CAPABILITIES_SKUMode_NON_PRODUCTION)
+ printf(" - for evaluation only");
+}
+
static void print_imsm_chunk_size_capability(const struct imsm_orom *orom)
{
int idx;
orom->hotfix_ver, orom->build);
}
+ if (entry->type == SYS_DEV_VMD) {
+ printf(" License : ");
+ print_imsm_sku_capability(orom);
+ printf("\n");
+ }
+
printf(" RAID Levels : ");
print_imsm_level_capability(orom);
printf("\n");