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[thirdparty/gcc.git] / gcc / config / aarch64 / constraints.md
2024-01-03  Jakub JelinekUpdate copyright years.
2023-12-07  Richard Sandifordaarch64: Add an early RA for strided registers
2023-12-05  Richard Sandifordaarch64: Add support for SME2 intrinsics
2023-12-05  Richard Sandifordaarch64: Add svboolx2_t
2023-12-05  Richard Sandifordaarch64: Add support for <arm_sme.h>
2023-12-05  Richard Sandifordaarch64: Add support for SME ZA attributes
2023-12-05  Richard Sandifordaarch64: Use SVE's RDVL instruction
2023-11-09  Tamar ChristinaAArch64: Add special patterns for creating DI scalar...
2023-08-04  Tamar ChristinaAArch64: Undo vec_widen_<sur>shiftl optabs [PR106346]
2023-04-25  Victor Do Nascimentoaarch64: Leveraging the use of STP instruction for...
2023-01-16  Jakub JelinekUpdate copyright years.
2022-12-06  Wilco DijkstraAArch64: Cleanup move immediate code
2022-11-14  Kyrylo Tkachovaarch64: Add support for +cssc
2022-01-03  Jakub JelinekUpdate copyright years.
2021-11-05  Wilco DijkstraAArch64: Fix PR103085
2021-11-03  Wilco DijkstraAArch64: Improve GOT addressing
2021-10-20  Tamar ChristinaAArch64: Add pattern for sshr to cmlt
2021-04-28  Richard Sandifordaarch64: Fix address mode for vec_concat pattern [PR100305]
2021-03-23  Vladimir N. Makarov[PR99581] Use relaxed memory for more aarch64 memory...
2021-03-22  Vladimir N. Makarov[PR99581] Define relaxed memory and use it for aarch64
2021-01-04  Jakub JelinekUpdate copyright years.
2020-07-09  Matthew Malcomsonaarch64: Mitigate SLS for BLR instruction
2020-03-31  Jakub Jelinekaarch64: Fix up aarch64_compare_and_swaphi pattern...
2020-01-17  Matthew Malcomson[AArch64] [SVE] Implement svld1ro intrinsic.
2020-01-01  Jakub JelinekUpdate copyright years.
2019-11-14  Richard Hendersonaarch64: Add "c" constraint
2019-10-29  Richard Sandiford[AArch64] Add support for arm_sve.h
2019-08-19  Joel Hutton[AArch64] Use scvtf fbits option where appropriate
2019-08-15  Richard Sandiford[AArch64] Rework SVE INC/DEC handling
2019-08-15  Richard Sandiford[AArch64] Use SVE binary immediate instructions for...
2019-08-14  Richard Sandiford[AArch64] Make more use of SVE conditional constant...
2019-08-14  Richard Sandiford[AArch64] Add support for SVE F{MAX,MIN}NM immediate
2019-08-14  Richard Sandiford[AArch64] Add support for SVE [SU]{MAX,MIN} immediate
2019-08-13  Richard Sandiford[AArch64] Improve SVE constant moves
2019-08-13  Richard Sandiford[AArch64] Add a "y" constraint for V0-V7
2019-08-07  Richard Sandiford[AArch64] Fix INSR for zero floats
2019-01-01  Jakub JelinekUpdate copyright years.
2018-09-19  Matthew Malcomson[AARCH64] Use STLUR for atomic_store
2018-09-13  Sam Tebbs[Aarch64] Exploiting BFXIL when OR-ing two AND-operatio...
2018-07-19  Andre Vieira[AArch64][PATCH 1/2] Fix addressing printing of LDP/STP
2018-04-27  Kyrylo Tkachov[AArch64] PR target/85512: Tighten SIMD right shift...
2018-04-24  Kyrylo Tkachov[AArch64] PR target/85512: Tighten SIMD right shift...
2018-02-01  Renlin Li[PR83370][AARCH64]Use tighter register constraint for...
2018-01-17  Wilco Dijkstra[AArch64] PR82964: Fix 128-bit immediate ICEs
2018-01-13  Richard Sandiford[AArch64] SVE load/store_lanes support
2018-01-13  Richard Sandiford[AArch64] Add SVE support
2018-01-11  Michael Collisonaarch64-modes.def (V2HF): New VECTOR_MODE.
2018-01-03  Richard Sandiford[AArch64] Rewrite aarch64_simd_valid_immediate
2018-01-03  Jakub JelinekUpdate copyright years.
2017-12-21  Richard Sandiford[AArch64] Tweak aarch64_classify_address interface
2017-11-08  Kyrylo Tkachov[AArch64] Add STP pattern to store a vec_concat of...
2017-11-08  Kyrylo Tkachovvec_merge + vec_duplicate + vec_concat simplification
2017-11-01  Richard Sandiford[AArch64] Rename the internal "Upl" constraint
2017-10-04  Sudakshina Das[PATCH][AArch64] Add BIC-imm and ORR-imm SIMD pattern
2017-09-13  Jackson Woodruff[AArch64, PATCH] Improve Neon store of zero
2017-07-28  Tamar Christina2017-07-28 Tamar Christina <tamar.christina@arm.com>
2017-05-15  Renlin Li[PATCH][AARCH64]Simplify call, call_value, sibcall...
2017-05-08  Richard Sandiford[AArch64] Tighten move constraints for symbolic operands
2017-05-04  Kyrylo Tkachov[AArch64] Accept more addressing modes for PRFM
2017-01-01  Jakub JelinekUpdate copyright years.
2016-11-23  Michael Collison2016-11-22 Michael Collison <michael.collison@arm...
2016-01-18  Richard Hendersonre PR target/69176 (ICE in in final_scan_insn, at final...
2016-01-04  Jakub JelinekUpdate copyright years.
2015-09-28  Jiong Wang[AArch64] Revert "Improve TLS Descriptor pattern to...
2015-08-10  Ramana Radhakrishnan[AArch64] Recommit correct version for improving TLS...
2015-08-06  Jiong Wang[AArch64] Tighten direct call pattern for sibcall to...
2015-01-05  Jakub JelinekUpdate copyright years.
2014-11-17  Zhenqiang Chenconstraints.md (Usn, [...]): New constraints.
2014-05-23  Jiong Wang[AARCH64] Support tail indirect function call.
2014-01-02  Richard SandifordUpdate copyright years in gcc/
2013-06-04  Ian BoltonAArch64 - Improve MOVI handling (3/5)
2013-06-04  Ian BoltonAArch64 - Improve MOVI handling (2/5)
2013-05-23  Chris Schlumberger... [AArch64] Remove Usa constraint.
2013-04-02  Sofiane Naciaarch64.md (*mov<mode>_aarch64): Add alternatives for...
2013-01-10  Richard SandifordUpdate copyright years in gcc/
2013-01-07  James Greenhalgh[AARCH64] Add support for vector and scalar floating...
2012-11-12  Ian BoltonUse CSINC instead of CSEL to return 1 (AArch64)
2012-10-23  Ian BoltonAArch64 [3/10]