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2 years agotree-optimization/110777 - abnormals and recent PRE optimization
Richard Biener [Mon, 24 Jul 2023 06:55:11 +0000 (08:55 +0200)] 
tree-optimization/110777 - abnormals and recent PRE optimization

The following avoids propagating abnormals with the recent tweak
to look through PRE introduced copies between equal values.

PR tree-optimization/110777
* tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
Avoid propagating abnormals.

* gcc.dg/pr110777.c: New testcase.

2 years agotree-optimization/110766 - missing PHI location check
Richard Biener [Mon, 24 Jul 2023 06:40:19 +0000 (08:40 +0200)] 
tree-optimization/110766 - missing PHI location check

The following adds a missing PHI location check before querying
the loop latch PHI arg from it.

PR tree-optimization/110766
* tree-scalar-evolution.cc
(analyze_and_compute_bitwise_induction_effect): Check the PHI
is defined in the loop header.

* gcc.dg/torture/pr110766.c: New testcase.

2 years agovect: Don't vectorize a single scalar iteration loop [PR110740]
Kewen Lin [Mon, 24 Jul 2023 06:20:30 +0000 (01:20 -0500)] 
vect: Don't vectorize a single scalar iteration loop [PR110740]

The function vect_update_epilogue_niters which has been
removed by r14-2281 has some code taking care of that if
there is only one scalar iteration left for epilogue then
we won't try to vectorize it any more.

Although costing should be able to care about it eventually,
I think we still want this special casing without costing
enabled, so this patch is to add it back in function
vect_analyze_loop_costing, and make it more general for
both main and epilogue loops as Richi suggested, it can fix
some exposed failures on Power10:

 - gcc.target/powerpc/p9-vec-length-epil-{1,8}.c
 - gcc.dg/vect/slp-perm-{1,5,6,7}.c

PR tree-optimization/110740

gcc/ChangeLog:

* tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
loop with a single scalar iteration.

2 years agoRISC-V: Bugfix for allowing incorrect dyn for static rounding
Pan Li [Fri, 21 Jul 2023 08:50:08 +0000 (16:50 +0800)] 
RISC-V: Bugfix for allowing incorrect dyn for static rounding

According to the spec, dyn rounding mode is invalid for RVV
floating-point, this patch would like to fix this.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/riscv-vector-builtins-shapes.cc
(struct alu_frm_def): Take range check.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/float-point-frm-error.c: Update cases.
* gcc.target/riscv/rvv/base/float-point-frm-insert-6.c: Removed.

2 years agoDaily bump.
GCC Administrator [Mon, 24 Jul 2023 00:16:51 +0000 (00:16 +0000)] 
Daily bump.

2 years agoFix PR 110066: crash with -pg -static on riscv
Andrew Pinski [Sat, 22 Jul 2023 15:52:42 +0000 (08:52 -0700)] 
Fix PR 110066: crash with -pg -static on riscv

The problem -fasynchronous-unwind-tables is on by default for riscv linux
We need turn it off for crt*.o because it would make __EH_FRAME_BEGIN__ point
to .eh_frame data from crtbeginT.o instead of the user-defined object
during static linking.

This turns it off.

OK?

libgcc/ChangeLog:

* config.host (riscv*-*-linux*): Add t-crtstuff to tmake_file.
(riscv*-*-freebsd*): Likewise.
* config/riscv/t-crtstuff: New file.

2 years agoDaily bump.
GCC Administrator [Sun, 23 Jul 2023 00:17:30 +0000 (00:17 +0000)] 
Daily bump.

2 years agoRISC-V: optim const DF +0.0 store to mem [PR/110748]
Vineet Gupta [Thu, 20 Jul 2023 18:15:37 +0000 (11:15 -0700)] 
RISC-V: optim const DF +0.0 store to mem [PR/110748]

Fixes: ef85d150b5963 ("RISC-V: Enable TARGET_SUPPORTS_WIDE_INT")
DF +0.0 is bitwise all zeros so int x0 store to mem can be used to optimize it.

void zd(double *) { *d = 0.0; }

currently:

| fmv.d.x fa5,zero
| fsd     fa5,0(a0)
| ret

With patch

| sd      zero,0(a0)
| ret

The fix updates predicate const_0_operand() so reg_or_0_operand () now
includes const_double, enabling movdf expander -> riscv_legitimize_move ()
to generate below vs. an intermediate set (reg:DF) const_double:DF

| (insn 6 3 0 2 (set (mem:DF (reg/v/f:DI 134 [ d ])
|        (const_double:DF 0.0 [0x0.0p+0]))

This change also enables such insns to be recog() by later passes.
The md pattern "*movdf_hardfloat_rv64" despite already supporting the
needed constraints {"m","G"} mem/const 0.0 was failing to match because
the additional condition check reg_or_0_operand() was failing due to
missing const_double.

This failure to recog() was triggering an ICE when testing the in-flight
f-m-o patches and is how all of this started, but then was deemed to be
an independent optimization of it's own [1].

[1] https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624857.html

Its worthwhile to note all the set peices were already there and working
up until my own commit mentioned at top regressed the whole thing.

Ran thru full multilib testsuite and no surprises. There was 1 false
failure due to random string "lw" appearing in lto build assembler output,
which is also fixed here.

gcc/ChangeLog:

PR target/110748
* config/riscv/predicates.md (const_0_operand): Add back
const_double.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/pr110748-1.c: New Test.
* gcc.target/riscv/xtheadfmv-fmv.c: Add '\t' around test
patterns to avoid random string matches.

Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
2 years agoi386: Don't use insvti_{high,low}part with -O0 (for compile-time).
Roger Sayle [Sat, 22 Jul 2023 20:52:55 +0000 (21:52 +0100)] 
i386: Don't use insvti_{high,low}part with -O0 (for compile-time).

This patch attempts to help with PR rtl-optimization/110587, a regression
of -O0 compile time for the pathological pr28071.c.  My recent patch helps
a bit, but hasn't returned -O0 compile-time to where it was before my
ix86_expand_move changes.  The obvious solution/workaround is to guard
these new TImode parameter passing optimizations with "&& optimize", so
they don't trigger when compiling with -O0.  The very minor complication
is that "&& optimize" alone leads to the regression of pr110533.c, where
our improved TImode parameter passing fixes a wrong-code issue with naked
functions, importantly, when compiling with -O0.  This should explain
the one line fix below "&& (optimize || ix86_function_naked (cfun))".

I've an additional fix/tweak or two for this compile-time issue, but
this change eliminates the part of the regression that I've caused.

2023-07-22  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
* config/i386/i386-expand.cc (ix86_expand_move): Disable the
64-bit insertions into TImode optimizations with -O0, unless
the function has the "naked" attribute (for PR target/110533).

2 years agoFix alpha building
Andrew Pinski [Sat, 22 Jul 2023 20:34:41 +0000 (20:34 +0000)] 
Fix alpha building

The problem is after r14-2587-gd8105b10fff951, the definition of
extended_count now takes a bool as its last argument but we only
have a declaration for the version which takes an int as the last
argument. This fixes the problem by changing the declaration to be
a bool too.

Committed as obvious after building a cross to alpha-linux-gnu.

gcc/ChangeLog:

PR target/110778
* rtl.h (extended_count): Change last argument type
to bool.

2 years agoi386: Use QImode for offsets in zero_extract/sign_extract in i386.md
Roger Sayle [Sat, 22 Jul 2023 20:50:06 +0000 (21:50 +0100)] 
i386: Use QImode for offsets in zero_extract/sign_extract in i386.md

As suggested by Uros, this patch changes the ZERO_EXTRACTs and SIGN_EXTRACTs
in i386.md to consistently use QImode for bit offsets (i.e. third and fourth
operands), matching the use of QImode for bit counts in shifts and rotates.

There's no change in functionality, and the new patterns simply ensure that
we continue to generate the same code (match revised patterns) as before.

2023-07-22  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
* config/i386/i386.md (extv<mode>): Use QImode for offsets.
(extzv<mode>): Likewise.
(insv<mode>): Likewise.
(*testqi_ext_3): Likewise.
(*btr<mode>_2): Likewise.
(define_split): Likewise.
(*btsq_imm): Likewise.
(*btrq_imm): Likewise.
(*btcq_imm): Likewise.
(define_peephole2 x3): Likewise.
(*bt<mode>): Likewise
(*bt<mode>_mask): New define_insn_and_split.
(*jcc_bt<mode>): Use QImode for offsets.
(*jcc_bt<mode>_1): Delete obsolete pattern.
(*jcc_bt<mode>_mask): Use QImode offsets.
(*jcc_bt<mode>_mask_1): Likewise.
(define_split): Likewise.
(*bt<mode>_setcqi): Likewise.
(*bt<mode>_setncqi): Likewise.
(*bt<mode>_setnc<mode>): Likewise.
(*bt<mode>_setncqi_2): Likewise.
(*bt<mode>_setc<mode>_mask): New define_insn_and_split.
(bmi2_bzhi_<mode>3): Use QImode offsets.
(*bmi2_bzhi_<mode>3): Likewise.
(*bmi2_bzhi_<mode>3_1): Likewise.
(*bmi2_bzhi_<mode>3_1_ccz): Likewise.
(@tbm_bextri_<mode>): Likewise.

2 years agotestsuite: Limit bb-slp-pr95839-v8.c to 64-bit vector targets
Maciej W. Rozycki [Sat, 22 Jul 2023 16:48:09 +0000 (17:48 +0100)] 
testsuite: Limit bb-slp-pr95839-v8.c to 64-bit vector targets

Only run bb-slp-pr95839-v8.c with targets that support vectors of 64
bits, removing regressions with 32-bit x86 targets:

FAIL: gcc.dg/vect/bb-slp-pr95839-v8.c scan-tree-dump slp2 "optimized: basic block"
FAIL: gcc.dg/vect/bb-slp-pr95839-v8.c -flto -ffat-lto-objects  scan-tree-dump slp2 "optimized: basic block"

gcc/testsuite/
* gcc.dg/vect/bb-slp-pr95839-v8.c: Limit to `vect64' targets.

2 years ago[committed] Fix length computation bug in bfin port
Jeff Law [Sat, 22 Jul 2023 15:47:21 +0000 (09:47 -0600)] 
[committed] Fix length computation bug in bfin port

The tester seemed to occasionally ping-pong a compilation failure on the
builtin-bitops-1.c test.  I long suspected it was something like length
computations.

I finally got a few minutes to dig into it, and sure enough the blackfin
port was claiming the "ones" operation was 2 bytes when it is in fact 4 bytes.

This fixes the compilation failure for the builtin-bitops-1.c test.   Sadly,
it doesn't fix any of the other failures on the bfin port.

Committed to the trunk.

gcc/
* config/bfin/bfin.md (ones): Fix length computation.

2 years agoPR modula2/110631 Bugfix to FIO WriteCardinal
Gaius Mulley [Sat, 22 Jul 2023 09:01:02 +0000 (10:01 +0100)] 
PR modula2/110631 Bugfix to FIO WriteCardinal

FIO.WriteCardinal fails to write binary data.  This patch fixes two
bugs in FIO.mod and provides a testcase which writes and reads binary
cardinals.  There was an off by one error when using HIGH (a) to
determine the number of bytes and the dest/src pointers were switched
when calling memcpy.

gcc/m2/ChangeLog:

PR modula2/110631
* gm2-libs/FIO.def (ReadAny): Correct comment as
HIGH (a) + 1 is number of bytes.
(WriteAny): Correct comment as HIGH (a) + 1 is number of
bytes.
* gm2-libs/FIO.mod (ReadAny): Correct comment as
HIGH (a) + 1 is number of bytes.  Also pass HIGH (a) + 1
to BufferedRead.
(WriteAny): Correct comment as HIGH (a) + 1 is number of
bytes. Also pass HIGH (a) + 1 to BufferedWrite.
(BufferedWrite): Rename parameter a to src, rename variable
t to dest.  Correct parameter order to memcpy.

gcc/testsuite/ChangeLog:

PR modula2/110631
* gm2/pimlib/run/pass/testfiobinary.mod: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 years ago[LRA]: Fix sparc bootstrap after recent patch for fp elimination for avr LRA port
Vladimir N. Makarov [Sat, 22 Jul 2023 00:28:50 +0000 (20:28 -0400)] 
[LRA]: Fix sparc bootstrap after recent patch for fp elimination for avr LRA port

The recent patch for fp elimination for avr LRA port modified an assert
which can be wrong for targets using hard frame pointer different from
frame pointer.  Also for such ports spilling pseudos assigned to fp
was wrong too in the new code.  Although this code is not used for any target
currently using LRA except for avr.  Given patch fixes the issues.

gcc/ChangeLog:

* lra-eliminations.cc (update_reg_eliminate): Fix the assert.
(lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
instead of FRAME_POINTER_REGNUM to spill pseudos.

2 years agoDaily bump.
GCC Administrator [Sat, 22 Jul 2023 00:17:44 +0000 (00:17 +0000)] 
Daily bump.

2 years agoRequire target lra in gcc.c-torture/compile/asmgoto-6.c
John David Anglin [Fri, 21 Jul 2023 19:47:35 +0000 (19:47 +0000)] 
Require target lra in gcc.c-torture/compile/asmgoto-6.c

2023-07-21  John David Anglin  <danglin@gcc.gnu.org>

gcc/testsuite/ChangeLog:

* gcc.c-torture/compile/asmgoto-6.c: Require target lra.

2 years agoPR c/110699: Defend against error_mark_node in gimplify.cc.
Roger Sayle [Fri, 21 Jul 2023 19:37:59 +0000 (20:37 +0100)] 
PR c/110699: Defend against error_mark_node in gimplify.cc.

This patch resolves PR c/110669, an ICE-after-error regression, by adding
a check that the array type isn't error_mark_node in gimplify_compound_lval.

2023-07-21  Roger Sayle  <roger@nextmovesoftware.com>
    Richard Biener  <rguenther@suse.de>

gcc/ChangeLog
PR c/110699
* gimplify.cc (gimplify_compound_lval):  If the array's type
is error_mark_node then return GS_ERROR.

gcc/testsuite/ChangeLog
PR c/110699
* gcc.dg/pr110699.c: New test case.

2 years agobpf: pseudo-c assembly dialect support
Cupertino Miranda [Mon, 17 Jul 2023 16:42:42 +0000 (17:42 +0100)] 
bpf: pseudo-c assembly dialect support

New pseudo-c BPF assembly dialect already supported by clang and widely
used in the linux kernel.

gcc/ChangeLog:

PR target/110770
* config/bpf/bpf.opt: Added option -masm=<dialect>.
* config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
* config/bpf/bpf.cc (bpf_print_register): New function.
(bpf_print_register): Support pseudo-c syntax for registers.
(bpf_print_operand_address): Likewise.
* config/bpf/bpf.h (ASM_SPEC): handle -msasm.
(ASSEMBLER_DIALECT): Define.
* config/bpf/bpf.md: Added pseudo-c templates.
* doc/invoke.texi (-masm=): New eBPF option item.

2 years agobpf: fixed template for neg (added second operand)
Cupertino Miranda [Fri, 21 Jul 2023 16:40:07 +0000 (17:40 +0100)] 
bpf: fixed template for neg (added second operand)

This patch fixes define_insn for "neg" to support 2 operands.
Initial implementation assumed the format "neg %0" while the instruction
allows both a destination and source operands. The second operand can
either be a register or an immediate value.

gcc/ChangeLog:

* config/bpf/bpf.md: fixed template for neg instruction.

2 years agoMAINTAINERS: Add myself to write after approval
Cupertino Miranda [Fri, 21 Jul 2023 16:02:12 +0000 (17:02 +0100)] 
MAINTAINERS: Add myself to write after approval

ChangeLog:

* MAINTAINERS: Add myself to write after approval

2 years agoc++: fix ICE with is_really_empty_class [PR110106]
Marek Polacek [Tue, 18 Jul 2023 20:02:21 +0000 (16:02 -0400)] 
c++: fix ICE with is_really_empty_class [PR110106]

is_really_empty_class is liable to crash when it gets an incomplete
or dependent type.  Since r11-557, we pass the yet-uninstantiated
class type S<0> of the PARM_DECL s to is_really_empty_class -- because
of the potential_rvalue_constant_expression -> is_rvalue_constant_expression
change in cp_parser_constant_expression.  Here we're not parsing
a template so we did not check COMPLETE_TYPE_P as we should.

It should work to complete the type before checking COMPLETE_TYPE_P.

PR c++/110106

gcc/cp/ChangeLog:

* constexpr.cc (potential_constant_expression_1): Try to complete the
type when !processing_template_decl.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/noexcept80.C: New test.

2 years agoAvoid scaling flat loop profiles of vectorized loops
Jan Hubicka [Fri, 21 Jul 2023 17:38:26 +0000 (19:38 +0200)] 
Avoid scaling flat loop profiles of vectorized loops

As discussed, when vectorizing loop with static profile, it is not always good idea
to divide the header frequency by vectorization factor because the profile may
not realistically represent the expected number of iterations.  Since in such cases
we default to relatively low iteration counts (based on average for spec2k17), this
will make vectorized loop body look cold.

This patch makes vectorizer to look for flat profiles and only possibly reduce the
profile by known upper bound on iteration counts.

gcc/ChangeLog:

PR target/110727
* tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
profiles by vectorization factor.
(vect_transform_loop): Check for flat profiles.

2 years agoUpdate gcc hr.po
Joseph Myers [Fri, 21 Jul 2023 16:59:54 +0000 (16:59 +0000)] 
Update gcc hr.po

* hr.po: Update.

2 years agoImplement flat loop profile detection
Jan Hubicka [Fri, 21 Jul 2023 15:34:31 +0000 (17:34 +0200)] 
Implement flat loop profile detection

This patch adds maybe_flat_loop_profile which can be used in loop profile udpate
to detect situation where the profile may be unrealistically flat and should
not be dwonscalled after vectorizing, unrolling and other transforms that
assume that loop has high iteration count even if the CFG profile says
otherwise.

Profile is flat if it was statically detected and at that time we had
no idea about actual number of iterations or we artificially capped them.
So the function considers flat all profiles that have guessed or lower
reliability in their count and there is no nb_iteration_bounds/estimate
which would prove that the profile iteration count is high enough.

gcc/ChangeLog:

* cfgloop.h (maybe_flat_loop_profile): Declare
* cfgloopanal.cc (maybe_flat_loop_profile): New function.
* tree-cfg.cc (print_loop_info): Print info about flat profiles.

2 years agoFix gcc.dg/tree-ssa/copy-headers-9.c and gcc.dg/tree-ssa/dce-1.c failures
Jan Hubicka [Fri, 21 Jul 2023 15:31:34 +0000 (17:31 +0200)] 
Fix gcc.dg/tree-ssa/copy-headers-9.c and gcc.dg/tree-ssa/dce-1.c failures

This patch fixes template in the two testcases so it matches the output
correctly.  I did not re-test after last changes in the previous patch,
sorry for that.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/copy-headers-9.c: Fix template for tree-ssa-loop-ch.cc changes.
* gcc.dg/tree-ssa/dce-1.c: Likewise.

2 years agoUse sreal::nearest_int
Jan Hubicka [Fri, 21 Jul 2023 14:50:49 +0000 (16:50 +0200)] 
Use sreal::nearest_int

Fix conversions from sreal to nearest integer.

gcc/ChangeLog:

* cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
* cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
* predict.cc (estimate_bb_frequencies): Likewise.
* profile.cc (branch_prob): Likewise.
* tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise

2 years agoDarwin: Handle linker '-demangle' option.
Iain Sandoe [Thu, 20 Jul 2023 15:37:21 +0000 (16:37 +0100)] 
Darwin: Handle linker '-demangle' option.

Most of the Darwin linkers in use support this option which we will
now pass by default (matching the Xcode clang impl.)>

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
gcc/ChangeLog:

* config.in: Regenerate.
* config/darwin.h (DARWIN_LD_DEMANGLE): New.
(LINK_COMMAND_SPEC_A): Add demangle handling.
* configure: Regenerate.
* configure.ac: Detect linker support for '-demangle'.

2 years agoFix sreal::to_int and implement sreal::to_nearest_int
Jan Hubicka [Fri, 21 Jul 2023 14:44:01 +0000 (16:44 +0200)] 
Fix sreal::to_int and implement sreal::to_nearest_int

while exploring new loop estimate dumps, I noticed that loop iterating 1.8
times by profile is etimated as iterating once instead of 2 by nb_estimate.
While nb_estimate should really be a sreal and I will convert it incrementally,
I found problem is in previous patch doing:

+   *nit = (snit + 0.5).to_int ();

this does not work for sreal because it has only constructor from integer, so
first 0.5 is rounded to 0 and then added to snit.

Some code uses sreal(1, -1) which produces 0.5, but it reuqires unnecessary
addition, so I decided to add to_nearest_int.  Testing it I noticed that to_int
is buggy:
  (sreal(3)/2).to_int () == 1
while
  (sreal(-3)/2).to_int () == -2

Fix is easy, we need to correctly shift in positive values.  This patch fixes
it and adds the to_nearest_int alternative.

gcc/ChangeLog:

* sreal.cc (sreal::to_nearest_int): New.
(sreal_verify_basics): Verify also to_nearest_int.
(verify_aritmetics): Likewise.
(sreal_verify_conversions): New.
(sreal_cc_tests): Call sreal_verify_conversions.
* sreal.h: (sreal::to_nearest_int): Declare

2 years agoloop-ch improvements, part 5
Jan Hubicka [Fri, 21 Jul 2023 12:54:23 +0000 (14:54 +0200)] 
loop-ch improvements, part 5

Currently loop-ch skips all do-while loops.  But when loop is not do-while
in addition to original goal of turining it to do-while it can do additional
things:
 1) move out loop invariant computations
 2) duplicate loop invariant conditionals and eliminate them in loop body.
 3) prove that some exits are always true in first iteration
    and can be skipped

Most of time 1 can be done by lim (exception is when the invariant computation
is conditional). For 2 we however don't really have other place doing it except
for loop unswitching that is more expensive (it will duplicate the loop and
then optimize out one path to non-loop).
3 can be done by loop peeling but it is also more expensive by duplicating full
loop body.

This patch improves heuristics by not giving up on do-while loops and trying
to find sequence of BBs to duplicate to obtain one of goals:
 - turn loop to do-while
 - eliminate invariant conditional in loop body
 - do partial "peeling" as long as code optimizes enough so this does not
   increase code size.

Bootstrapped/regtested x86_64-linux, OK?

gcc/ChangeLog:

* tree-ssa-loop-ch.cc (enum ch_decision): New enum.
(should_duplicate_loop_header_p): Return info on profitability.
(do_while_loop_p): Watch for constant conditionals.
(update_profile_after_ch): Do not sanity check that all
static exits are taken.
(ch_base::copy_headers): Run on all loops.
(pass_ch::process_loop_p): Improve heuristics by handling also
do_while loop and duplicating shortest sequence containing all
winning blocks.

gcc/testsuite/ChangeLog:

* gcc.dg/loop-unswitch-17.c: Disable ch.
* gcc.dg/pr103079.c: Disable ch.
* gcc.dg/tree-ssa/copy-headers-7.c: Update so ch behaves
as expected.
* gcc.dg/tree-ssa/copy-headers.c: Update template.
* gcc.dg/tree-ssa/copy-headers-9.c: New test.

2 years agotree-optimization/41320 - remove bogus XFAILed testcase
Richard Biener [Fri, 21 Jul 2023 11:55:43 +0000 (13:55 +0200)] 
tree-optimization/41320 - remove bogus XFAILed testcase

gcc.dg/tree-ssa/forwprop-12.c looks for reconstruction of an
ARRAY_REF from pointer arithmetic and dereference.  That's not
safe because ARRAY_REFs carry special semantics we later exploit
during data dependence analysis.

The following removes the testcase, closing the bug as WONTFIX.

PR tree-optimization/41320
* gcc.dg/tree-ssa/forwprop-12.c: Remove.

2 years agofinite_loop_p tweak
Jan Hubicka [Fri, 21 Jul 2023 11:57:34 +0000 (13:57 +0200)] 
finite_loop_p tweak

We have finite_p flag in loop structure.  finite_loop_p already know to
use it, but we also may set the flag when we prove loop to be finite by
SCEV analysis to avoid duplicated work.

Bootstrapped/regtested x86_64-linux, OK?

gcc/ChangeLog:

* tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
tests first; update finite_p flag.

2 years agoimprofe loop dumps
Jan Hubicka [Fri, 21 Jul 2023 11:38:29 +0000 (13:38 +0200)] 
improfe loop dumps

we have flow_loop_dump and print_loop. While print_loop was extended to dump
stuff from loop structure we added over years (loop info), flow_loop_dump was not.
-fdump-tree-all files contains flow_loop_dump which makes it hard to see what
metadata we have attached to loop.

This patch unifies dumping of these fields from both functions.  For example for:
int a[100];
main()
{
        for (int i = 0;  i < 10; i++)
                a[i]=i;
}
we now print:
;; Loop 0
;;  header 0, latch 1
;;  depth 0, outer -1
;;  nodes: 0 1 2 3 4 5
;;
;; Loop 1
;;  header 4, latch 3
;;  depth 1, outer 0, finite_p
;;  upper_bound 10
;;  likely_upper_bound 10
;;  estimate 10
;;  iterations by profile: 10.001101 (unreliable)

finite_p, upper_boud, likely_upper_bound estimate and iterations by profile is new.

Bootstrap/regtest on x86_64 in progress. OK if it passes?

Honza

gcc/ChangeLog:

* cfgloop.cc (flow_loop_dump): Use print_loop_info.
* cfgloop.h (print_loop_info): Declare.
* tree-cfg.cc (print_loop_info): Break out from ...; add
printing of missing fields and profile
(print_loop): ... here.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/dce-1.c: Update for new loop dumps.

2 years agoRISC-V: Fix redundant variable declaration.
Juzhe-Zhong [Fri, 21 Jul 2023 09:57:27 +0000 (17:57 +0800)] 
RISC-V: Fix redundant variable declaration.

Notice there is mistake for RISC-V I made in the last patch.
Fix it. Sorry about that.

gcc/ChangeLog:

* config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.

2 years agomh-mingw: drop unused BOOT_CXXFLAGS variable
Sergei Trofimovich [Fri, 21 Jul 2023 07:40:11 +0000 (08:40 +0100)] 
mh-mingw: drop unused BOOT_CXXFLAGS variable

gcc's build system has BOOT_CFLAGS and various STAGE<N>_C{,XX}FLAGS
variables. BOOT_CXXFLAGS is not handled anywhere.

config/

* mh-mingw: Drop assignment of unused BOOT_CXXFLAGS variable.

2 years agocleanup: Change condition order
Juzhe-Zhong [Fri, 21 Jul 2023 02:23:43 +0000 (10:23 +0800)] 
cleanup: Change condition order

Hi, Richard and Richi.

I have double check the recent codes for len && mask support again.

Some places code structure:

if (len_mask_fn)
...
else if (mask_fn)
...

some places code structure:

if (mask_len_fn)
...
else if (mask)

Base on previous review comment from Richi:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/625067.html

len mask stuff should be checked before mask.

So I reorder all condition order to check LEN MASK stuff before MASK.

This is the last clean up patch.

Boostrap and Regression is on the way.

gcc/ChangeLog:

* tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
(vectorizable_operation): Ditto.

2 years agocleanup: make all cond_len_* and mask_len_* consistent on the order of mask and len
Juzhe-Zhong [Fri, 21 Jul 2023 02:09:00 +0000 (10:09 +0800)] 
cleanup: make all cond_len_* and mask_len_* consistent on the order of mask and len

This patch is depending on:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/625121.html

Hi, Richard and Richi.

This patch is to align the order of mask and len.

Currently, According to this piece code:
if (final_len && final_mask)
  call = gimple_build_call_internal (
    IFN_LEN_MASK_GATHER_LOAD, 7, dataref_ptr,
    vec_offset, scale, zero, final_mask, final_len,
    bias);

You can see the order of mask and len, is {mask,len,bias}.
"mask" comes before "len". The reason of this order is that we want to
reuse the current codes of MASK_GATHER_LOAD/MASK_SCATTER_STORE.

Same situation for COND_LEN_*, we want to reuse the codes of COND_*.

Reusing codes from the existing MASK_* or COND_* can allow us not to
change the codes too much and make the codes elegant and easy to maintain && read.

To avoid any confusions of auto-vectorization patterns that includes both mask and len,

this patch align the order of mask and len for both Gimple IR and RTL pattern into

{mask, len, bias} to make everything cleaner and more elegant.

Bootstrap and Regression is on the way.

gcc/ChangeLog:

* config/riscv/autovec.md: Align order of mask and len.
* config/riscv/riscv-v.cc (expand_load_store): Ditto.
(expand_gather_scatter): Ditto.
* doc/md.texi: Ditto.
* internal-fn.cc (add_len_and_mask_args): Ditto.
(add_mask_and_len_args): Ditto.
(expand_partial_load_optab_fn): Ditto.
(expand_partial_store_optab_fn): Ditto.
(expand_scatter_store_optab_fn): Ditto.
(expand_gather_load_optab_fn): Ditto.
(internal_fn_len_index): Ditto.
(internal_fn_mask_index): Ditto.
(internal_len_load_store_bias): Ditto.
* tree-vect-stmts.cc (vectorizable_store): Ditto.
(vectorizable_load): Ditto.

2 years agocleanup: Change LEN_MASK into MASK_LEN
Juzhe-Zhong [Thu, 20 Jul 2023 23:20:04 +0000 (07:20 +0800)] 
cleanup: Change LEN_MASK into MASK_LEN

Hi.

Since start from LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE, COND_LEN_* patterns,
the order of len and mask is {mask,len,bias}.

The reason we make "mask" argument comes before "len" is because we want to keep
the "mask" location same as mask_* or cond_* patterns to make use of current codes flow
of mask_* and cond_*. Otherwise, we will need to change codes much more and make codes
hard to maintain.

Now, we already have COND_LEN_*, it's naturally that we should rename "LEN_MASK" into "MASK_LEN"
to keep name scheme consistent.

This patch only changes the name "LEN_MASK" into "MASK_LEN".
No codes functionality change.

gcc/ChangeLog:

* config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
(mask_len_load<mode><vm>): Ditto.
(len_maskstore<mode><vm>): Ditto.
(mask_len_store<mode><vm>): Ditto.
(len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
(mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
(len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
(mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
(len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
(mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
(len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
(mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
(len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
(mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
(len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
(mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
(len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
(mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
(len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
(mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
(len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
(mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
(len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
(mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
(len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
(mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
(len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
(mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
(len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
(mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
(len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
(mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
* doc/md.texi: Ditto.
* genopinit.cc (main): Ditto.
(CMP_NAME): Ditto. Ditto.
* gimple-fold.cc (arith_overflowed_p): Ditto.
(gimple_fold_partial_load_store_mem_ref): Ditto.
(gimple_fold_call): Ditto.
* internal-fn.cc (len_maskload_direct): Ditto.
(mask_len_load_direct): Ditto.
(len_maskstore_direct): Ditto.
(mask_len_store_direct): Ditto.
(expand_call_mem_ref): Ditto.
(expand_len_maskload_optab_fn): Ditto.
(expand_mask_len_load_optab_fn): Ditto.
(expand_len_maskstore_optab_fn): Ditto.
(expand_mask_len_store_optab_fn): Ditto.
(direct_len_maskload_optab_supported_p): Ditto.
(direct_mask_len_load_optab_supported_p): Ditto.
(direct_len_maskstore_optab_supported_p): Ditto.
(direct_mask_len_store_optab_supported_p): Ditto.
(internal_load_fn_p): Ditto.
(internal_store_fn_p): Ditto.
(internal_gather_scatter_fn_p): Ditto.
(internal_fn_len_index): Ditto.
(internal_fn_mask_index): Ditto.
(internal_fn_stored_value_index): Ditto.
(internal_len_load_store_bias): Ditto.
* internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
(MASK_LEN_GATHER_LOAD): Ditto.
(LEN_MASK_LOAD): Ditto.
(MASK_LEN_LOAD): Ditto.
(LEN_MASK_SCATTER_STORE): Ditto.
(MASK_LEN_SCATTER_STORE): Ditto.
(LEN_MASK_STORE): Ditto.
(MASK_LEN_STORE): Ditto.
* optabs-query.cc (supports_vec_gather_load_p): Ditto.
(supports_vec_scatter_store_p): Ditto.
* optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
(target_supports_len_load_store_p): Ditto.
* optabs.def (OPTAB_CD): Ditto.
* tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
(call_may_clobber_ref_p_1): Ditto.
* tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
(dse_optimize_stmt): Ditto.
* tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
(get_alias_ptr_type_for_ptr_address): Ditto.
* tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
* tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
* tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
(vect_get_strided_load_store_ops): Ditto.
(vectorizable_store): Ditto.
(vectorizable_load): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-10.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-11.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-12.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-8.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load-9.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-10.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-11.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-8.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_gather_load-9.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-10.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-8.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-9.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-10.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-3.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-4.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-5.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-6.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-7.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-8.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store-9.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/strided_load-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/strided_load-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/strided_store-1.c: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/strided_store-2.c: Ditto.
* gcc.target/riscv/rvv/autovec/partial/gimple_fold-1.c: Ditto.

2 years agoFix a typo
Haochen Jiang [Fri, 21 Jul 2023 07:43:30 +0000 (15:43 +0800)] 
Fix a typo

Hi all,

This patch fix a typo which will not cause any behavior difference.

Commited as obvious change.

Thx,
Haochen

gcc/ChangeLog:

* config/i386/i386.opt: Fix a typo.

2 years agotree-optimization/88540 - FP x > y ? x : y if-conversion without -ffast-math
Richard Biener [Thu, 13 Jul 2023 06:58:58 +0000 (08:58 +0200)] 
tree-optimization/88540 - FP x > y ? x : y if-conversion without -ffast-math

The following makes sure that FP x > y ? x : y style max/min operations
are if-converted at the GIMPLE level.  While we can neither match
it to MAX_EXPR nor .FMAX as both have different semantics with IEEE
than the ternary ?: operation we can make sure to maintain this form
as a COND_EXPR so backends have the chance to match this to instructions
their ISA offers.

The patch does this in phiopt where we recognize min/max and instead
of giving up when we have to honor NaNs we alter the generated code
to a COND_EXPR.

This resolves PR88540 and we can then SLP vectorize the min operation
for its testcase.  It also resolves part of the regressions observed
with the change matching bit-inserts of bit-field-refs to vec_perm.

Expansion from a COND_EXPR rather than from compare-and-branch
gcc.target/i386/pr54855-9.c by producing extra moves while the
corresponding min/max operations are now already synthesized by
RTL expansion, register selection isn't optimal.  This can be also
provoked without this change by altering the operand order in the source.
I have XFAILed that part of the test.

PR tree-optimization/88540
* tree-ssa-phiopt.cc (minmax_replacement): Do not give up
with NaNs but handle the simple case by if-converting to a
COND_EXPR.

* gcc.target/i386/pr88540.c: New testcase.
* gcc.target/i386/pr54855-9.c: XFAIL check for redundant moves.
* gcc.target/i386/pr54855-12.c: Adjust.
* gcc.target/i386/pr54855-13.c: Likewise.
* gcc.target/i386/pr110170.c: Likewise.
* gcc.dg/tree-ssa/split-path-12.c: Likewise.

2 years agoMATCH: Add Max<Max<a,b>,a> -> Max<a,b> simplifcation
Andrew Pinski [Fri, 21 Jul 2023 00:36:29 +0000 (17:36 -0700)] 
MATCH: Add Max<Max<a,b>,a> -> Max<a,b> simplifcation

This adds a simple match pattern to simplify
`max<max<a,b>,a>` to `max<a,b>`.  Reassociation handles
this already (r0-77700-ge969dbde29bfd396259357) but
seems like we should be able to handle this even before
reassociation.

This fixes part of PR tree-optimization/80574 but more
work is needed fix it the rest of the way. The original
testcase there is fixed but the RTL level is what fixes
it the rest of the way.

OK? Bootstrapped and tested on x86_64-linux-gnu.

gcc/ChangeLog:

* match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
transformation.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/reassoc-12.c: Disable all of
the passes that enables match-and-simplify.
* gcc.dg/tree-ssa/minmax-23.c: New test.

2 years agotree-optimization/110742 - fix latent issue with permuting existing vectors
Richard Biener [Thu, 20 Jul 2023 11:09:17 +0000 (13:09 +0200)] 
tree-optimization/110742 - fix latent issue with permuting existing vectors

When we materialize a layout we push edge permutes to constant/external
defs without checking we can actually do so.  For externals defined
by vector stmts rather than scalar components we can't.

PR tree-optimization/110742
* tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
Do not materialize an edge permutation in an external node with
vector defs.
(vect_slp_analyze_node_operations_1): Guard purely internal
nodes better.

* g++.dg/torture/pr110742.C: New testcase.

2 years agoCleanup expected_loop_iterations
Jan Hubicka [Fri, 21 Jul 2023 06:52:00 +0000 (08:52 +0200)] 
Cleanup expected_loop_iterations

this patch cleanups API for determining expected loop iteraitons from profile.
We started with having expected_loop_iterations and only source was the integer
represented BB counts. It did some work on guessing number of iteration if
profile was absent or bogus.  Later we introduced loop_info and added
get_estimated_loop_iterations which made expected_loop_iterations useful mostly
when doing profile updates and not for loop optimization heuristics.  The
naming is bit ambiguous so this difference is not clear.  Even later we
introduced precision tracking to profile and exended the API to return
reliablity of result but did not update all uses to do reasonable stuff with
it.  There is also some cofusion about +-1s concering latch execution counts
versus header execution counts.

This patch aims to obsolette expected_loop_iterations and
expected_loop_iterations_unbounded (and "suceeds" modulo 1 use of each of two).
It adds expected_loop_iterations_by_profile which computes sreal and does
correct precision/presence tracking.

Unlike old code, it is based on CFG profile only and  does not attempt to
provide fake answer when info is missing and does not check sanity with
loop_info.

We now define iterations consistently as lath execution in loop_info so I use
that here too.

I converted almost all calls to new API: dumps, code produing loop_info from
CFG profile and profile updating.  Remaining uses are in loop unrolling and
prefetching that needs more TLC I will do incrementally.

There are some improvements possible which I can play with incrementally.
 - for simple loops with one exit dominating latch we can use exit
   probability for easier to preserve info in loop itraionts.
   THis is probably not too critical since all esitmates should be recorded
   in loop_info and would help mostly if new loop is constructed or old
   loop is lost and redicovered.
 - We may want to avoid trusting the profile if it is obviously inconsistent
   on header.

gcc/ChangeLog:

* cfgloop.cc: Include sreal.h.
(flow_loop_dump): Dump sreal iteration exsitmate.
(get_estimated_loop_iterations): Update.
* cfgloop.h (expected_loop_iterations_by_profile): Declare.
* cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
(expected_loop_iterations_unbounded): Use new API.
* cfgloopmanip.cc (scale_loop_profile): Use
expected_loop_iterations_by_profile
* predict.cc (pass_profile::execute): Likewise.
* profile.cc (branch_prob): Likewise.
* tree-ssa-loop-niter.cc: Include sreal.h.
(estimate_numbers_of_iterations): Likewise

2 years agolibfortran: Fix build for targets that don't have 10byte or 16 byte floating point
Andrew Pinski [Fri, 21 Jul 2023 02:26:09 +0000 (02:26 +0000)] 
libfortran: Fix build for targets that don't have 10byte or 16 byte floating point

So the problem here is EXPAND_INTER_MACRO_16 expands to nothing if 16 byte FP does not
exist but we still add a comma after it and that causes a build failure.
The same is true for EXPAND_INTER_MACRO_10 too.

Committed as obvious after a bootstrap and test on x86_64-linux-gnu and aarch64-linux-gnu.

libgfortran/ChangeLog:

PR libfortran/110759
* ieee/ieee_arithmetic.F90
(COMP_INTERFACE): Remove the comma after EXPAND_INTER_MACRO_16
and EXPAND_INTER_MACRO_10.
(EXPAND_INTER_MACRO_16): Add comma here if 16 byte fp exist.
(EXPAND_INTER_MACRO_10): Likewise.

2 years agosccvn: Correct the index of bias for IFN_LEN_STORE [PR110744]
Kewen Lin [Fri, 21 Jul 2023 05:18:19 +0000 (00:18 -0500)] 
sccvn: Correct the index of bias for IFN_LEN_STORE [PR110744]

Commit r14-2267-gb8806f6ffbe72e adjusts the arguments order
of LEN_STORE from {len,vector,bias} to {len,bias,vector},
in order to make them consistent with LEN_MASK_STORE and
MASK_STORE.  But it missed to update the related handlings
in tree-ssa-sccvn.cc, it caused the failure shown in PR
110744.  This patch is to fix the related handlings with
the correct index.

PR tree-optimization/110744

gcc/ChangeLog:

* tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
operand for ifn IFN_LEN_STORE.

2 years agotestsuite: Add a test case for PR110729 [PR110729]
Kewen Lin [Fri, 21 Jul 2023 05:16:29 +0000 (00:16 -0500)] 
testsuite: Add a test case for PR110729 [PR110729]

As PR110729 reported, there was one issue for .section
__patchable_function_entries with -ffunction-sections, that
is we put the same symbol as link_to section symbol for all
functions wrongly.  The commit r13-4294 for PR99889 has
fixed this with the corresponding label LPFE* which sits in
the function_section.

As Fangrui suggested [1], this patch is to add a bit more
test coverage.  I didn't find a good way to check all
linked_to symbols are different, so I checked for LPFE[012].

[1] https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624866.html

PR testsuite/110729

gcc/testsuite/ChangeLog:

* gcc.dg/pr110729.c: New test.

2 years agoProvide -fcf-protection=branch,return.
liuhongt [Fri, 12 May 2023 07:15:08 +0000 (15:15 +0800)] 
Provide -fcf-protection=branch,return.

Use EnumSet instead of EnumBitSet since CF_FULL is not power of 2.
It is a bit tricky for sets classification, cf_branch and cf_return
should be in different sets, but they both "conflicts" cf_full,
cf_none. And current EnumSet don't handle this well.

So in the current implementation, only cf_full,cf_none are exclusive
to each other, but they can be combined with any cf_branch, cf_return,
cf_check. It's not perfect, but still an improvement than original
one.

gcc/ChangeLog:

PR target/89701
* common.opt: (fcf-protection=): Add EnumSet attribute to
support combination of params.

gcc/testsuite/ChangeLog:

* c-c++-common/fcf-protection-10.c: New test.
* c-c++-common/fcf-protection-11.c: New test.
* c-c++-common/fcf-protection-12.c: New test.
* c-c++-common/fcf-protection-8.c: New test.
* c-c++-common/fcf-protection-9.c: New test.
* gcc.target/i386/pr89701-1.c: New test.
* gcc.target/i386/pr89701-2.c: New test.
* gcc.target/i386/pr89701-3.c: New test.

2 years agoFix fp16 related testcase failure for i686.
liuhongt [Thu, 20 Jul 2023 04:44:03 +0000 (12:44 +0800)] 
Fix fp16 related testcase failure for i686.

> I see some regressions most likely with this change on i686-linux,
> in particular:
> +FAIL: gcc.dg/pr107547.c (test for excess errors)
> +FAIL: gcc.dg/torture/floatn-convert.c  -O0 (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c  -O0 compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c  -O1 (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c  -O1 compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c  -O2 (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c  -O2 compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c  -O2 -flto (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c  -O2 -flto compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c  -O2 -flto -flto-partition=none (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c  -O2 -flto -flto-partition=none compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c  -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c  -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c  -O3 -g (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c  -O3 -g compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c  -Os (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c  -Os compilation failed to produce executable
> +FAIL: gcc.target/i386/float16-7.c (test for errors, line 7)
>

> Perhaps we need to tweak
> gcc/testsuite/lib/target-supports.exp (add_options_for_float16)
> so that it adds -msse2 for i?86-*-* x86_64-*-* (that would likely
> fix up floatn-convert) and for the others perhaps
> /* { dg-add-options float16 } */
> ?

gcc/testsuite/ChangeLog:

* gcc.dg/pr107547.c: Add { dg-add-options float16 }.
* gcc.target/i386/float16-7.c: Add -msse2 to dg-options.
* lib/target-supports.exp (add_options_for_float16): Add
-msse2 for i?86-*-* || x86_64-*-*.

2 years agoanalyzer: avoid usage of TYPE_PRECISION on vector types [PR110455]
David Malcolm [Fri, 21 Jul 2023 00:24:10 +0000 (20:24 -0400)] 
analyzer: avoid usage of TYPE_PRECISION on vector types [PR110455]

gcc/analyzer/ChangeLog:
PR analyzer/110455
* region-model.cc (region_model::get_gassign_result): Only check
for bad shift counts when dealing with an integral type.

gcc/testsuite/ChangeLog:
PR analyzer/110455
* gcc.dg/analyzer/pr110455.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2 years agoanalyzer/text-art: fix clang warnings [PR110433,PR110612]
David Malcolm [Fri, 21 Jul 2023 00:24:06 +0000 (20:24 -0400)] 
analyzer/text-art: fix clang warnings [PR110433,PR110612]

gcc/analyzer/ChangeLog:
PR analyzer/110433
PR middle-end/110612
* access-diagram.cc (class spatial_item): Add virtual dtor.

gcc/ChangeLog:
PR middle-end/110612
* text-art/table.cc (table_geometry::table_geometry): Drop m_table
field.
(table_geometry::table_x_to_canvas_x): Add cast to comparison.
(table_geometry::table_y_to_canvas_y): Likewise.
* text-art/table.h (table_geometry::m_table): Drop unused field.
* text-art/widget.h (wrapper_widget::update_child_alloc_rects):
Add "override".

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2 years agoanalyzer: fix ICE on certain pointer subtractions [PR110387]
David Malcolm [Fri, 21 Jul 2023 00:24:01 +0000 (20:24 -0400)] 
analyzer: fix ICE on certain pointer subtractions [PR110387]

gcc/analyzer/ChangeLog:
PR analyzer/110387
* region.h (struct cast_region::key_t): Support "m_type" being
null by using "m_original_region" for empty/deleted slots.

gcc/testsuite/ChangeLog:
PR analyzer/110387
* gcc.dg/analyzer/out-of-bounds-pr110387.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2 years agoDaily bump.
GCC Administrator [Fri, 21 Jul 2023 00:17:07 +0000 (00:17 +0000)] 
Daily bump.

2 years ago[modula2] Implement limited VAR parameter static analysis
Gaius Mulley [Thu, 20 Jul 2023 21:32:22 +0000 (22:32 +0100)] 
[modula2] Implement limited VAR parameter static analysis

This patch implements limited VAR parameter static analysis for pointer
parameters.

gcc/m2/ChangeLog:

* gm2-compiler/M2SymInit.mod (IsExempt): Remove parameter exemption.
(CheckIndrX): Call SetupLAlias between lhs and content.
(trashParam): Re-write.
(SetVarLRInitialized): Indicate shadow and heap are initialized.
Call SetupIndr between shadow and heap.
* gm2-compiler/P2SymBuild.mod: Import
PutProcedureParameterHeapVars.
(EndBuildProcedure): Call PutProcedureParameterHeapVars.
* gm2-compiler/SymbolTable.def (GetParameterHeapVar): New
procedure function.
(PutProcedureParameterHeapVars): New procedure function.
* gm2-compiler/SymbolTable.mod (MakeParameterHeapVar): New
procedure function.
(GetParameterHeapVar): New procedure function.
(PuttParameterHeapVar): New procedure function.
(PutProcedureParameterHeapVars): New procedure.
(VarParam): HeapVar new record field.
(PutVarParam): HeapVar assigned to NulSym.

gcc/testsuite/ChangeLog:

* gm2/switches/uninit-variable-checking/procedures/fail/testdispose3.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/fail/testdispose4.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/pass/testdispose3.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/pass/testdispose4.mod: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 years agocmd/go: don't collect package CGOLDFLAGS when using gccgo
Ian Lance Taylor [Thu, 20 Jul 2023 18:21:13 +0000 (11:21 -0700)] 
cmd/go: don't collect package CGOLDFLAGS when using gccgo

They are already collected via cmd/cgo.

The gccgo_link_c test is tweaked to do real linking as with this
change the cgo ldflags are not fully reflected in go build -n output,
since they now only come from the built archive.

This is a backport of https://go.dev/cl/497117 from the main repo.

For golang/go#60287

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/511675

2 years agoi386: Double-word sign-extension missed-optimization [PR110717]
Uros Bizjak [Thu, 20 Jul 2023 18:54:51 +0000 (20:54 +0200)] 
i386: Double-word sign-extension missed-optimization [PR110717]

When sign-extending the value in a double-word register pair using shift and
ashiftrt sequence with the same count immediate value less than word width,
there is no need to shift the lower word of the value. The sign-extension
could be limited to the upper word, but we uselessly shift the lower word
with it as well:
movq %rdi, %rax
movq %rsi, %rdx
shldq $59, %rdi, %rdx
salq $59, %rax
shrdq $59, %rdx, %rax
sarq $59, %rdx
ret
for -m64 and
movl 4(%esp), %eax
movl 8(%esp), %edx
shldl $27, %eax, %edx
sall $27, %eax
shrdl $27, %edx, %eax
sarl $27, %edx
ret
for -m32.

The patch introduces a new post-reload splitter to provide the combined
ASHIFTRT/SHIFT instruction pattern.  The instruction is split to a sequence
of SAL and SAR insns with the same count immediate operand:
movq    %rsi, %rdx
movq    %rdi, %rax
salq    $59, %rdx
sarq    $59, %rdx
ret

Some complication is required to properly handle STV transform, where we
emit a sequence with DImode PSLLQ and PSRAQ insns for 32-bit AVX512VL
targets when profitable.

The patch also fixes a small oversight and enables STV transform of SImode
ASHIFTRT to PSRAD also for SSE2 targets.

PR target/110717

gcc/ChangeLog:

* config/i386/i386-features.cc
(general_scalar_chain::compute_convert_gain): Calculate gain
for extend higpart case.
(general_scalar_chain::convert_op): Handle
ASHIFTRT/ASHIFT combined RTX.
(general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
SImode for SSE2 targets.  Handle ASHIFTRT/ASHIFT combined RTX.
* config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
New define_insn_and_split pattern.
(*extendv2di2_highpart_stv): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/pr110717.c: New test.

2 years ago[LRA]: Exclude reloading of frame pointer in subreg for some cases
Vladimir N. Makarov [Thu, 20 Jul 2023 18:34:26 +0000 (14:34 -0400)] 
[LRA]: Exclude reloading of frame pointer in subreg for some cases

LRA for avr port reloads frame pointer in subreg although we can just
simplify the subreg.  It results in generation of bad performance code.  The following
patch fixes this.

gcc/ChangeLog:

* lra-constraints.cc (simplify_operand_subreg): Check frame pointer
simplification.

2 years agotestsuite: fix allocator-opt1.C FAIL with old ABI
Marek Polacek [Mon, 10 Jul 2023 20:21:58 +0000 (16:21 -0400)] 
testsuite: fix allocator-opt1.C FAIL with old ABI

Running
$ make check-g++ RUNTESTFLAGS='--target_board=unix\{-D_GLIBCXX_USE_CXX11_ABI=0,\} dg.exp=allocator-opt1.C'
yields:

FAIL: g++.dg/tree-ssa/allocator-opt1.C  -std=c++98  scan-tree-dump-times gimple "struct allocator D" 1
FAIL: g++.dg/tree-ssa/allocator-opt1.C  -std=c++14  scan-tree-dump-times gimple "struct allocator D" 1
FAIL: g++.dg/tree-ssa/allocator-opt1.C  -std=c++17  scan-tree-dump-times gimple "struct allocator D" 1
FAIL: g++.dg/tree-ssa/allocator-opt1.C  -std=c++20  scan-tree-dump-times gimple "struct allocator D" 1

=== g++ Summary for unix/-D_GLIBCXX_USE_CXX11_ABI=0 ===

=== g++ Summary for unix ===

because in the old ABI we get two "struct allocator D".  This patch
follows r14-658 although I'm not quite sure I follow the logic there.

gcc/testsuite/ChangeLog:

* g++.dg/tree-ssa/allocator-opt1.C: Force _GLIBCXX_USE_CXX11_ABI to 1.

2 years agolibgomp.texi: Split OpenMP routines chapter into sections
Tobias Burnus [Thu, 20 Jul 2023 16:12:57 +0000 (18:12 +0200)] 
libgomp.texi: Split OpenMP routines chapter into sections

The previous list of OpenMP routines was rather lengthy and the order seemed
to be rather random - especially for outputs which did not have @menu as then
the sectioning was not visible.

The OpenMP specification split in 5.1 the lengthy list by adding
sections to the chapter and grouping the routines under them.

This patch follow suite and uses the same sections and order. The commit also
prepares for adding not-yet-documented routines by listening those in the
@menu (@c commented - both for just undocumented and for also unimplemented
routines). See also PR 110364.

libgomp/ChangeLog:

* libgomp.texi (OpenMP Runtime Library Routines):
Split long list by adding sections and moving routines there.
(OMP_ALLOCATORS): Fix typo.

2 years agoMove combine over to statistics_counter_event.
Andrew Pinski [Sat, 21 Sep 2019 01:27:34 +0000 (01:27 +0000)] 
Move combine over to statistics_counter_event.

Since we have statistics_counter_event now, combine should use that
instead of it is own custom printing of statistics.
The only thing that is not done any more after this patch is printing
out the total stats for the whole TU.

Note you need to use -fdump-rtl-combine-stats to get the stats in the combine
dump unlike before where the stats was dumped directly into the file.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

gcc/ChangeLog:

* combine.cc (dump_combine_stats): Remove.
(dump_combine_total_stats): Remove.
(total_attempts, total_merges, total_extras,
total_successes): Remove.
(combine_instructions): Don't increment total stats
instead use statistics_counter_event.
* dumpfile.cc (print_combine_total_stats): Remove.
* dumpfile.h (print_combine_total_stats): Remove.
(dump_combine_total_stats): Remove.
* passes.cc (finish_optimization_passes):
Don't call print_combine_total_stats.
* rtl.h (dump_combine_total_stats): Remove.
(dump_combine_stats): Remove.

2 years agoFix last-minute change to previs tree-ssa-loop-ch.cc patch
Jan Hubicka [Thu, 20 Jul 2023 15:53:31 +0000 (17:53 +0200)] 
Fix last-minute change to previs tree-ssa-loop-ch.cc patch

gcc/ChangeLog:

* tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
logical ops.

2 years agoDocument new analyzer parameters
Martin Jambor [Thu, 20 Jul 2023 14:43:36 +0000 (16:43 +0200)] 
Document new analyzer parameters

This patch documents the analyzer parameters introduced in
r14-2029-g0e466e978c7286 also in gcc/doc/invoke.texi.

2023-07-20  Martin Jambor  <mjambor@suse.cz>

* doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
(analyzer-text-art-ideal-canvas-width): Likewise.
(analyzer-text-art-string-ellipsis-head-len): Likewise.
(analyzer-text-art-string-ellipsis-tail-len): Likewise.

2 years agoc++: fix ICE with designated initializer [PR110114]
Marek Polacek [Wed, 19 Jul 2023 12:47:29 +0000 (08:47 -0400)] 
c++: fix ICE with designated initializer [PR110114]

r13-1227 added an assert checking that the index in a CONSTRUCTOR
is a FIELD_DECL.  That's a reasonable assumption but in this case
we never called reshape_init due to the type being incomplete, and
so the index remained an identifier node: get_class_binding never
got around to looking up the FIELD_DECL.

We can avoid the crash by returning early in implicit_conversion_1; we'd
return NULL anyway due to:

  if (i < CONSTRUCTOR_NELTS (ctor))
    return NULL;

in build_aggr_conv.

PR c++/110114

gcc/cp/ChangeLog:

* call.cc (implicit_conversion_1): Return early if the type isn't
complete.

gcc/testsuite/ChangeLog:

* g++.dg/cpp0x/initlist100.C: Adjust expected diagnostic.
* g++.dg/cpp2a/desig28.C: New test.
* g++.dg/cpp2a/desig29.C: New test.

2 years agoCODE STRUCTURE: Refine codes in Vectorizer
Ju-Zhe Zhong [Thu, 20 Jul 2023 08:06:29 +0000 (16:06 +0800)] 
CODE STRUCTURE: Refine codes in Vectorizer

Hi, Richard and Richi.

I plan to refine the codes that I recently support for RVV auto-vectorization.
This patch is inspired last review comments from Richard:
https://patchwork.sourceware.org/project/gcc/patch/20230712042124.111818-1-juzhe.zhong@rivai.ai/

Richard said he prefer the the code structure as follows:

Please instead switch the if condition so that the structure is:

   if (...)
     vect_record_loop_mask (...)
   else if (...)
     vect_record_loop_len (...)
   else
     can't use partial vectors

This is his last comments.

So, I come back to refine this piece of codes.

Does it look reasonable ?

This next refine patch is change all names of "LEN_MASK" into "MASK_LEN" but should come after this
patch.

gcc/ChangeLog:

* tree-vect-stmts.cc (check_load_store_for_partial_vectors):
Refine code structure.

2 years agoloop-ch improvements, part 3
Jan Hubicka [Thu, 20 Jul 2023 13:41:39 +0000 (15:41 +0200)] 
loop-ch improvements, part 3

Make tree-ssa-loop-ch understand if-combined conditionals (which
are quite common) and remove the IV-derived heuristics.  That heuristics is
quite dubious because every variable with PHI in header of integral or pointer
type is seen as IV, so in the first basic block we match all loop invariants as
invariants and everything that chagnes in loop as IV-like.

I think the heuristics was mostly there to make header duplication happen when
the exit conditional is constant false in the first iteration and with ranger
we can work this out in good enough precision.

The patch adds notion of "combined exit" which has conditional that is
and/or/xor of loop invariant exit and exit known to be false in first
iteration.  Copying these is a win since the loop conditional will simplify
in both copies.

It seems that those are usual bit or/and/xor and the code size accounting is
true only when the values have at most one bit set or when the static constant
and invariant versions are simple (such as all zeros).  I am not testing this,
so the code may be optimistic here.  I think it is not common enough to matter
and I can not think of correct condition that is not quite complex.

I also improved code size estimate not accounting non-conditionals that are
know to be constant in peeled copy and improved debug output.

This requires testsuite compensaiton.  uninit-pred-loop-1.c.C does:

/* { dg-do compile } */
/* { dg-options "-Wuninitialized -O2 -std=c++98" } */

extern int bar();
int foo(int n, int m)
{
 for (;;) {
   int err = ({int _err;
     for (int i = 0; i < 16; ++i) {
       if (m+i > n)
          break;
       _err = 17;
       _err = bar();
     }
     _err;
   });

   if (err == 0) return 17;
}

Before path we duplicate
       if (m+i > n)
which makes maybe-uninitialized warning to not be output.  I do not quite see
why copying this out would be a win, since it won't simlify.  Also I think the
warning is correct.  if m>n the loop will bail out before initializing _err and
it will be used unitialized.  I think it is bug elsewhere that header
duplication supresses this.

copy headers does:
int is_sorted(int *a, int n, int m, int k)
{
  for (int i = 0; i < n - 1 && m && k > i; i++)
    if (a[i] > a[i + 1])
      return 0;
  return 1;
}

it tests that all three for statement conditionals are duplicaed.  With patch
we no longer do k>i since it is not going to simplify.  So I added test
ensuring that k is positive.  Also the tests requires disabling if-combining and
vrp to avoid conditionals becoming combined ones. So I aded new version of test
that we now behave correctly aslo with if-combine.

ivopt_mult_2.c and ivopt_mult_1.c seems to require loop header
duplication for ivopts to behave particular way, so I also ensured by value
range that the header is duplicated.

Bootstrapped/regtested x86_64-linux, OK?

gcc/ChangeLog:

* tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
(get_range_query): ... this one; do
(static_loop_exit): Add query parametr, turn ranger to reference.
(loop_static_stmt_p): New function.
(loop_static_op_p): New function.
(loop_iv_derived_p): Remove.
(loop_combined_static_and_iv_p): New function.
(should_duplicate_loop_header_p): Discover combined onditionals;
do not track iv derived; improve dumps.
(pass_ch::execute): Fix whitespace.

gcc/testsuite/ChangeLog:

* g++.dg/uninit-pred-loop-1_c.C: Allow warning.
* gcc.dg/tree-ssa/copy-headers-7.c: Add tests so exit conditition is
static; update template.
* gcc.dg/tree-ssa/ivopt_mult_1.c: Add test so exit condition is static.
* gcc.dg/tree-ssa/ivopt_mult_2.c: Add test so exit condition is static.
* gcc.dg/tree-ssa/copy-headers-8.c: New test.

2 years agotree-optimization/110204 - second level redundancy and simplification
Richard Biener [Mon, 17 Jul 2023 10:15:29 +0000 (12:15 +0200)] 
tree-optimization/110204 - second level redundancy and simplification

When PRE discovers a full redundancy during insertion it cannot unite
the two value sets.  Instead it inserts a copy old-val = new-val where
new-val can also be a constant.  The following looks through such
copies during elimination, providing one extra level of constant and
copy propagation.  For the PR this helps avoiding a bogus diagnostic
that's emitted on unreachable code during loop optimization.

PR tree-optimization/110204
* tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
Look through copies generated by PRE.

2 years agovectorizer: Avoid an OOB access from vectorization
Matthew Malcomson [Thu, 20 Jul 2023 10:43:12 +0000 (11:43 +0100)] 
vectorizer: Avoid an OOB access from vectorization

Our checks for whether the vectorization of a given loop would make an
out of bounds access miss the case when the vector we load is so large
as to span multiple iterations worth of data (while only being there to
implement a single iteration).

This patch adds a check for such an access.

Example where this was going wrong (smaller version of testcase added):

```
  extern unsigned short multi_array[5][16][16];
  extern void initialise_s(int *);
  extern int get_sval();

  void foo() {
    int s0 = get_sval();
    int s[31];
    int i,j;
    initialise_s(&s[0]);
    s0 = get_sval();
    for (j=0; j < 16; j++)
      for (i=0; i < 16; i++)
multi_array[1][j][i]=s[j*2];
  }
```

With the above loop we would load the `s[j*2]` integer into a 4 element
vector, which reads 3 extra elements than the scalar loop would.
`get_group_load_store_type` identifies that the loop requires a scalar
epilogue due to gaps.  However we do not identify that the above code
requires *two* scalar loops to be peeled due to the fact that each
iteration loads an amount of data from the *next* iteration (while not
using it).

Bootstrapped and regtested on aarch64-none-linux-gnu.
N.b. out of interest we came across this working with Morello.

gcc/ChangeLog:

* tree-vect-stmts.cc (get_group_load_store_type): Account for
`gap` when checking if need to peel twice.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/vect-multi-peel-gaps.c: New test.

2 years agoFortran: fix wrong rebase that broke bootstrap
Francois-Xavier Coudert [Thu, 20 Jul 2023 09:55:59 +0000 (11:55 +0200)] 
Fortran: fix wrong rebase that broke bootstrap

Sorry...

gcc/fortran/

* trans-intrinsic.cc (conv_intrinsic_ieee_comparison): Only
define it once.

2 years agoFortran: add IEEE_QUIET_* and IEEE_SIGNALING_* comparisons
Francois-Xavier Coudert [Fri, 2 Sep 2022 11:27:38 +0000 (13:27 +0200)] 
Fortran: add IEEE_QUIET_* and IEEE_SIGNALING_* comparisons

Those operations were added to Fortran 2018, and correspond to
well-defined IEEE comparison operations, with defined signaling
semantics for NaNs. All are implemented in terms of GCC expressions and
built-ins, with no library support needed.

gcc/fortran/

* f95-lang.cc (gfc_init_builtin_functions): Add __builtin_iseqsig.
* trans-intrinsic.cc (conv_intrinsic_ieee_comparison): New
function.
(gfc_conv_ieee_arithmetic_function): Handle IEEE comparisons.

gcc/testsuite/

* gfortran.dg/ieee/comparisons_1.f90: New test.
* gfortran.dg/ieee/comparisons_2.f90: New test.
* gfortran.dg/ieee/comparisons_3.F90: New test.

libgfortran/
* ieee/ieee_arithmetic.F90: Add IEEE_QUIET_* and
IEEE_SIGNALING_* functions.

2 years agoAdd __builtin_iseqsig()
Francois-Xavier Coudert [Thu, 1 Sep 2022 20:49:49 +0000 (22:49 +0200)] 
Add __builtin_iseqsig()

iseqsig() is a C2x library function, for signaling floating-point
equality checks.  Provide a GCC-builtin for it, which is folded to
a series of comparisons.

2022-09-01  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>

PR middle-end/77928

gcc/
* doc/extend.texi: Document iseqsig builtin.
* builtins.cc (fold_builtin_iseqsig): New function.
(fold_builtin_2): Handle BUILT_IN_ISEQSIG.
(is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
* builtins.def (BUILT_IN_ISEQSIG): New built-in.

gcc/c-family/
* c-common.cc (check_builtin_function_arguments):
Handle BUILT_IN_ISEQSIG.

gcc/testsuite/
* gcc.dg/torture/builtin-iseqsig-1.c: New test.
* gcc.dg/torture/builtin-iseqsig-2.c: New test.
* gcc.dg/torture/builtin-iseqsig-3.c: New test.

2 years agoRISC-V: Fix one incorrect match operand for RVV reduction
Pan Li [Thu, 20 Jul 2023 08:31:10 +0000 (16:31 +0800)] 
RISC-V: Fix one incorrect match operand for RVV reduction

There are 2 of the RVV reduction pattern mask operand takes
vector_merge_operand instead of vector_mask_operand by mistake. This
patch would like to fix this.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/vector.md: Fix incorrect match_operand.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/base/pr110299-1.c: Adjust tests.
* gcc.target/riscv/rvv/base/pr110299-2.c: Ditto.

2 years agoi386: More TImode parameter passing improvements.
Roger Sayle [Thu, 20 Jul 2023 08:23:11 +0000 (09:23 +0100)] 
i386: More TImode parameter passing improvements.

This patch is the next piece of a solution to the x86_64 ABI issues in
PR 88873.  This splits the *concat<mode><dwi>3_3 define_insn_and_split
into two patterns, a TARGET_64BIT *concatditi3_3 and a !TARGET_64BIT
*concatsidi3_3. This allows us to add an additional alternative to the
the 64-bit version, enabling the register allocator to perform this
operation using SSE registers, which is implemented/split after reload
using vec_concatv2di.

To demonstrate the improvement, the test case from PR88873:

typedef struct { double x, y; } s_t;

s_t foo (s_t a, s_t b, s_t c)
{
  return (s_t){ __builtin_fma(a.x, b.x, c.x), __builtin_fma (a.y, b.y, c.y) };
}

when compiled with -O2 -march=cascadelake, currently generates:

foo: vmovq   %xmm2, -56(%rsp)
        movq    -56(%rsp), %rax
        vmovq   %xmm3, -48(%rsp)
        vmovq   %xmm4, -40(%rsp)
        movq    -48(%rsp), %rcx
        vmovq   %xmm5, -32(%rsp)
        vmovq   %rax, %xmm6
        movq    -40(%rsp), %rax
        movq    -32(%rsp), %rsi
        vpinsrq $1, %rcx, %xmm6, %xmm6
        vmovq   %xmm0, -24(%rsp)
        vmovq   %rax, %xmm7
        vmovq   %xmm1, -16(%rsp)
        vmovapd %xmm6, %xmm2
        vpinsrq $1, %rsi, %xmm7, %xmm7
        vfmadd132pd     -24(%rsp), %xmm7, %xmm2
        vmovapd %xmm2, -56(%rsp)
        vmovsd  -48(%rsp), %xmm1
        vmovsd  -56(%rsp), %xmm0
        ret

with this change, we avoid many of the reloads via memory,

foo:    vpunpcklqdq     %xmm3, %xmm2, %xmm7
        vpunpcklqdq     %xmm1, %xmm0, %xmm6
        vpunpcklqdq     %xmm5, %xmm4, %xmm2
        vmovdqa %xmm7, -24(%rsp)
        vmovdqa %xmm6, %xmm1
        movq    -16(%rsp), %rax
        vpinsrq $1, %rax, %xmm7, %xmm4
        vmovapd %xmm4, %xmm6
        vfmadd132pd     %xmm1, %xmm2, %xmm6
        vmovapd %xmm6, -24(%rsp)
        vmovsd  -16(%rsp), %xmm1
        vmovsd  -24(%rsp), %xmm0
        ret

2023-07-20  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
* config/i386/i386-expand.cc (ix86_expand_move): Don't call
force_reg, to use SUBREG rather than create a new pseudo when
inserting DFmode fields into TImode with insvti_{high,low}part.
* config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
define_insn_and_split...
(*concatditi3_3): 64-bit implementation.  Provide alternative
that allows register allocation to use SSE registers that is
split into vec_concatv2di after reload.
(*concatsidi3_3): 32-bit implementation.

gcc/testsuite/ChangeLog
* gcc.target/i386/pr88873.c: New test case.

2 years agomiddle-end/61747 - conditional move expansion and constants
Richard Biener [Tue, 18 Jul 2023 11:19:11 +0000 (13:19 +0200)] 
middle-end/61747 - conditional move expansion and constants

When expanding a COND_EXPR or a VEC_COND_EXPR the x86 backend for
example tries to match FP min/max instructions.  But this only
works when it can see the equality of the comparison and selected
operands.  This breaks in both prepare_cmp_insn and vector_compare_rtx
where the former forces expensive constants to a register and the
latter performs legitimization.  The patch below fixes this in
the caller preserving former equalities.

PR middle-end/61747
* internal-fn.cc (expand_vec_cond_optab_fn): When the
value operands are equal to the original comparison operands
preserve that equality by re-using the comparison expansion.
* optabs.cc (emit_conditional_move): When the value operands
are equal to the comparison operands and would be forced to
a register by prepare_cmp_insn do so earlier, preserving the
equality.

* g++.target/i386/pr61747.C: New testcase.

2 years agoRISC-V: Align the pattern format in vector.md
Pan Li [Thu, 20 Jul 2023 06:29:47 +0000 (14:29 +0800)] 
RISC-V: Align the pattern format in vector.md

There are some format-unaligned pattern in vector.md, this patch
would like to align the format for these patterns.

Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:

* config/riscv/vector.md: Align pattern format.

2 years agotestsuite: Fix C++ UDL tests failing on 32-bit arch [PR103902]
Lewis Hyatt [Thu, 20 Jul 2023 02:07:54 +0000 (22:07 -0400)] 
testsuite: Fix C++ UDL tests failing on 32-bit arch [PR103902]

These tests need to use "size_t" rather than "unsigned long"
for the user-defined literal function arguments.

gcc/testsuite/ChangeLog:

PR preprocessor/103902
* g++.dg/cpp0x/udlit-extended-id-1.C: Change "unsigned long" to
"size_t" throughout.
* g++.dg/cpp0x/udlit-extended-id-3.C: Likewise.

2 years agoCorrect Granite Rapids{, D} documentation
Haochen Jiang [Thu, 20 Jul 2023 02:47:18 +0000 (10:47 +0800)] 
Correct Granite Rapids{, D} documentation

gcc/Changelog:

* doc/invoke.texi: Remove AVX512VP2INTERSECT in
Granite Rapids{, D} from documentation.

2 years agoRISC-V: Refactor RVV machine modes
Juzhe-Zhong [Wed, 19 Jul 2023 23:21:20 +0000 (07:21 +0800)] 
RISC-V: Refactor RVV machine modes

Current machine modes layout is hard to maintain && read && understand.

For a LMUL = 1 SI vector mode:
  1. VNx1SI mode when TARGET_MIN_VLEN = 32.
  2. VNx2SI mode when TARGET_MIN_VLEN = 64.
  3. VNx4SI mode when TARGET_MIN_VLEN = 128.

Such implementation produces redundant machine modes and thus redudant machine description patterns.

Now, this patch refactor machine modes into 3 follow formats:

  1. mask mode: RVVMF64BImode, RVVMF32BImode, ...., RVVM1BImode.
                RVVMF64BImode means such mask mode occupy 1/64 of a RVV M1 reg.
                RVVM1BImode size = LMUL = 1 reg.
  2. non-tuple vector modes:
                RVV<LMUL><BASE_MODE>: E.g. RVVMF8QImode = SEW = 8 && LMUL = MF8
  3. tuple vector modes:
                RVV<LMUL>x<NF><BASE_MODE>.

For example, for SEW = 16, LMUL = MF2 , int mode is always RVVMF4HImode, then adjust its size according to TARGET_MIN_VLEN.

Before this patch,  the machine description patterns: 17551
After this patch, the machine description patterns: 14132 =====> reduce 3K+ patterns.

Regression of gcc/g++ rv32/rv64 all passed.

Ok for trunk?

gcc/ChangeLog:

* config/riscv/autovec.md
(len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
Refactor RVV machine modes.
(len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
(len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
(len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
(len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
(len_mask_gather_load<mode><mode>): Ditto.
(len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
(len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
(len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
(len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
(len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
(len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
(len_mask_scatter_store<mode><mode>): Ditto.
(len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
* config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
(ADJUST_NUNITS): Ditto.
(ADJUST_ALIGNMENT): Ditto.
(ADJUST_BYTESIZE): Ditto.
(ADJUST_PRECISION): Ditto.
(RVV_MODES): Ditto.
(RVV_WHOLE_MODES): Ditto.
(RVV_FRACT_MODE): Ditto.
(RVV_NF8_MODES): Ditto.
(RVV_NF4_MODES): Ditto.
(VECTOR_MODES_WITH_PREFIX): Ditto.
(VECTOR_MODE_WITH_PREFIX): Ditto.
(RVV_TUPLE_MODES): Ditto.
(RVV_NF2_MODES): Ditto.
(RVV_TUPLE_PARTIAL_MODES): Ditto.
* config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
(ENTRY): Ditto.
(TUPLE_ENTRY): Ditto.
(get_vlmul): Ditto.
(get_nf): Ditto.
(get_ratio): Ditto.
(preferred_simd_mode): Ditto.
(autovectorize_vector_modes): Ditto.
* config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
* config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
(vbool64_t): Ditto.
(vbool32_t): Ditto.
(vbool16_t): Ditto.
(vbool8_t): Ditto.
(vbool4_t): Ditto.
(vbool2_t): Ditto.
(vbool1_t): Ditto.
(vint8mf8_t): Ditto.
(vuint8mf8_t): Ditto.
(vint8mf4_t): Ditto.
(vuint8mf4_t): Ditto.
(vint8mf2_t): Ditto.
(vuint8mf2_t): Ditto.
(vint8m1_t): Ditto.
(vuint8m1_t): Ditto.
(vint8m2_t): Ditto.
(vuint8m2_t): Ditto.
(vint8m4_t): Ditto.
(vuint8m4_t): Ditto.
(vint8m8_t): Ditto.
(vuint8m8_t): Ditto.
(vint16mf4_t): Ditto.
(vuint16mf4_t): Ditto.
(vint16mf2_t): Ditto.
(vuint16mf2_t): Ditto.
(vint16m1_t): Ditto.
(vuint16m1_t): Ditto.
(vint16m2_t): Ditto.
(vuint16m2_t): Ditto.
(vint16m4_t): Ditto.
(vuint16m4_t): Ditto.
(vint16m8_t): Ditto.
(vuint16m8_t): Ditto.
(vint32mf2_t): Ditto.
(vuint32mf2_t): Ditto.
(vint32m1_t): Ditto.
(vuint32m1_t): Ditto.
(vint32m2_t): Ditto.
(vuint32m2_t): Ditto.
(vint32m4_t): Ditto.
(vuint32m4_t): Ditto.
(vint32m8_t): Ditto.
(vuint32m8_t): Ditto.
(vint64m1_t): Ditto.
(vuint64m1_t): Ditto.
(vint64m2_t): Ditto.
(vuint64m2_t): Ditto.
(vint64m4_t): Ditto.
(vuint64m4_t): Ditto.
(vint64m8_t): Ditto.
(vuint64m8_t): Ditto.
(vfloat16mf4_t): Ditto.
(vfloat16mf2_t): Ditto.
(vfloat16m1_t): Ditto.
(vfloat16m2_t): Ditto.
(vfloat16m4_t): Ditto.
(vfloat16m8_t): Ditto.
(vfloat32mf2_t): Ditto.
(vfloat32m1_t): Ditto.
(vfloat32m2_t): Ditto.
(vfloat32m4_t): Ditto.
(vfloat32m8_t): Ditto.
(vfloat64m1_t): Ditto.
(vfloat64m2_t): Ditto.
(vfloat64m4_t): Ditto.
(vfloat64m8_t): Ditto.
* config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
(TUPLE_ENTRY): Ditto.
* config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
* config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
(riscv_v_adjust_nunits): Ditto.
(riscv_v_adjust_bytesize): Ditto.
(riscv_v_adjust_precision): Ditto.
(riscv_convert_vector_bits): Ditto.
* config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
* config/riscv/riscv.md: Ditto.
* config/riscv/vector-iterators.md: Ditto.
* config/riscv/vector.md
(@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
(@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
(@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
(@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
(@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
(@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
(@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
(@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
(@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
(@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
(@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
(@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
(@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
(@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
(@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
(@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
(@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
(@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
(@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
(@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
(@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
(@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
(@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
(@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
(@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
(@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
(@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
(@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
(@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
(@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
(@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
(@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
(@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-7.c:
Adapt test.
* gcc.target/riscv/rvv/autovec/gather-scatter/gather_load_run-8.c:
Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store-9.c:
Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/mask_scatter_store_run-8.c
: Ditto.
* gcc.target/riscv/rvv/autovec/gather-scatter/scatter_store_run-8.c:
Ditto.

2 years agoDaily bump.
GCC Administrator [Thu, 20 Jul 2023 00:17:53 +0000 (00:17 +0000)] 
Daily bump.

2 years agolibstdc++: Do not define inaccurate from_chars for _Float128 [PR110077]
Jonathan Wakely [Wed, 19 Jul 2023 20:15:17 +0000 (21:15 +0100)] 
libstdc++: Do not define inaccurate from_chars for _Float128 [PR110077]

I think r14-1431-g7037e7b6e4ac41 was wrong to try to define the
_Float128 overload unconditionally. Not all targets need it, so defining
the lossy fallback using long double is not useful (and caused an ABI
change on Solaris x86).

Making the definition depend on USE_STRTOF128_FOR_FROM_CHARS again
partially reverts the change for PR 109921, however that should still be
fixed because the changes to make USE_STRTOF128_FOR_FROM_CHARS depend on
USE_STRTOD_FOR_FROM_CHARS are not reverted.

libstdc++-v3/ChangeLog:

PR libstdc++/110077
* src/c++17/floating_from_chars.cc (from_chars): Only define
_Float128 overload when using __strfromf128.

2 years agolibstdc++: Check for std::ratio in arithmetic and comparisons [PR110593]
Jonathan Wakely [Wed, 19 Jul 2023 17:18:46 +0000 (18:18 +0100)] 
libstdc++: Check for std::ratio in arithmetic and comparisons [PR110593]

The standard says that it should be ill-formed to use std::ratio_equal
etc. with types which are not specializations of std::ratio. This
implements that requirement.

We don't need to add assertions to every one of the class templates,
because many of them are implemented in terms of other ones. For
example, ratio_divide and ratio_subtract can rely on the assertions in
ratio_multiply and ratio_add respectively.

libstdc++-v3/ChangeLog:

PR libstdc++/110593
* include/bits/chrono.h (duration): Improve static assert
messages.
(__is_ratio): Move to ...
* include/std/ratio (__is_ratio): ... here.
(__is_ratio_v): New variable template and partial
specialization.
(__are_both_ratios): New function template.
(__ratio_multiply, ratio_equal, ratio_less, __ratio_add):
Add static assertion.
* testsuite/20_util/ratio/requirements/type_constraints.cc:
New test.
* testsuite/20_util/duration/requirements/typedefs_neg1.cc:
Adjust expected error.
* testsuite/20_util/duration/requirements/typedefs_neg2.cc:
Likewise.

2 years agoc++: Improve printing of base classes [PR110745]
Marek Polacek [Wed, 19 Jul 2023 20:50:00 +0000 (16:50 -0400)] 
c++: Improve printing of base classes [PR110745]

This patch changes

  warning: missing initializer for member 'D::<anonymous>' [-Wmissing-field-initializers]

to

  warning: missing initializer for member 'D::B' [-Wmissing-field-initializers]

PR c++/110745

gcc/cp/ChangeLog:

* error.cc (dump_simple_decl): Print base class name.

gcc/testsuite/ChangeLog:

* g++.dg/diagnostic/base.C: New test.

2 years agoanalyzer: fix ICE on division of tainted floating-point values [PR110700]
David Malcolm [Wed, 19 Jul 2023 21:55:09 +0000 (17:55 -0400)] 
analyzer: fix ICE on division of tainted floating-point values [PR110700]

gcc/analyzer/ChangeLog:
PR analyzer/110700
* region-model-manager.cc
(region_model_manager::get_or_create_int_cst): Assert that we have
an integral or pointer type.
* sm-taint.cc (taint_state_machine::check_for_tainted_divisor):
Don't check non-integral types.

gcc/testsuite/ChangeLog:
PR analyzer/110700
* gcc.dg/analyzer/taint-divisor-2.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2 years agoc++: -Wmissing-field-initializers and empty class [PR110064]
Marek Polacek [Wed, 19 Jul 2023 17:31:52 +0000 (13:31 -0400)] 
c++: -Wmissing-field-initializers and empty class [PR110064]

Let's suppress -Wmissing-field-initializers for empty classes.

Here I don't think I need the usual COMPLETE_TYPE_P/dependent_type_p
checks.

PR c++/110064

gcc/cp/ChangeLog:

* typeck2.cc (process_init_constructor_record): Don't emit
-Wmissing-field-initializers for empty classes.

gcc/testsuite/ChangeLog:

* g++.dg/warn/Wmissing-field-initializers-3.C: New test.

2 years agoc++: deducing empty type vs non-type argument pack
Patrick Palka [Wed, 19 Jul 2023 20:11:38 +0000 (16:11 -0400)] 
c++: deducing empty type vs non-type argument pack

Within a template parameter list, a non-type template parameter pack is
represented as a PARM_DECL.  But in a couple of spots where we need to
deduce and create an empty argument pack, we test for TEMPLATE_PARM_INDEX
(within a template parameter list) instead of for PARM_DECL, and so we
end up creating a TYPE_ARGUMENT_PACK even in the non-type case.  This
patch fixes this (seemingly harmless) bug.

gcc/cp/ChangeLog:

* pt.cc (type_unification_real): Test for PARM_DECL instead
of TEMPLATE_PARM_INDEX to distinguish a type vs non-type
template parameter pack.
(type_targs_deducible_from): Likewise.

2 years agoc++: redundant targ coercion for var/alias tmpls
Patrick Palka [Wed, 19 Jul 2023 20:10:20 +0000 (16:10 -0400)] 
c++: redundant targ coercion for var/alias tmpls

When stepping through the variable/alias template specialization code
paths, I noticed we perform template argument coercion twice: first from
lookup_template_variable / instantiate_alias_template and again from
tsubst_decl (during instantiate_template).  It'd be nice to avoid this
redundant second coercion.

It turns out this coercion in tsubst_decl could be safely elided whenever
fully specializing a primary variable/alias template, because we can rely
on lookup_template_variable / instantiate_alias_template to already have
coerced the arguments.

The only other situation to consider seems to be when fully specializing
a partial variable template specialization (from instantiate_template),
in which case the passed 'args' are the (already coerced) arguments
relative to the partial template, and the resulting 'argvec' are the
(uncoerced) arguments relative to the primary template, so coercion is
still necessary.  But computing 'argvec' here is only really necessary
in order to look up (and insert into) the specializations table.  And
instantiate_template already performs a lookup, so if we just made it
register the resulting specialization too then we could avoid having to
compute 'argvec' when called from instantiate_template, which in turns
means we could avoid the coercion altogether.  This patch implements
this approach.

gcc/cp/ChangeLog:

* pt.cc (tsubst_function_decl): Add defaulted 'use_spec_table'
flag parameter.  Don't look up or insert into the specializations
table if 'use_spec_table' is false.
(tsubst_decl): Add defaulted 'use_spec_table' flag parameter.
Check for error_mark_node.
<case FUNCTION_DECL>: Pass 'use_spec_table' to
tsubst_function_decl.
<case TYPE/VAR_DECL>: Don't call coerce_template_parms.
Don't look up or insert into the specializations table if
'use_spec_table' is false.  Exit earlier if the substituted
type is erroneous and we're not complaining, and do so for
alias specializations as well.
(instantiate_template): Pass false as 'use_spec_table'
to tsubst_decl.  Call register_specialization afterwards.

2 years agoPR modula2/110284 Make-lang-in m2flex.o and m2pp.o
Gaius Mulley [Wed, 19 Jul 2023 20:01:53 +0000 (21:01 +0100)] 
PR modula2/110284 Make-lang-in m2flex.o and m2pp.o

This patch moves the rule c-family/m2pp.o from Make-lang.in into
Make-maintainer.in.  It also adds m2/gm2-gcc/rtegraph.o and
m2/gm2-compiler-boot/m2flex.o to m2_OBJS.  The object
m2/gm2-compiler-boot/m2flex.o is needed by cc1gm2 whereas
m2/gm2-compiler/m2flex.o is required by m2/stage2/cc1gm2
(which is only built in maintainer to allow debugging via m2
sources rather than the translated to C++ sources).

PR modula2/110284
* Make-lang.in (m2_OBJS): Add m2/gm2-gcc/rtegraph.o and
m2/gm2-compiler-boot/m2flex.o.
(c-family/m2pp.o): Remove.
* Make-maintainer.in (c-family/m2pp.o): Add.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 years ago[LRA]: Check and update frame to stack pointer elimination after stack slot allocation
Vladimir N. Makarov [Wed, 19 Jul 2023 13:35:37 +0000 (09:35 -0400)] 
[LRA]: Check and update frame to stack pointer elimination after stack slot allocation

Avr is an interesting target which does not use stack pointer to
address stack slots.  The elimination of stack pointer to frame pointer
is impossible if there are stack slots.  During LRA works, the
stack slots can be allocated and used and the elimination can be done
anymore.  The situation can be complicated even more if some pseudos
were allocated to the frame pointer.

gcc/ChangeLog:

* lra-int.h (lra_update_fp2sp_elimination): New prototype.
(lra_asm_insn_error): New prototype.
* lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
existence.
(lra_spill): Call lra_update_fp2sp_elimination.
* lra-eliminations.cc: Remove trailing spaces.
(elimination_fp2sp_occured_p): New static flag.
(lra_eliminate_regs_1): Set the flag up.
(update_reg_eliminate): Modify the assert for stack to frame
pointer elimination.
(lra_update_fp2sp_elimination): New function.
(lra_eliminate): Clear flag elimination_fp2sp_occured_p.

gcc/testsuite/ChangeLog:

* gcc.target/avr/lra-elim.c: New test.

2 years ago[modula2] Location improvement and bugfix when issuing parameter errors
Gaius Mulley [Wed, 19 Jul 2023 16:46:52 +0000 (17:46 +0100)] 
[modula2] Location improvement and bugfix when issuing parameter errors

This patch improves the accuracy of error messages mentioning a
parameter in M2Quads.mod (when handling builtins).  The error location
now points to the parameter rather than the function or procedure.

gcc/m2/ChangeLog:

* gm2-compiler/M2Quads.mod (BuildDifAdrFunction): Removed
unnecessary in error message.  Use vartok for location.
(BuildOddFunction): Use optok for location.
(BuildAbsFunction): Use vartok for location.  Bugfix set vartok.
(BuildCapFunction): Use optok for location.
(BuildOrdFunction): Use optok for location and correct format
specifier.
(BuildShiftFunction): Use vartok for location.
(BuildRotateFunction): Use vartok for location.
(BuildTruncFunction): Use vartok for location.
(BuildFloatFunction): Use vartok for location.
(BuildReFunction): Use vartok for location.
(BuildImFunction): Use vartok for location.
* gm2-compiler/M2SymInit.mod (trashParam): Remove commented code.

gcc/testsuite/ChangeLog:

* gm2/errors/fail/badabs.mod: New test.
* gm2/errors/fail/badenum.mod: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 years agoaarch64: Remove architecture dependencies from intrinsics
Andrew Carlotti [Tue, 7 Mar 2023 14:37:00 +0000 (14:37 +0000)] 
aarch64: Remove architecture dependencies from intrinsics

Many intrinsics currently depend on both an architecture version and a
feature, despite the corresponding instructions being available within
GCC at lower architecture versions.

LLVM has already removed these explicit architecture version
dependences; this patch does the same for GCC. Note that +fp16 does not
imply +simd, so we need to add an explicit +simd for the Neon fp16
intrinsics.

Binutils did not previously support all of these architecture+feature
combinations, but this problem is already reachable from GCC.  For
example, compiling the test gcc.target/aarch64/usadv16qi-dotprod.c
with -O3 -march=armv8-a+dotprod has resulted in an assembler error since
GCC 10.  This is fixed in Binutils 2.41.

This patch retains explicit architecture version dependencies for
features that do not currently have a separate feature flag.

gcc/ChangeLog:

* config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
dependency.
* config/aarch64/arm_acle.h: Remove unnecessary armv8.x
dependencies from target pragmas.
* config/aarch64/arm_fp16.h (target): Likewise.
* config/aarch64/arm_neon.h (target): Likewise.

gcc/testsuite/ChangeLog:

* gcc.target/aarch64/feature-bf16-backport.c: New test.
* gcc.target/aarch64/feature-dotprod-backport.c: New test.
* gcc.target/aarch64/feature-fp16-backport.c: New test.
* gcc.target/aarch64/feature-fp16-scalar-backport.c: New test.
* gcc.target/aarch64/feature-fp16fml-backport.c: New test.
* gcc.target/aarch64/feature-i8mm-backport.c: New test.
* gcc.target/aarch64/feature-memtag-backport.c: New test.
* gcc.target/aarch64/feature-sha3-backport.c: New test.
* gcc.target/aarch64/feature-sm4-backport.c: New test.

2 years ago[PATCH] Fix tree-opt/110252: wrong code due to phiopt using flow sensitive info durin...
Andrew Pinski [Fri, 14 Jul 2023 22:55:34 +0000 (15:55 -0700)] 
[PATCH] Fix tree-opt/110252: wrong code due to phiopt using flow sensitive info during match

Match will query ranger via tree_nonzero_bits/get_nonzero_bits for 2 and 3rd
operand of the COND_EXPR and phiopt tries to do create the COND_EXPR even if we moving
one statement. That one statement could have some flow sensitive information on it
based on the condition that is for the COND_EXPR but that might create wrong code
if the statement was moved out.

This is similar to the previous version of the patch except now we use
flow_sensitive_info_storage instead of manually doing the save/restore
and also handle all defs on a gimple statement rather than just for lhs
of the gimple statement. Oh and a few more testcases were added that
was failing before.

OK? Bootsrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/110252

gcc/ChangeLog:

* tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
(auto_flow_sensitive::auto_flow_sensitive): New constructor.
(auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
(match_simplify_replacement): Temporarily
remove the flow sensitive info on the two statements that might
be moved.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/phi-opt-25b.c: Updated as
__builtin_parity loses the nonzerobits info.
* gcc.c-torture/execute/pr110252-1.c: New test.
* gcc.c-torture/execute/pr110252-2.c: New test.
* gcc.c-torture/execute/pr110252-3.c: New test.
* gcc.c-torture/execute/pr110252-4.c: New test.

2 years agoAdd flow_sensitive_info_storage and use it in gimple-fold.
Andrew Pinski [Fri, 14 Jul 2023 22:14:59 +0000 (15:14 -0700)] 
Add flow_sensitive_info_storage and use it in gimple-fold.

This adds flow_sensitive_info_storage and uses it in
maybe_fold_comparisons_from_match_pd as mentioned in
https://gcc.gnu.org/pipermail/gcc-patches/2023-June/621817.html .
Since using it in maybe_fold_comparisons_from_match_pd was easy
and allowed me to test the storage earlier, I did it.

This also hides better how the flow sensitive information is
stored and only a single place needs to be updated if that
ever changes (again).

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

gcc/ChangeLog:

* gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
with flow_sensitive_info_storage.
(follow_outer_ssa_edges): Update how to save off the flow
sensitive info.
(maybe_fold_comparisons_from_match_pd): Update restoring
of flow sensitive info.
* tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
(flow_sensitive_info_storage::restore): New method.
(flow_sensitive_info_storage::save_and_clear): New method.
(flow_sensitive_info_storage::clear_storage): New method.
* tree-ssanames.h (class flow_sensitive_info_storage): New class.

2 years agoFix PR110726: a | (a == b) can sometimes produce wrong code
Andrew Pinski [Tue, 18 Jul 2023 21:11:46 +0000 (21:11 +0000)] 
Fix PR110726: a | (a == b) can sometimes produce wrong code

So I had missed/forgot that EQ_EXPR could have an non boolean
type for generic when I implemented r14-2556-g0407ae8a7732d9.
This patch adds check for one bit precision intergal type
which fixes the problem.

OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/110726

gcc/ChangeLog:

* match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
Add checks to make sure the type was one bit precision
intergal type.

gcc/testsuite/ChangeLog:

* gcc.c-torture/execute/bitops-1.c: New test.

2 years agolibstdc++: Fix formatting of negative chrono::hh_mm_ss
Jonathan Wakely [Wed, 19 Jul 2023 13:42:51 +0000 (14:42 +0100)] 
libstdc++: Fix formatting of negative chrono::hh_mm_ss

When formatting with an empty chrono spec ("{}") two minus signs were
being added to hh_mm_ss values. This is because the __is_neg flag was
checked to add one explicitly, and then the ostream operator added
another one.

We should only check the __is_neg flag for durations, because those are
the only types which are modified to be non-negative before calling
_M_format. We don't change hh_mm_ss values to be negative, because that
would require performing arithmetic on the hh_mm_ss members to sum them,
and then again to construct a new hh_mm_ss object with the positive
value.  Instead, we can just be careful about using the __is_neg flag
correctly.

To fix the bug, _M_format_to_ostream no longer checks the __is_neg flag
for non-durations, and _M_format doesn't set it for hh_mm_ss until after
the call to _M_format_to_ostream. We can also avoid setting it for types
that it doesn't apply to, by making the __print_sign lambda only inspect
it for duration and hh_mm_ss types.

libstdc++-v3/ChangeLog:

* include/bits/chrono_io.h (__formatter_chrono::_M_format):
Do not set __is_neg for hh_mm_ss before calling
_M_format_to_ostream. Change __print_sign lambda to only check
__is_neg for durations and hh_mm_ss types.
(__formatter_chrono::_M_format_to_ostream): Only check __is_neg
for duration types.
* testsuite/std/time/hh_mm_ss/io.cc: Check negative values.

2 years agolibstdc++: Fix locale-specific duration formatting [PR110719]
Jonathan Wakely [Wed, 19 Jul 2023 13:38:08 +0000 (14:38 +0100)] 
libstdc++: Fix locale-specific duration formatting [PR110719]

The r14-2640-gf4bce119f617dc commit only removed fractional seconds for
time points, but it needs to be done for durations and hh_mm_ss types
too.

libstdc++-v3/ChangeLog:

PR libstdc++/110719
* include/bits/chrono_io.h (__formatter_chrono::_S_floor_seconds):
Handle duration and hh_mm_ss.
* testsuite/20_util/duration/io.cc: Check locale-specific
formats.
* testsuite/std/time/hh_mm_ss/io.cc: Likewise.

2 years agoVECT: Add mask_len_fold_left_plus for in-order floating-point reduction
Ju-Zhe Zhong [Fri, 14 Jul 2023 23:45:00 +0000 (07:45 +0800)] 
VECT: Add mask_len_fold_left_plus for in-order floating-point reduction

Hi, Richard and Richi.

This patch adds mask_len_fold_left_plus pattern to support in-order floating-point
reduction for target support len loop control.

Consider this following case:
double
foo2 (double *__restrict a,
     double init,
     int *__restrict cond,
     int n)
{
    for (int i = 0; i < n; i++)
      if (cond[i])
        init += a[i];
    return init;
}

ARM SVE:

...
vec_mask_and_60 = loop_mask_54 & mask__23.33_57;
vect__ifc__35.37_64 = .VCOND_MASK (vec_mask_and_60, vect__8.36_61, { 0.0, ... });
_36 = .MASK_FOLD_LEFT_PLUS (init_20, vect__ifc__35.37_64, loop_mask_54);
...

For RVV, we want to see:
...
_36 = .MASK_LEN_FOLD_LEFT_PLUS (init_20, vect__ifc__35.37_64, control_mask, loop_len, bias);
...

gcc/ChangeLog:

* doc/md.texi: Add mask_len_fold_left_plus.
* internal-fn.cc (mask_len_fold_left_direct): Ditto.
(expand_mask_len_fold_left_optab_fn): Ditto.
(direct_mask_len_fold_left_optab_supported_p): Ditto.
* internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
* optabs.def (OPTAB_D): Ditto.

2 years ago[modula2] Variable analysis understands DISPOSE and NIL
Gaius Mulley [Wed, 19 Jul 2023 12:38:07 +0000 (13:38 +0100)] 
[modula2] Variable analysis understands DISPOSE and NIL

This patch allows the uninitialized variable analysis to detect pointer
through NIL and incorrectly reusing a pointer after a call to DISPOSE.

gcc/m2/ChangeLog:

* gm2-compiler/M2Quads.mod (BuildRealFuncProcCall): Set the trash
parameter value to NIL if DEALLOCATE is detected.
* gm2-compiler/M2SymInit.mod (CheckDeferredRecordAccess): Pass
tok to SetVarInitialized.  Pass tok to GetVarComponentInitialized.
(ComponentFindVar): Add tok parameter.  Check aliased pointer
against Nil and generate warning if necessary.
(deRefComponent): Add tok and sym parameters and pass them to
getContent.
(SetVarComponentInitialized): Add tok parameter.  Pass tok to
ComponentFindVar.  Pass tok and sym to deRefComponent.
(GetVarComponentInitialized): Add tok parameter.  Pass tok to
ComponentFindVar.  Pass tok to deRefComponent.
(SetVarInitialized): Add tok parameter.  Pass tok to
SetVarComponentInitialized.
(doGetVarInitialized): Add tok parameter.  Pass tok to
GetVarComponentInitialized.
(CheckXIndr): Pass lhs and lhstok to getContent.
(CheckIndrX): Pass rhs and rhstok to getContent.
(CheckBecomes): Pass destok to ComponentFindVar.  Pass des and
destok to deRefComponent.
(CheckAddr): Pass contenttok to GetVarInitialized.  Pass ptrtok
to SetVarInitialized.
(CheckReadBeforeInitQuad): Pass op1tok to SetVarInitialized for
op1 cases and op3tok for op3 cases.
(trashParam): Get operand tokens.  Pass op3tok to
SetVarInitialized.  Pass op3 and op3tok to getContent.
Alias ptr to NIL if procedure is DEALLOCATE.  Pass op3tok to
SetVarInitialized.
(IsDeallocate): New procedure function.
(DetectTrash): Use IsDeallocate.
(SetupLAlias): Allow exp to be Nil.
(getContent): Generate warning message if ptr is Nil.

gcc/testsuite/ChangeLog:

* gm2/switches/uninit-variable-checking/procedures/fail/testdispose.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/fail/testdispose2.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/fail/testnil.mod: New test.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
2 years agotree-switch-conversion: Fix a comment typo
Jakub Jelinek [Wed, 19 Jul 2023 11:51:44 +0000 (13:51 +0200)] 
tree-switch-conversion: Fix a comment typo

I've noticed a comment typo, this patch fixes that.

2023-07-19  Jakub Jelinek  <jakub@redhat.com>

* tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.

2 years agowide-int: Fix up wi::divmod_internal [PR110731]
Jakub Jelinek [Wed, 19 Jul 2023 11:48:53 +0000 (13:48 +0200)] 
wide-int: Fix up wi::divmod_internal [PR110731]

As the following testcase shows, wi::divmod_internal doesn't handle
correctly signed division with precision > 64 when the dividend (and likely
divisor as well) is the type's minimum and the precision isn't divisible
by 64.

A few lines above what the patch hunk changes is:
  /* Make the divisor and dividend positive and remember what we
     did.  */
  if (sgn == SIGNED)
    {
      if (wi::neg_p (dividend))
        {
          neg_dividend = -dividend;
          dividend = neg_dividend;
          dividend_neg = true;
        }
      if (wi::neg_p (divisor))
        {
          neg_divisor = -divisor;
          divisor = neg_divisor;
          divisor_neg = true;
        }
    }
i.e. we negate negative dividend or divisor and remember those.
But, after we do that, when unpacking those values into b_dividend and
b_divisor we need to always treat the wide_ints as UNSIGNED,
because divmod_internal_2 performs an unsigned division only.
Now, if precision <= 64, we don't reach here at all, earlier code
handles it.  If dividend or divisor aren't the most negative values,
the negation clears their most significant bit, so it doesn't really
matter if we unpack SIGNED or UNSIGNED.  And if precision is multiple
of HOST_BITS_PER_WIDE_INT, there is no difference in behavior, while
-0x80000000000000000000000000000000 negates to
-0x80000000000000000000000000000000 the unpacking of it as SIGNED
or UNSIGNED works the same.
In the testcase, we have signed precision 119 and the dividend is
val = { 0, 0xffc0000000000000 }, len = 2, precision = 119
both before and after negation.
Divisor is
val = { 2 }, len = 1, precision = 119
But we really want to divide 0x400000000000000000000000000000 by 2
unsigned and then negate at the end.
If it is unsigned precision 119 division
0x400000000000000000000000000000 by 2
dividend is
val = { 0, 0xffc0000000000000 }, len = 2, precision = 119
but as we unpack it UNSIGNED, it is unpacked into
0, 0, 0, 0x00400000

The following patch fixes it by always using UNSIGNED unpacking
because we've already negated negative values at that point if
sgn == SIGNED and so most negative constants should be treated as
positive.

2023-07-19  Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/110731
* wide-int.cc (wi::divmod_internal): Always unpack dividend and
divisor as UNSIGNED regardless of sgn.

* gcc.dg/pr110731.c: New test.

2 years agolibstdc++: Avoid warning in std::format
Jonathan Wakely [Tue, 18 Jul 2023 21:14:32 +0000 (22:14 +0100)] 
libstdc++: Avoid warning in std::format

With -Wmaybe-uninitialized -Wsystem-headers there's a warning about
creating a string_view from an uninitalized array. Initializing the
first element of the array avoids the warning.

libstdc++-v3/ChangeLog:

* include/std/format (__write_padded): Initialize first element
of array to avoid a -Wmaybe-uninitialized warning.

2 years agolibstdc++: Implement correct locale-specific chrono formatting [PR110719]
Jonathan Wakely [Tue, 18 Jul 2023 11:46:07 +0000 (12:46 +0100)] 
libstdc++: Implement correct locale-specific chrono formatting [PR110719]

This fixes some TODOs in the C++20 <chrono> format support, where the
locale-specific output was incorrect or unimplemented. The approach
taken here is to either use the formatting locale's std::time_put facet
to do the formatting, or to remove subsecond precision from time points
so that locale-specific formats don't print fractional seconds. This
ensures that we are consistent with what the std::time_put facet would
print (which never includes fractional seconds) even if we actually
reimplement the formatting by hand instead of using the facet.

This also fixes a misplaced statement that allowed modifiers for %Z
which should have been on %z instead. There was also some ill-formed
code in an untested branch for formatting time zone names to wide
characters. A new test for zoned_time I/O has been added to exercise
that code properly.

libstdc++-v3/ChangeLog:

PR libstdc++/110719
* include/bits/chrono_io.h (__formatter_chrono::_M_parse): Fix
allowed modifiers for %z and %Z. Fix -Wparentheses and
-Wnarrowing warnings.
(__formatter_chrono::_M_format): Call new functions for %d, %e,
%H, %I, %m and %M.
(__formatter_chrono::_M_c): Use _S_floor_seconds to remove
subsecond precision.
(__formatter_chrono::_M_C_y_Y): Use _M_locale_fmt to handle
modifiers.
(__formatter_chrono::_M_e): Replace with _M_d_e and use
_M_locale_fmt.
(__formatter_chrono::_M_I): Replace with _M_H_I and use
_M_locale_fmt.
(__formatter_chrono::_M_m): New function.
(__formatter_chrono::_M_M): New function.
(__formatter_chrono::_M_r): Use _M_locale_fmt.
(__formatter_chrono::_M_S): Likewise.
(__formatter_chrono::_M_u_w): Likewise.
(__formatter_chrono::_M_U_V_W): Likewise.
(__formatter_chrono::_M_X): Use _S_floor_seconds.
(__formatter_chrono::_M_Z): Fix untested branch for wchar_t.
(__formatter_chrono::_S_altnum): Remove function.
(__formatter_chrono::_S_dd_zero_fill): Remove function.
(__formatter_chrono::_S_floor_seconds): New function.
(__formatter_chrono::_M_locale_fmt): New function.
* testsuite/std/time/clock/system/io.cc: Adjust expected output
for locale-specific formats and check modified formats.
* testsuite/std/time/clock/utc/io.cc: Likewise.
* testsuite/std/time/zoned_time/io.cc: New test.

2 years agotestsuite: Add 64-bit vector variant for bb-slp-pr95839.c
Maciej W. Rozycki [Wed, 19 Jul 2023 10:59:29 +0000 (11:59 +0100)] 
testsuite: Add 64-bit vector variant for bb-slp-pr95839.c

Add dual-single float vector test complementing bb-slp-pr95839.c.

gcc/testsuite/
* gcc.dg/vect/bb-slp-pr95839-v8.c: New test.