We still need #1 though. E.g., in constexpr-96241.C, we never
set ctx.ctor/object before calling cxx_eval_array_reference, so
we have to build a CONSTRUCTOR there. And in constexpr-101371-2.C
we have a ctx.ctor, but it has the wrong type, so we need a new one.
We can fix the problem by always clearing the object, and, as an
optimization, only create/free a new ctor when actually needed.
PR c++/110382
gcc/cp/ChangeLog:
* constexpr.cc (cxx_eval_array_reference): Create a new constructor
only when we don't already have a matching one. Clear the object
when the type is non-scalar.
OpenMP/Fortran: Reject declarations between target + teams
While commit r14-2754-g2e31fe431b08b0302e1fa8a1c18ee51adafd41df
detected executable statements, declarations do not show up as
executable statements. Hence, we now check whether the first
statement after TARGET is TEAMS - such that we can detect data
statements like type or variable declarations. Fortran semantics
ensures that only executable directives/statemens can come after
'!$omp end teams' such that those can be detected with the
previous check.
Note that statements returning ST_NONE such as 'omp nothing' or
'omp error at(compilation)' will still slip through.
PR fortran/110725
PR middle-end/71065
gcc/fortran/ChangeLog:
* gfortran.h (gfc_omp_clauses): Add target_first_st_is_teams.
* parse.cc (parse_omp_structured_block): Set it if the first
statement in the structured block of a TARGET is TEAMS or
a combined/composite starting with TEAMS.
* openmp.cc (resolve_omp_target): Also show an error for
contains_teams_construct without target_first_st_is_teams.
Marc Poulhiès [Tue, 25 Jul 2023 12:11:54 +0000 (14:11 +0200)]
Adjust one Ada test
Recent change modified how the loops are created, with the first
iteration being extracted out of the loops in the 2 test cases.
Adjust the text to match from the unroll dump.
When changing the dg-error for this PR, somehow the addition of a
dg-error in a second line was lost (the message uses (1) and (2) as
location, showing two lines, both need a dg-error with the same message).
rs6000: Implemented f[min/max]_optab by xs[min/max]dp
gcc/
PR target/103605
* config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
* config/rs6000/rs6000.md (FMINMAX): New int iterator.
(minmax_op): New int attribute.
(UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
(f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
* config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
pattern to fmaxdf3.
(__builtin_vsx_xsmindp): Set pattern to fmindf3.
Gaius Mulley [Tue, 25 Jul 2023 02:21:12 +0000 (03:21 +0100)]
PR modula2/110174 Bugfixes to M2GenGCC.mod:CodeInline preventing an ICE
This patch calls skip_const_decl before chaining parameter values and
ensures that all strings passed to build_stmt (..., ASM_EXPR, ...) are
nul terminated. It also improves the accuracy of locations in
function calls and asm statements.
gcc/m2/
PR modula2/110174
* gm2-compiler/M2GCCDeclare.def (PromoteToCString): New procedure
function.
* gm2-compiler/M2GCCDeclare.mod (PromoteToCString): New procedure
function.
* gm2-compiler/M2GenGCC.mod (BuildTreeFromInterface): Call
skip_const_decl before chaining the parameter value.
Use PromoteToCString to ensure the string is nul terminated.
(CodeInline): Remove all parameters and replace with quad.
Use GetQuadOtok to get operand token numbers.
Remove call to DeclareConstant and replace it with PromoteToCString.
* gm2-compiler/M2Quads.def (BuildInline): Rename into ...
(BuildAsm): ... this.
* gm2-compiler/M2Quads.mod: (BuildInline): Rename into ...
(BuildAsm): ... this.
(BuildAsmElement): Add debugging.
* gm2-compiler/P1Build.bnf: Remove import of BuildInline.
* gm2-compiler/P2Build.bnf: Remove import of BuildInline.
* gm2-compiler/P3Build.bnf: Remove import of BuildInline and
import BuildAsm.
* gm2-compiler/PHBuild.bnf: Remove import of BuildInline.
* gm2-libs-iso/SysClock.mod (foo): Remove.
* gm2-libs/FIO.mod (BufferedRead): Rename parameter a to dest.
Rename variable t to src.
* m2pp.cc (pf): Correct block comment.
(pe): Correct block comment.
(m2pp_asm_expr): New function.
(m2pp_statement): Call m2pp_asm_expr.
gcc/testsuite/
PR modula2/110174
* gm2/pim/pass/program2.mod: Remove import of BuildInline.
* gm2/extensions/asm/fail/extensions-asm-fail.exp: New test.
* gm2/extensions/asm/fail/stressreturn.mod: New test.
* gm2/extensions/asm/pass/extensions-asm-pass.exp: New test.
* gm2/extensions/asm/pass/fooasm.mod: New test.
libstdc++: Add missing constexpr specifiers in <format>
A couple of virtual functions in the libstdc++ format header are marked
constexpr in the base class, but not in the derived class. This was
causing build failures when trying to compile latest gcc libstdc++ with
clang 16 using c++20. Adding the constexpr specifier resolves the issue.
OpenMP/Fortran: Reject not strictly nested target -> teams [PR110725, PR71065]
OpenMP requires: "If a teams region is nested inside a target region, the
corresponding target construct must not contain any statements, declarations
or directives outside of the corresponding teams construct."
This commit checks now for this restriction.
PR fortran/110725
PR middle-end/71065
gcc/fortran/ChangeLog:
* gfortran.h (gfc_omp_clauses): Add contains_teams_construct.
* openmp.cc (resolve_omp_target): New; check for teams nesting.
(gfc_resolve_omp_directive): Call it.
* parse.cc (decode_omp_directive): Set contains_teams_construct
on enclosing ST_OMP_TARGET.
gcc/testsuite/ChangeLog:
* gfortran.dg/gomp/pr99226.f90: Update dg-error.
* gfortran.dg/gomp/teams-5.f90: New test.
Jonathan Wakely [Mon, 24 Jul 2023 10:45:43 +0000 (11:45 +0100)]
libstdc++; Do not use strtold for hppa-hpux [PR110653]
When I switched std::stold to depend on HAVE_STRTOLD that enabled it for
hppa-hpux which defines HAVE_BROKEN_STRTOLD. Add a check for that macro
so that we don't use strtold, and fall through to the check for double
and long double having the same representation. That should mean we
define a conforming std::stold in terms of std::stod, instead of trying
to use the broken strtold.
Also fix a logic error in the fallback definition of std::stod, which
should not treat zero as a subnormal number.
libstdc++-v3/ChangeLog:
PR libstdc++/110653
* include/bits/basic_string.h [!HAVE_STOF] (stof): Do not
throw an exception for zero result.
[HAVE_BROKEN_STRTOLD] (stold): Do not use strtold.
Adds a simplification for (~X | Y) ^ X to be folded into ~(X & Y).
Also adds the macro bitwise_equal_p for generic and gimple which
returns true iff EXPR1 and EXPR2 have the same value. This helps
to reduce the number of nop_converts necessary to match the pattern.
PR middle-end/109986
gcc/ChangeLog:
* generic-match-head.cc (bitwise_equal_p): New macro.
* gimple-match-head.cc (bitwise_equal_p): New macro.
(gimple_nop_convert): Declare.
(gimple_bitwise_equal_p): Helper for bitwise_equal_p.
* match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
gcc/testsuite/ChangeLog:
* gcc.c-torture/execute/pr109986.c: New test.
* gcc.dg/tree-ssa/pr109986.c: New test.
Jose E. Marchesi [Mon, 24 Jul 2023 13:57:05 +0000 (15:57 +0200)]
bpf: sdiv/smod are now part of BPF V4
We used to support signed division and signed modulus instructions in
the XBPF GCC-specific extensions to BPF. However, BPF catched up by
adding these instructions in the V4 of the ISA.
This patch changes GCC in order to use sdiv/smod instructions when
-mcpu=v4 or higher. The testsuite and the manual have been updated
accordingly.
PR target/110783
* gcc.target/bpf/xbpf-sdiv-1.c: Renamed to sdiv-1.c
* gcc.target/bpf/xbpf-smod-1.c: Renamed to smod-1.c
* gcc.target/bpf/sdiv-1.c: Renamed from xbpf-sdiv-1.c, use -mcpu=v4.
* gcc.target/bpf/smod-1.c: Renamed from xbpf-smod-1.c, use -mcpu=v4.
* gcc.target/bpf/diag-sdiv.c: Use -mcpu=v3.
* gcc.target/bpf/diag-smod.c: Likewise.
Jeff Law [Mon, 24 Jul 2023 13:56:36 +0000 (07:56 -0600)]
[committed][RISC-V] Fix minor issues in diagnostic message
This fixes two minor issues with the recently adding warning about too large
VLEN in the RISC-V backend. These prevent the RISC-V port from bootstrapping
as both Andreas and I have found.
Specifically we'll get warnings for the use of '>' in the recently added
message as well as using "can not" vs "cannot". While these warnings may
seem annoying, they're in place to make it easier for the translators.
This patch fixes the message in the fairly obvious way. Spells out the
greater than and uses cannot. There's a similar issue in another recently
added diagnostic that I'll push momentarily.
gcc/
* config/riscv/riscv.cc (riscv_option_override): Spell out
greater than and use cannot in diagnostic string.
Robin Dapp [Thu, 13 Jul 2023 07:10:06 +0000 (09:10 +0200)]
vect: Handle demoting FLOAT and promoting FIX_TRUNC.
The recent changes that allowed multi-step conversions for
"non-packing/unpacking", i.e. modifier == NONE targets included
promoting to-float and demoting to-int variants. This patch
adds the missing demoting to-float and promoting to-int handling.
gcc/ChangeLog:
* tree-vect-stmts.cc (vectorizable_conversion): Handle
more demotion/promotion for modifier == NONE.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/conversions/vec-narrow-int64-float16.c: New test.
* gcc.target/riscv/rvv/autovec/conversions/vec-widen-float16-int64.c: New test.
Roger Sayle [Mon, 24 Jul 2023 11:34:23 +0000 (12:34 +0100)]
[Committed] PR target/110787: Revert QImode offsets in {zero,sign}_extract.
My recent patch to use QImode for bit offsets in ZERO_EXTRACTs and
SIGN_EXTRACTs in the i386 backend shouldn't have resulted in any change
behaviour, but as reported by Rainer it produces a bootstrap failure in
gm2. This reverts the problematic patch whilst we investigate the
underlying cause.
Committed as obvious.
2023-07-23 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
PR target/110787
PR target/110790
Revert patch.
* config/i386/i386.md (extv<mode>): Use QImode for offsets.
(extzv<mode>): Likewise.
(insv<mode>): Likewise.
(*testqi_ext_3): Likewise.
(*btr<mode>_2): Likewise.
(define_split): Likewise.
(*btsq_imm): Likewise.
(*btrq_imm): Likewise.
(*btcq_imm): Likewise.
(define_peephole2 x3): Likewise.
(*bt<mode>): Likewise
(*bt<mode>_mask): New define_insn_and_split.
(*jcc_bt<mode>): Use QImode for offsets.
(*jcc_bt<mode>_1): Delete obsolete pattern.
(*jcc_bt<mode>_mask): Use QImode offsets.
(*jcc_bt<mode>_mask_1): Likewise.
(define_split): Likewise.
(*bt<mode>_setcqi): Likewise.
(*bt<mode>_setncqi): Likewise.
(*bt<mode>_setnc<mode>): Likewise.
(*bt<mode>_setncqi_2): Likewise.
(*bt<mode>_setc<mode>_mask): New define_insn_and_split.
(bmi2_bzhi_<mode>3): Use QImode offsets.
(*bmi2_bzhi_<mode>3): Likewise.
(*bmi2_bzhi_<mode>3_1): Likewise.
(*bmi2_bzhi_<mode>3_1_ccz): Likewise.
(@tbm_bextri_<mode>): Likewise.
Jose E. Marchesi [Mon, 24 Jul 2023 09:52:30 +0000 (11:52 +0200)]
bpf: remove -mkernel option and BPF_KERNEL_VERSION_CODE
Having the ability of specifying a target kernel version when building
a BPF program is one of these things that sound pretty good in theory,
but simply don't work in practice: kernels in practice contain
backports, etc. Also, the addition of CO-RE to BPF has made this
uneccessary.
This patch removes the -mkernel command line option and also the
associated BPF_KERNEL_VERSION_CODE pre-processor constant.
Tested in bpf-unknown-none.
gcc/ChangeLog
* config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
* config/bpf/bpf.opt (mkernel): Remove option.
* config/bpf/bpf.cc (bpf_target_macros): Do not define
BPF_KERNEL_VERSION_CODE.
Jose E. Marchesi [Mon, 24 Jul 2023 08:56:27 +0000 (10:56 +0200)]
bpf: make use of the bswap{16,32,64} V4 BPF instruction
This patch makes the BPF backend to use the new V4 bswap{16,32,64}
instructions in order to implement the __builtin_bswap{16,32,64}
built-ins. It also adds support for -mcpu=v4 and -m[no]bswap
command-line options. Tests and doc updates are includes.
Tested in bpf-unknown-none.
gcc/ChangeLog
PR target/110786
* config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
(mbswap): New option.
* config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
* config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
* config/bpf/bpf.md: Use bswap instructions if available for
bswap* insn, and fix constraint.
* doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
gcc/testsuite/ChangeLog
PR target/110786
* gcc.target/bpf/bswap-1.c: Pass -mcpu=v3 to build test.
* gcc.target/bpf/bswap-2.c: New test.
This patch is depending on:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624995.html
Consider this following case:
float foo (float *__restrict a, int n)
{
float result = 1.0;
for (int i = 0; i < n; i++)
result += a[i];
return result;
}
Compile with **NO** -ffast-math:
Before this patch:
<source>:4:21: missed: couldn't vectorize loop
<source>:1:7: missed: not vectorized: relevant phi not supported: result_14 = PHI <result_11(6), 1.0e+0(5)>
After this patch:
foo:
lui a5,%hi(.LC0)
flw fa0,%lo(.LC0)(a5)
ble a1,zero,.L4
.L3:
vsetvli a5,a1,e32,m1,ta,ma
vle32.v v1,0(a0)
slli a4,a5,2
sub a1,a1,a5
vfmv.s.f v2,fa0
add a0,a0,a4
vfredosum.vs v1,v1,v2 ----------> FOLD_LEFT_PLUS
vfmv.f.s fa0,v1
bne a1,zero,.L3
ret
.L4:
ret
gcc/ChangeLog:
* config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
(mask_len_fold_left_plus_<mode>): Ditto.
* config/riscv/riscv-protos.h (enum insn_type): New enum.
(enum reduction_type): Ditto.
(expand_reduction): Add in-order reduction.
* config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
(expand_reduction): Add in-order reduction.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/reduc/reduc_strict-1.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_strict-2.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_strict-3.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_strict-4.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_strict-5.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_strict-6.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_strict-7.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_strict_run-1.c: New test.
* gcc.target/riscv/rvv/autovec/reduc/reduc_strict_run-2.c: New test.
Kewen Lin [Mon, 24 Jul 2023 06:20:30 +0000 (01:20 -0500)]
vect: Don't vectorize a single scalar iteration loop [PR110740]
The function vect_update_epilogue_niters which has been
removed by r14-2281 has some code taking care of that if
there is only one scalar iteration left for epilogue then
we won't try to vectorize it any more.
Although costing should be able to care about it eventually,
I think we still want this special casing without costing
enabled, so this patch is to add it back in function
vect_analyze_loop_costing, and make it more general for
both main and epilogue loops as Richi suggested, it can fix
some exposed failures on Power10:
Andrew Pinski [Sat, 22 Jul 2023 15:52:42 +0000 (08:52 -0700)]
Fix PR 110066: crash with -pg -static on riscv
The problem -fasynchronous-unwind-tables is on by default for riscv linux
We need turn it off for crt*.o because it would make __EH_FRAME_BEGIN__ point
to .eh_frame data from crtbeginT.o instead of the user-defined object
during static linking.
This turns it off.
OK?
libgcc/ChangeLog:
* config.host (riscv*-*-linux*): Add t-crtstuff to tmake_file.
(riscv*-*-freebsd*): Likewise.
* config/riscv/t-crtstuff: New file.
RISC-V: optim const DF +0.0 store to mem [PR/110748]
Fixes: ef85d150b5963 ("RISC-V: Enable TARGET_SUPPORTS_WIDE_INT")
DF +0.0 is bitwise all zeros so int x0 store to mem can be used to optimize it.
void zd(double *) { *d = 0.0; }
currently:
| fmv.d.x fa5,zero
| fsd fa5,0(a0)
| ret
With patch
| sd zero,0(a0)
| ret
The fix updates predicate const_0_operand() so reg_or_0_operand () now
includes const_double, enabling movdf expander -> riscv_legitimize_move ()
to generate below vs. an intermediate set (reg:DF) const_double:DF
This change also enables such insns to be recog() by later passes.
The md pattern "*movdf_hardfloat_rv64" despite already supporting the
needed constraints {"m","G"} mem/const 0.0 was failing to match because
the additional condition check reg_or_0_operand() was failing due to
missing const_double.
This failure to recog() was triggering an ICE when testing the in-flight
f-m-o patches and is how all of this started, but then was deemed to be
an independent optimization of it's own [1].
Its worthwhile to note all the set peices were already there and working
up until my own commit mentioned at top regressed the whole thing.
Ran thru full multilib testsuite and no surprises. There was 1 false
failure due to random string "lw" appearing in lto build assembler output,
which is also fixed here.
gcc/ChangeLog:
PR target/110748
* config/riscv/predicates.md (const_0_operand): Add back
const_double.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/pr110748-1.c: New Test.
* gcc.target/riscv/xtheadfmv-fmv.c: Add '\t' around test
patterns to avoid random string matches.
Roger Sayle [Sat, 22 Jul 2023 20:52:55 +0000 (21:52 +0100)]
i386: Don't use insvti_{high,low}part with -O0 (for compile-time).
This patch attempts to help with PR rtl-optimization/110587, a regression
of -O0 compile time for the pathological pr28071.c. My recent patch helps
a bit, but hasn't returned -O0 compile-time to where it was before my
ix86_expand_move changes. The obvious solution/workaround is to guard
these new TImode parameter passing optimizations with "&& optimize", so
they don't trigger when compiling with -O0. The very minor complication
is that "&& optimize" alone leads to the regression of pr110533.c, where
our improved TImode parameter passing fixes a wrong-code issue with naked
functions, importantly, when compiling with -O0. This should explain
the one line fix below "&& (optimize || ix86_function_naked (cfun))".
I've an additional fix/tweak or two for this compile-time issue, but
this change eliminates the part of the regression that I've caused.
2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386-expand.cc (ix86_expand_move): Disable the
64-bit insertions into TImode optimizations with -O0, unless
the function has the "naked" attribute (for PR target/110533).
Andrew Pinski [Sat, 22 Jul 2023 20:34:41 +0000 (20:34 +0000)]
Fix alpha building
The problem is after r14-2587-gd8105b10fff951, the definition of
extended_count now takes a bool as its last argument but we only
have a declaration for the version which takes an int as the last
argument. This fixes the problem by changing the declaration to be
a bool too.
Committed as obvious after building a cross to alpha-linux-gnu.
gcc/ChangeLog:
PR target/110778
* rtl.h (extended_count): Change last argument type
to bool.
Roger Sayle [Sat, 22 Jul 2023 20:50:06 +0000 (21:50 +0100)]
i386: Use QImode for offsets in zero_extract/sign_extract in i386.md
As suggested by Uros, this patch changes the ZERO_EXTRACTs and SIGN_EXTRACTs
in i386.md to consistently use QImode for bit offsets (i.e. third and fourth
operands), matching the use of QImode for bit counts in shifts and rotates.
There's no change in functionality, and the new patterns simply ensure that
we continue to generate the same code (match revised patterns) as before.
2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386.md (extv<mode>): Use QImode for offsets.
(extzv<mode>): Likewise.
(insv<mode>): Likewise.
(*testqi_ext_3): Likewise.
(*btr<mode>_2): Likewise.
(define_split): Likewise.
(*btsq_imm): Likewise.
(*btrq_imm): Likewise.
(*btcq_imm): Likewise.
(define_peephole2 x3): Likewise.
(*bt<mode>): Likewise
(*bt<mode>_mask): New define_insn_and_split.
(*jcc_bt<mode>): Use QImode for offsets.
(*jcc_bt<mode>_1): Delete obsolete pattern.
(*jcc_bt<mode>_mask): Use QImode offsets.
(*jcc_bt<mode>_mask_1): Likewise.
(define_split): Likewise.
(*bt<mode>_setcqi): Likewise.
(*bt<mode>_setncqi): Likewise.
(*bt<mode>_setnc<mode>): Likewise.
(*bt<mode>_setncqi_2): Likewise.
(*bt<mode>_setc<mode>_mask): New define_insn_and_split.
(bmi2_bzhi_<mode>3): Use QImode offsets.
(*bmi2_bzhi_<mode>3): Likewise.
(*bmi2_bzhi_<mode>3_1): Likewise.
(*bmi2_bzhi_<mode>3_1_ccz): Likewise.
(@tbm_bextri_<mode>): Likewise.
Jeff Law [Sat, 22 Jul 2023 15:47:21 +0000 (09:47 -0600)]
[committed] Fix length computation bug in bfin port
The tester seemed to occasionally ping-pong a compilation failure on the
builtin-bitops-1.c test. I long suspected it was something like length
computations.
I finally got a few minutes to dig into it, and sure enough the blackfin
port was claiming the "ones" operation was 2 bytes when it is in fact 4 bytes.
This fixes the compilation failure for the builtin-bitops-1.c test. Sadly,
it doesn't fix any of the other failures on the bfin port.
Gaius Mulley [Sat, 22 Jul 2023 09:01:02 +0000 (10:01 +0100)]
PR modula2/110631 Bugfix to FIO WriteCardinal
FIO.WriteCardinal fails to write binary data. This patch fixes two
bugs in FIO.mod and provides a testcase which writes and reads binary
cardinals. There was an off by one error when using HIGH (a) to
determine the number of bytes and the dest/src pointers were switched
when calling memcpy.
gcc/m2/ChangeLog:
PR modula2/110631
* gm2-libs/FIO.def (ReadAny): Correct comment as
HIGH (a) + 1 is number of bytes.
(WriteAny): Correct comment as HIGH (a) + 1 is number of
bytes.
* gm2-libs/FIO.mod (ReadAny): Correct comment as
HIGH (a) + 1 is number of bytes. Also pass HIGH (a) + 1
to BufferedRead.
(WriteAny): Correct comment as HIGH (a) + 1 is number of
bytes. Also pass HIGH (a) + 1 to BufferedWrite.
(BufferedWrite): Rename parameter a to src, rename variable
t to dest. Correct parameter order to memcpy.
gcc/testsuite/ChangeLog:
PR modula2/110631
* gm2/pimlib/run/pass/testfiobinary.mod: New test.
[LRA]: Fix sparc bootstrap after recent patch for fp elimination for avr LRA port
The recent patch for fp elimination for avr LRA port modified an assert
which can be wrong for targets using hard frame pointer different from
frame pointer. Also for such ports spilling pseudos assigned to fp
was wrong too in the new code. Although this code is not used for any target
currently using LRA except for avr. Given patch fixes the issues.
gcc/ChangeLog:
* lra-eliminations.cc (update_reg_eliminate): Fix the assert.
(lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
instead of FRAME_POINTER_REGNUM to spill pseudos.
bpf: fixed template for neg (added second operand)
This patch fixes define_insn for "neg" to support 2 operands.
Initial implementation assumed the format "neg %0" while the instruction
allows both a destination and source operands. The second operand can
either be a register or an immediate value.
gcc/ChangeLog:
* config/bpf/bpf.md: fixed template for neg instruction.
Marek Polacek [Tue, 18 Jul 2023 20:02:21 +0000 (16:02 -0400)]
c++: fix ICE with is_really_empty_class [PR110106]
is_really_empty_class is liable to crash when it gets an incomplete
or dependent type. Since r11-557, we pass the yet-uninstantiated
class type S<0> of the PARM_DECL s to is_really_empty_class -- because
of the potential_rvalue_constant_expression -> is_rvalue_constant_expression
change in cp_parser_constant_expression. Here we're not parsing
a template so we did not check COMPLETE_TYPE_P as we should.
It should work to complete the type before checking COMPLETE_TYPE_P.
PR c++/110106
gcc/cp/ChangeLog:
* constexpr.cc (potential_constant_expression_1): Try to complete the
type when !processing_template_decl.
Jan Hubicka [Fri, 21 Jul 2023 17:38:26 +0000 (19:38 +0200)]
Avoid scaling flat loop profiles of vectorized loops
As discussed, when vectorizing loop with static profile, it is not always good idea
to divide the header frequency by vectorization factor because the profile may
not realistically represent the expected number of iterations. Since in such cases
we default to relatively low iteration counts (based on average for spec2k17), this
will make vectorized loop body look cold.
This patch makes vectorizer to look for flat profiles and only possibly reduce the
profile by known upper bound on iteration counts.
gcc/ChangeLog:
PR target/110727
* tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
profiles by vectorization factor.
(vect_transform_loop): Check for flat profiles.
Jan Hubicka [Fri, 21 Jul 2023 15:34:31 +0000 (17:34 +0200)]
Implement flat loop profile detection
This patch adds maybe_flat_loop_profile which can be used in loop profile udpate
to detect situation where the profile may be unrealistically flat and should
not be dwonscalled after vectorizing, unrolling and other transforms that
assume that loop has high iteration count even if the CFG profile says
otherwise.
Profile is flat if it was statically detected and at that time we had
no idea about actual number of iterations or we artificially capped them.
So the function considers flat all profiles that have guessed or lower
reliability in their count and there is no nb_iteration_bounds/estimate
which would prove that the profile iteration count is high enough.
gcc/ChangeLog:
* cfgloop.h (maybe_flat_loop_profile): Declare
* cfgloopanal.cc (maybe_flat_loop_profile): New function.
* tree-cfg.cc (print_loop_info): Print info about flat profiles.
Jan Hubicka [Fri, 21 Jul 2023 15:31:34 +0000 (17:31 +0200)]
Fix gcc.dg/tree-ssa/copy-headers-9.c and gcc.dg/tree-ssa/dce-1.c failures
This patch fixes template in the two testcases so it matches the output
correctly. I did not re-test after last changes in the previous patch,
sorry for that.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/copy-headers-9.c: Fix template for tree-ssa-loop-ch.cc changes.
* gcc.dg/tree-ssa/dce-1.c: Likewise.
Jan Hubicka [Fri, 21 Jul 2023 14:44:01 +0000 (16:44 +0200)]
Fix sreal::to_int and implement sreal::to_nearest_int
while exploring new loop estimate dumps, I noticed that loop iterating 1.8
times by profile is etimated as iterating once instead of 2 by nb_estimate.
While nb_estimate should really be a sreal and I will convert it incrementally,
I found problem is in previous patch doing:
+ *nit = (snit + 0.5).to_int ();
this does not work for sreal because it has only constructor from integer, so
first 0.5 is rounded to 0 and then added to snit.
Some code uses sreal(1, -1) which produces 0.5, but it reuqires unnecessary
addition, so I decided to add to_nearest_int. Testing it I noticed that to_int
is buggy:
(sreal(3)/2).to_int () == 1
while
(sreal(-3)/2).to_int () == -2
Fix is easy, we need to correctly shift in positive values. This patch fixes
it and adds the to_nearest_int alternative.
Jan Hubicka [Fri, 21 Jul 2023 12:54:23 +0000 (14:54 +0200)]
loop-ch improvements, part 5
Currently loop-ch skips all do-while loops. But when loop is not do-while
in addition to original goal of turining it to do-while it can do additional
things:
1) move out loop invariant computations
2) duplicate loop invariant conditionals and eliminate them in loop body.
3) prove that some exits are always true in first iteration
and can be skipped
Most of time 1 can be done by lim (exception is when the invariant computation
is conditional). For 2 we however don't really have other place doing it except
for loop unswitching that is more expensive (it will duplicate the loop and
then optimize out one path to non-loop).
3 can be done by loop peeling but it is also more expensive by duplicating full
loop body.
This patch improves heuristics by not giving up on do-while loops and trying
to find sequence of BBs to duplicate to obtain one of goals:
- turn loop to do-while
- eliminate invariant conditional in loop body
- do partial "peeling" as long as code optimizes enough so this does not
increase code size.
Bootstrapped/regtested x86_64-linux, OK?
gcc/ChangeLog:
* tree-ssa-loop-ch.cc (enum ch_decision): New enum.
(should_duplicate_loop_header_p): Return info on profitability.
(do_while_loop_p): Watch for constant conditionals.
(update_profile_after_ch): Do not sanity check that all
static exits are taken.
(ch_base::copy_headers): Run on all loops.
(pass_ch::process_loop_p): Improve heuristics by handling also
do_while loop and duplicating shortest sequence containing all
winning blocks.
gcc/testsuite/ChangeLog:
* gcc.dg/loop-unswitch-17.c: Disable ch.
* gcc.dg/pr103079.c: Disable ch.
* gcc.dg/tree-ssa/copy-headers-7.c: Update so ch behaves
as expected.
* gcc.dg/tree-ssa/copy-headers.c: Update template.
* gcc.dg/tree-ssa/copy-headers-9.c: New test.
gcc.dg/tree-ssa/forwprop-12.c looks for reconstruction of an
ARRAY_REF from pointer arithmetic and dereference. That's not
safe because ARRAY_REFs carry special semantics we later exploit
during data dependence analysis.
The following removes the testcase, closing the bug as WONTFIX.
Jan Hubicka [Fri, 21 Jul 2023 11:57:34 +0000 (13:57 +0200)]
finite_loop_p tweak
We have finite_p flag in loop structure. finite_loop_p already know to
use it, but we also may set the flag when we prove loop to be finite by
SCEV analysis to avoid duplicated work.
Bootstrapped/regtested x86_64-linux, OK?
gcc/ChangeLog:
* tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
tests first; update finite_p flag.
Jan Hubicka [Fri, 21 Jul 2023 11:38:29 +0000 (13:38 +0200)]
improfe loop dumps
we have flow_loop_dump and print_loop. While print_loop was extended to dump
stuff from loop structure we added over years (loop info), flow_loop_dump was not.
-fdump-tree-all files contains flow_loop_dump which makes it hard to see what
metadata we have attached to loop.
This patch unifies dumping of these fields from both functions. For example for:
int a[100];
main()
{
for (int i = 0; i < 10; i++)
a[i]=i;
}
we now print:
;; Loop 0
;; header 0, latch 1
;; depth 0, outer -1
;; nodes: 0 1 2 3 4 5
;;
;; Loop 1
;; header 4, latch 3
;; depth 1, outer 0, finite_p
;; upper_bound 10
;; likely_upper_bound 10
;; estimate 10
;; iterations by profile: 10.001101 (unreliable)
finite_p, upper_boud, likely_upper_bound estimate and iterations by profile is new.
Bootstrap/regtest on x86_64 in progress. OK if it passes?
Honza
gcc/ChangeLog:
* cfgloop.cc (flow_loop_dump): Use print_loop_info.
* cfgloop.h (print_loop_info): Declare.
* tree-cfg.cc (print_loop_info): Break out from ...; add
printing of missing fields and profile
(print_loop): ... here.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/dce-1.c: Update for new loop dumps.
cleanup: make all cond_len_* and mask_len_* consistent on the order of mask and len
This patch is depending on:
https://gcc.gnu.org/pipermail/gcc-patches/2023-July/625121.html
Hi, Richard and Richi.
This patch is to align the order of mask and len.
Currently, According to this piece code:
if (final_len && final_mask)
call = gimple_build_call_internal (
IFN_LEN_MASK_GATHER_LOAD, 7, dataref_ptr,
vec_offset, scale, zero, final_mask, final_len,
bias);
You can see the order of mask and len, is {mask,len,bias}.
"mask" comes before "len". The reason of this order is that we want to
reuse the current codes of MASK_GATHER_LOAD/MASK_SCATTER_STORE.
Same situation for COND_LEN_*, we want to reuse the codes of COND_*.
Reusing codes from the existing MASK_* or COND_* can allow us not to
change the codes too much and make the codes elegant and easy to maintain && read.
To avoid any confusions of auto-vectorization patterns that includes both mask and len,
this patch align the order of mask and len for both Gimple IR and RTL pattern into
{mask, len, bias} to make everything cleaner and more elegant.
Since start from LEN_MASK_GATHER_LOAD/LEN_MASK_SCATTER_STORE, COND_LEN_* patterns,
the order of len and mask is {mask,len,bias}.
The reason we make "mask" argument comes before "len" is because we want to keep
the "mask" location same as mask_* or cond_* patterns to make use of current codes flow
of mask_* and cond_*. Otherwise, we will need to change codes much more and make codes
hard to maintain.
Now, we already have COND_LEN_*, it's naturally that we should rename "LEN_MASK" into "MASK_LEN"
to keep name scheme consistent.
This patch only changes the name "LEN_MASK" into "MASK_LEN".
No codes functionality change.
Richard Biener [Thu, 13 Jul 2023 06:58:58 +0000 (08:58 +0200)]
tree-optimization/88540 - FP x > y ? x : y if-conversion without -ffast-math
The following makes sure that FP x > y ? x : y style max/min operations
are if-converted at the GIMPLE level. While we can neither match
it to MAX_EXPR nor .FMAX as both have different semantics with IEEE
than the ternary ?: operation we can make sure to maintain this form
as a COND_EXPR so backends have the chance to match this to instructions
their ISA offers.
The patch does this in phiopt where we recognize min/max and instead
of giving up when we have to honor NaNs we alter the generated code
to a COND_EXPR.
This resolves PR88540 and we can then SLP vectorize the min operation
for its testcase. It also resolves part of the regressions observed
with the change matching bit-inserts of bit-field-refs to vec_perm.
Expansion from a COND_EXPR rather than from compare-and-branch
gcc.target/i386/pr54855-9.c by producing extra moves while the
corresponding min/max operations are now already synthesized by
RTL expansion, register selection isn't optimal. This can be also
provoked without this change by altering the operand order in the source.
I have XFAILed that part of the test.
PR tree-optimization/88540
* tree-ssa-phiopt.cc (minmax_replacement): Do not give up
with NaNs but handle the simple case by if-converting to a
COND_EXPR.
This adds a simple match pattern to simplify
`max<max<a,b>,a>` to `max<a,b>`. Reassociation handles
this already (r0-77700-ge969dbde29bfd396259357) but
seems like we should be able to handle this even before
reassociation.
This fixes part of PR tree-optimization/80574 but more
work is needed fix it the rest of the way. The original
testcase there is fixed but the RTL level is what fixes
it the rest of the way.
OK? Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
transformation.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/reassoc-12.c: Disable all of
the passes that enables match-and-simplify.
* gcc.dg/tree-ssa/minmax-23.c: New test.
Richard Biener [Thu, 20 Jul 2023 11:09:17 +0000 (13:09 +0200)]
tree-optimization/110742 - fix latent issue with permuting existing vectors
When we materialize a layout we push edge permutes to constant/external
defs without checking we can actually do so. For externals defined
by vector stmts rather than scalar components we can't.
PR tree-optimization/110742
* tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
Do not materialize an edge permutation in an external node with
vector defs.
(vect_slp_analyze_node_operations_1): Guard purely internal
nodes better.
Jan Hubicka [Fri, 21 Jul 2023 06:52:00 +0000 (08:52 +0200)]
Cleanup expected_loop_iterations
this patch cleanups API for determining expected loop iteraitons from profile.
We started with having expected_loop_iterations and only source was the integer
represented BB counts. It did some work on guessing number of iteration if
profile was absent or bogus. Later we introduced loop_info and added
get_estimated_loop_iterations which made expected_loop_iterations useful mostly
when doing profile updates and not for loop optimization heuristics. The
naming is bit ambiguous so this difference is not clear. Even later we
introduced precision tracking to profile and exended the API to return
reliablity of result but did not update all uses to do reasonable stuff with
it. There is also some cofusion about +-1s concering latch execution counts
versus header execution counts.
This patch aims to obsolette expected_loop_iterations and
expected_loop_iterations_unbounded (and "suceeds" modulo 1 use of each of two).
It adds expected_loop_iterations_by_profile which computes sreal and does
correct precision/presence tracking.
Unlike old code, it is based on CFG profile only and does not attempt to
provide fake answer when info is missing and does not check sanity with
loop_info.
We now define iterations consistently as lath execution in loop_info so I use
that here too.
I converted almost all calls to new API: dumps, code produing loop_info from
CFG profile and profile updating. Remaining uses are in loop unrolling and
prefetching that needs more TLC I will do incrementally.
There are some improvements possible which I can play with incrementally.
- for simple loops with one exit dominating latch we can use exit
probability for easier to preserve info in loop itraionts.
THis is probably not too critical since all esitmates should be recorded
in loop_info and would help mostly if new loop is constructed or old
loop is lost and redicovered.
- We may want to avoid trusting the profile if it is obviously inconsistent
on header.
gcc/ChangeLog:
* cfgloop.cc: Include sreal.h.
(flow_loop_dump): Dump sreal iteration exsitmate.
(get_estimated_loop_iterations): Update.
* cfgloop.h (expected_loop_iterations_by_profile): Declare.
* cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
(expected_loop_iterations_unbounded): Use new API.
* cfgloopmanip.cc (scale_loop_profile): Use
expected_loop_iterations_by_profile
* predict.cc (pass_profile::execute): Likewise.
* profile.cc (branch_prob): Likewise.
* tree-ssa-loop-niter.cc: Include sreal.h.
(estimate_numbers_of_iterations): Likewise
Andrew Pinski [Fri, 21 Jul 2023 02:26:09 +0000 (02:26 +0000)]
libfortran: Fix build for targets that don't have 10byte or 16 byte floating point
So the problem here is EXPAND_INTER_MACRO_16 expands to nothing if 16 byte FP does not
exist but we still add a comma after it and that causes a build failure.
The same is true for EXPAND_INTER_MACRO_10 too.
Committed as obvious after a bootstrap and test on x86_64-linux-gnu and aarch64-linux-gnu.
libgfortran/ChangeLog:
PR libfortran/110759
* ieee/ieee_arithmetic.F90
(COMP_INTERFACE): Remove the comma after EXPAND_INTER_MACRO_16
and EXPAND_INTER_MACRO_10.
(EXPAND_INTER_MACRO_16): Add comma here if 16 byte fp exist.
(EXPAND_INTER_MACRO_10): Likewise.
Kewen Lin [Fri, 21 Jul 2023 05:18:19 +0000 (00:18 -0500)]
sccvn: Correct the index of bias for IFN_LEN_STORE [PR110744]
Commit r14-2267-gb8806f6ffbe72e adjusts the arguments order
of LEN_STORE from {len,vector,bias} to {len,bias,vector},
in order to make them consistent with LEN_MASK_STORE and
MASK_STORE. But it missed to update the related handlings
in tree-ssa-sccvn.cc, it caused the failure shown in PR
110744. This patch is to fix the related handlings with
the correct index.
PR tree-optimization/110744
gcc/ChangeLog:
* tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
operand for ifn IFN_LEN_STORE.
Kewen Lin [Fri, 21 Jul 2023 05:16:29 +0000 (00:16 -0500)]
testsuite: Add a test case for PR110729 [PR110729]
As PR110729 reported, there was one issue for .section
__patchable_function_entries with -ffunction-sections, that
is we put the same symbol as link_to section symbol for all
functions wrongly. The commit r13-4294 for PR99889 has
fixed this with the corresponding label LPFE* which sits in
the function_section.
As Fangrui suggested [1], this patch is to add a bit more
test coverage. I didn't find a good way to check all
linked_to symbols are different, so I checked for LPFE[012].
liuhongt [Fri, 12 May 2023 07:15:08 +0000 (15:15 +0800)]
Provide -fcf-protection=branch,return.
Use EnumSet instead of EnumBitSet since CF_FULL is not power of 2.
It is a bit tricky for sets classification, cf_branch and cf_return
should be in different sets, but they both "conflicts" cf_full,
cf_none. And current EnumSet don't handle this well.
So in the current implementation, only cf_full,cf_none are exclusive
to each other, but they can be combined with any cf_branch, cf_return,
cf_check. It's not perfect, but still an improvement than original
one.
gcc/ChangeLog:
PR target/89701
* common.opt: (fcf-protection=): Add EnumSet attribute to
support combination of params.
gcc/testsuite/ChangeLog:
* c-c++-common/fcf-protection-10.c: New test.
* c-c++-common/fcf-protection-11.c: New test.
* c-c++-common/fcf-protection-12.c: New test.
* c-c++-common/fcf-protection-8.c: New test.
* c-c++-common/fcf-protection-9.c: New test.
* gcc.target/i386/pr89701-1.c: New test.
* gcc.target/i386/pr89701-2.c: New test.
* gcc.target/i386/pr89701-3.c: New test.
> I see some regressions most likely with this change on i686-linux,
> in particular:
> +FAIL: gcc.dg/pr107547.c (test for excess errors)
> +FAIL: gcc.dg/torture/floatn-convert.c -O0 (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c -O0 compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c -O1 (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c -O1 compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c -O2 (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c -O2 compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c -O2 -flto (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c -O2 -flto compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c -O2 -flto -flto-partition=none (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c -O2 -flto -flto-partition=none compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c -O3 -fomit-frame-pointer -funroll-loops -fpeel-loops -ftracer -finline-functions compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c -O3 -g (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c -O3 -g compilation failed to produce executable
> +FAIL: gcc.dg/torture/floatn-convert.c -Os (test for excess errors)
> +UNRESOLVED: gcc.dg/torture/floatn-convert.c -Os compilation failed to produce executable
> +FAIL: gcc.target/i386/float16-7.c (test for errors, line 7)
>
> Perhaps we need to tweak
> gcc/testsuite/lib/target-supports.exp (add_options_for_float16)
> so that it adds -msse2 for i?86-*-* x86_64-*-* (that would likely
> fix up floatn-convert) and for the others perhaps
> /* { dg-add-options float16 } */
> ?
David Malcolm [Fri, 21 Jul 2023 00:24:10 +0000 (20:24 -0400)]
analyzer: avoid usage of TYPE_PRECISION on vector types [PR110455]
gcc/analyzer/ChangeLog:
PR analyzer/110455
* region-model.cc (region_model::get_gassign_result): Only check
for bad shift counts when dealing with an integral type.
gcc/testsuite/ChangeLog:
PR analyzer/110455
* gcc.dg/analyzer/pr110455.c: New test.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
David Malcolm [Fri, 21 Jul 2023 00:24:01 +0000 (20:24 -0400)]
analyzer: fix ICE on certain pointer subtractions [PR110387]
gcc/analyzer/ChangeLog:
PR analyzer/110387
* region.h (struct cast_region::key_t): Support "m_type" being
null by using "m_original_region" for empty/deleted slots.
gcc/testsuite/ChangeLog:
PR analyzer/110387
* gcc.dg/analyzer/out-of-bounds-pr110387.c: New test.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
Gaius Mulley [Thu, 20 Jul 2023 21:32:22 +0000 (22:32 +0100)]
[modula2] Implement limited VAR parameter static analysis
This patch implements limited VAR parameter static analysis for pointer
parameters.
gcc/m2/ChangeLog:
* gm2-compiler/M2SymInit.mod (IsExempt): Remove parameter exemption.
(CheckIndrX): Call SetupLAlias between lhs and content.
(trashParam): Re-write.
(SetVarLRInitialized): Indicate shadow and heap are initialized.
Call SetupIndr between shadow and heap.
* gm2-compiler/P2SymBuild.mod: Import
PutProcedureParameterHeapVars.
(EndBuildProcedure): Call PutProcedureParameterHeapVars.
* gm2-compiler/SymbolTable.def (GetParameterHeapVar): New
procedure function.
(PutProcedureParameterHeapVars): New procedure function.
* gm2-compiler/SymbolTable.mod (MakeParameterHeapVar): New
procedure function.
(GetParameterHeapVar): New procedure function.
(PuttParameterHeapVar): New procedure function.
(PutProcedureParameterHeapVars): New procedure.
(VarParam): HeapVar new record field.
(PutVarParam): HeapVar assigned to NulSym.
gcc/testsuite/ChangeLog:
* gm2/switches/uninit-variable-checking/procedures/fail/testdispose3.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/fail/testdispose4.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/pass/testdispose3.mod: New test.
* gm2/switches/uninit-variable-checking/procedures/pass/testdispose4.mod: New test.
Ian Lance Taylor [Thu, 20 Jul 2023 18:21:13 +0000 (11:21 -0700)]
cmd/go: don't collect package CGOLDFLAGS when using gccgo
They are already collected via cmd/cgo.
The gccgo_link_c test is tweaked to do real linking as with this
change the cgo ldflags are not fully reflected in go build -n output,
since they now only come from the built archive.
This is a backport of https://go.dev/cl/497117 from the main repo.
When sign-extending the value in a double-word register pair using shift and
ashiftrt sequence with the same count immediate value less than word width,
there is no need to shift the lower word of the value. The sign-extension
could be limited to the upper word, but we uselessly shift the lower word
with it as well:
movq %rdi, %rax
movq %rsi, %rdx
shldq $59, %rdi, %rdx
salq $59, %rax
shrdq $59, %rdx, %rax
sarq $59, %rdx
ret
for -m64 and
movl 4(%esp), %eax
movl 8(%esp), %edx
shldl $27, %eax, %edx
sall $27, %eax
shrdl $27, %edx, %eax
sarl $27, %edx
ret
for -m32.
The patch introduces a new post-reload splitter to provide the combined
ASHIFTRT/SHIFT instruction pattern. The instruction is split to a sequence
of SAL and SAR insns with the same count immediate operand:
movq %rsi, %rdx
movq %rdi, %rax
salq $59, %rdx
sarq $59, %rdx
ret
Some complication is required to properly handle STV transform, where we
emit a sequence with DImode PSLLQ and PSRAQ insns for 32-bit AVX512VL
targets when profitable.
The patch also fixes a small oversight and enables STV transform of SImode
ASHIFTRT to PSRAD also for SSE2 targets.
PR target/110717
gcc/ChangeLog:
* config/i386/i386-features.cc
(general_scalar_chain::compute_convert_gain): Calculate gain
for extend higpart case.
(general_scalar_chain::convert_op): Handle
ASHIFTRT/ASHIFT combined RTX.
(general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
* config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
New define_insn_and_split pattern.
(*extendv2di2_highpart_stv): Ditto.
[LRA]: Exclude reloading of frame pointer in subreg for some cases
LRA for avr port reloads frame pointer in subreg although we can just
simplify the subreg. It results in generation of bad performance code. The following
patch fixes this.
libgomp.texi: Split OpenMP routines chapter into sections
The previous list of OpenMP routines was rather lengthy and the order seemed
to be rather random - especially for outputs which did not have @menu as then
the sectioning was not visible.
The OpenMP specification split in 5.1 the lengthy list by adding
sections to the chapter and grouping the routines under them.
This patch follow suite and uses the same sections and order. The commit also
prepares for adding not-yet-documented routines by listening those in the
@menu (@c commented - both for just undocumented and for also unimplemented
routines). See also PR 110364.
libgomp/ChangeLog:
* libgomp.texi (OpenMP Runtime Library Routines):
Split long list by adding sections and moving routines there.
(OMP_ALLOCATORS): Fix typo.
Andrew Pinski [Sat, 21 Sep 2019 01:27:34 +0000 (01:27 +0000)]
Move combine over to statistics_counter_event.
Since we have statistics_counter_event now, combine should use that
instead of it is own custom printing of statistics.
The only thing that is not done any more after this patch is printing
out the total stats for the whole TU.
Note you need to use -fdump-rtl-combine-stats to get the stats in the combine
dump unlike before where the stats was dumped directly into the file.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
Marek Polacek [Wed, 19 Jul 2023 12:47:29 +0000 (08:47 -0400)]
c++: fix ICE with designated initializer [PR110114]
r13-1227 added an assert checking that the index in a CONSTRUCTOR
is a FIELD_DECL. That's a reasonable assumption but in this case
we never called reshape_init due to the type being incomplete, and
so the index remained an identifier node: get_class_binding never
got around to looking up the FIELD_DECL.
We can avoid the crash by returning early in implicit_conversion_1; we'd
return NULL anyway due to:
if (i < CONSTRUCTOR_NELTS (ctor))
return NULL;
in build_aggr_conv.
PR c++/110114
gcc/cp/ChangeLog:
* call.cc (implicit_conversion_1): Return early if the type isn't
complete.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/initlist100.C: Adjust expected diagnostic.
* g++.dg/cpp2a/desig28.C: New test.
* g++.dg/cpp2a/desig29.C: New test.
I plan to refine the codes that I recently support for RVV auto-vectorization.
This patch is inspired last review comments from Richard:
https://patchwork.sourceware.org/project/gcc/patch/20230712042124.111818-1-juzhe.zhong@rivai.ai/
Richard said he prefer the the code structure as follows:
Please instead switch the if condition so that the structure is:
if (...)
vect_record_loop_mask (...)
else if (...)
vect_record_loop_len (...)
else
can't use partial vectors
This is his last comments.
So, I come back to refine this piece of codes.
Does it look reasonable ?
This next refine patch is change all names of "LEN_MASK" into "MASK_LEN" but should come after this
patch.
Jan Hubicka [Thu, 20 Jul 2023 13:41:39 +0000 (15:41 +0200)]
loop-ch improvements, part 3
Make tree-ssa-loop-ch understand if-combined conditionals (which
are quite common) and remove the IV-derived heuristics. That heuristics is
quite dubious because every variable with PHI in header of integral or pointer
type is seen as IV, so in the first basic block we match all loop invariants as
invariants and everything that chagnes in loop as IV-like.
I think the heuristics was mostly there to make header duplication happen when
the exit conditional is constant false in the first iteration and with ranger
we can work this out in good enough precision.
The patch adds notion of "combined exit" which has conditional that is
and/or/xor of loop invariant exit and exit known to be false in first
iteration. Copying these is a win since the loop conditional will simplify
in both copies.
It seems that those are usual bit or/and/xor and the code size accounting is
true only when the values have at most one bit set or when the static constant
and invariant versions are simple (such as all zeros). I am not testing this,
so the code may be optimistic here. I think it is not common enough to matter
and I can not think of correct condition that is not quite complex.
I also improved code size estimate not accounting non-conditionals that are
know to be constant in peeled copy and improved debug output.
This requires testsuite compensaiton. uninit-pred-loop-1.c.C does:
extern int bar();
int foo(int n, int m)
{
for (;;) {
int err = ({int _err;
for (int i = 0; i < 16; ++i) {
if (m+i > n)
break;
_err = 17;
_err = bar();
}
_err;
});
if (err == 0) return 17;
}
Before path we duplicate
if (m+i > n)
which makes maybe-uninitialized warning to not be output. I do not quite see
why copying this out would be a win, since it won't simlify. Also I think the
warning is correct. if m>n the loop will bail out before initializing _err and
it will be used unitialized. I think it is bug elsewhere that header
duplication supresses this.
copy headers does:
int is_sorted(int *a, int n, int m, int k)
{
for (int i = 0; i < n - 1 && m && k > i; i++)
if (a[i] > a[i + 1])
return 0;
return 1;
}
it tests that all three for statement conditionals are duplicaed. With patch
we no longer do k>i since it is not going to simplify. So I added test
ensuring that k is positive. Also the tests requires disabling if-combining and
vrp to avoid conditionals becoming combined ones. So I aded new version of test
that we now behave correctly aslo with if-combine.
ivopt_mult_2.c and ivopt_mult_1.c seems to require loop header
duplication for ivopts to behave particular way, so I also ensured by value
range that the header is duplicated.
Bootstrapped/regtested x86_64-linux, OK?
gcc/ChangeLog:
* tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
(get_range_query): ... this one; do
(static_loop_exit): Add query parametr, turn ranger to reference.
(loop_static_stmt_p): New function.
(loop_static_op_p): New function.
(loop_iv_derived_p): Remove.
(loop_combined_static_and_iv_p): New function.
(should_duplicate_loop_header_p): Discover combined onditionals;
do not track iv derived; improve dumps.
(pass_ch::execute): Fix whitespace.
gcc/testsuite/ChangeLog:
* g++.dg/uninit-pred-loop-1_c.C: Allow warning.
* gcc.dg/tree-ssa/copy-headers-7.c: Add tests so exit conditition is
static; update template.
* gcc.dg/tree-ssa/ivopt_mult_1.c: Add test so exit condition is static.
* gcc.dg/tree-ssa/ivopt_mult_2.c: Add test so exit condition is static.
* gcc.dg/tree-ssa/copy-headers-8.c: New test.
Richard Biener [Mon, 17 Jul 2023 10:15:29 +0000 (12:15 +0200)]
tree-optimization/110204 - second level redundancy and simplification
When PRE discovers a full redundancy during insertion it cannot unite
the two value sets. Instead it inserts a copy old-val = new-val where
new-val can also be a constant. The following looks through such
copies during elimination, providing one extra level of constant and
copy propagation. For the PR this helps avoiding a bogus diagnostic
that's emitted on unreachable code during loop optimization.
PR tree-optimization/110204
* tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
Look through copies generated by PRE.
vectorizer: Avoid an OOB access from vectorization
Our checks for whether the vectorization of a given loop would make an
out of bounds access miss the case when the vector we load is so large
as to span multiple iterations worth of data (while only being there to
implement a single iteration).
This patch adds a check for such an access.
Example where this was going wrong (smaller version of testcase added):
```
extern unsigned short multi_array[5][16][16];
extern void initialise_s(int *);
extern int get_sval();
void foo() {
int s0 = get_sval();
int s[31];
int i,j;
initialise_s(&s[0]);
s0 = get_sval();
for (j=0; j < 16; j++)
for (i=0; i < 16; i++)
multi_array[1][j][i]=s[j*2];
}
```
With the above loop we would load the `s[j*2]` integer into a 4 element
vector, which reads 3 extra elements than the scalar loop would.
`get_group_load_store_type` identifies that the loop requires a scalar
epilogue due to gaps. However we do not identify that the above code
requires *two* scalar loops to be peeled due to the fact that each
iteration loads an amount of data from the *next* iteration (while not
using it).
Bootstrapped and regtested on aarch64-none-linux-gnu.
N.b. out of interest we came across this working with Morello.
gcc/ChangeLog:
* tree-vect-stmts.cc (get_group_load_store_type): Account for
`gap` when checking if need to peel twice.
Fortran: add IEEE_QUIET_* and IEEE_SIGNALING_* comparisons
Those operations were added to Fortran 2018, and correspond to
well-defined IEEE comparison operations, with defined signaling
semantics for NaNs. All are implemented in terms of GCC expressions and
built-ins, with no library support needed.
iseqsig() is a C2x library function, for signaling floating-point
equality checks. Provide a GCC-builtin for it, which is folded to
a series of comparisons.
gcc/testsuite/
* gcc.dg/torture/builtin-iseqsig-1.c: New test.
* gcc.dg/torture/builtin-iseqsig-2.c: New test.
* gcc.dg/torture/builtin-iseqsig-3.c: New test.
Pan Li [Thu, 20 Jul 2023 08:31:10 +0000 (16:31 +0800)]
RISC-V: Fix one incorrect match operand for RVV reduction
There are 2 of the RVV reduction pattern mask operand takes
vector_merge_operand instead of vector_mask_operand by mistake. This
patch would like to fix this.
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
Roger Sayle [Thu, 20 Jul 2023 08:23:11 +0000 (09:23 +0100)]
i386: More TImode parameter passing improvements.
This patch is the next piece of a solution to the x86_64 ABI issues in
PR 88873. This splits the *concat<mode><dwi>3_3 define_insn_and_split
into two patterns, a TARGET_64BIT *concatditi3_3 and a !TARGET_64BIT
*concatsidi3_3. This allows us to add an additional alternative to the
the 64-bit version, enabling the register allocator to perform this
operation using SSE registers, which is implemented/split after reload
using vec_concatv2di.
To demonstrate the improvement, the test case from PR88873:
typedef struct { double x, y; } s_t;
s_t foo (s_t a, s_t b, s_t c)
{
return (s_t){ __builtin_fma(a.x, b.x, c.x), __builtin_fma (a.y, b.y, c.y) };
}
when compiled with -O2 -march=cascadelake, currently generates:
2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* config/i386/i386-expand.cc (ix86_expand_move): Don't call
force_reg, to use SUBREG rather than create a new pseudo when
inserting DFmode fields into TImode with insvti_{high,low}part.
* config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
define_insn_and_split...
(*concatditi3_3): 64-bit implementation. Provide alternative
that allows register allocation to use SSE registers that is
split into vec_concatv2di after reload.
(*concatsidi3_3): 32-bit implementation.
gcc/testsuite/ChangeLog
* gcc.target/i386/pr88873.c: New test case.
Richard Biener [Tue, 18 Jul 2023 11:19:11 +0000 (13:19 +0200)]
middle-end/61747 - conditional move expansion and constants
When expanding a COND_EXPR or a VEC_COND_EXPR the x86 backend for
example tries to match FP min/max instructions. But this only
works when it can see the equality of the comparison and selected
operands. This breaks in both prepare_cmp_insn and vector_compare_rtx
where the former forces expensive constants to a register and the
latter performs legitimization. The patch below fixes this in
the caller preserving former equalities.
PR middle-end/61747
* internal-fn.cc (expand_vec_cond_optab_fn): When the
value operands are equal to the original comparison operands
preserve that equality by re-using the comparison expansion.
* optabs.cc (emit_conditional_move): When the value operands
are equal to the comparison operands and would be forced to
a register by prepare_cmp_insn do so earlier, preserving the
equality.
projects / thirdparty / gcc.git / log
