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3 months agoMerge tag 'u-boot-at91-2024.04-a' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Wed, 31 Jan 2024 15:44:33 +0000 (10:44 -0500)] 
Merge tag 'u-boot-at91-2024.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91

First set of u-boot-at91 features for the 2024.04 cycle:

This set includes some DT alignments and solves a compile issue for
custom nand defconfigs.

3 months agoMerge https://source.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Wed, 31 Jan 2024 13:49:35 +0000 (08:49 -0500)] 
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv

* Add RISC-V falcon mode documentation
* Add Clang build support
* Add cmd to detect Debug Trigger Extension support

* Add PWM setting for Unmatched board
* Add Milk-V Duo board support
* Add new device node and enable new config option for VisionFive2 board
* Add second virtio device for RISC-V QEMU

3 months agoriscv: dts: starfive: add regulator device
Nam Cao [Mon, 29 Jan 2024 08:43:09 +0000 (09:43 +0100)] 
riscv: dts: starfive: add regulator device

Add the axp15060 regulator device. OpenSBI uses this device to perform
board reset and shutdown.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agoriscv: dts: jh7110: add power management unit controller node
Nam Cao [Mon, 29 Jan 2024 08:43:08 +0000 (09:43 +0100)] 
riscv: dts: jh7110: add power management unit controller node

JH7110 has a power management unit controller node. Add this node.

This device is used by OpenSBI during board reset/shutdown.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agoboard: visionfive2: configure PHY pad drive strength
Lukasz Tekieli [Sun, 28 Jan 2024 19:22:48 +0000 (20:22 +0100)] 
board: visionfive2: configure PHY pad drive strength

Configure the pad drive strength register for both PHYs.
The values correspond to what can be found in the Linux DTS
for VisionFive2 v1.3b.

Pad drive strength configuration is required for the phy0 to work correctly
with 100Mbit links.

Signed-off-by: Lukasz Tekieli <tekieli.lukasz@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agonet: phy: motorcomm: configure pad drive strength register
Lukasz Tekieli [Sun, 28 Jan 2024 19:22:47 +0000 (20:22 +0100)] 
net: phy: motorcomm: configure pad drive strength register

This ports the pad drive strength register configuration which can be
already found in the Linux driver for this PHY.

Signed-off-by: Lukasz Tekieli <tekieli.lukasz@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agodoc: sophgo: milkv_duo: document Milk-V Duo board
Kongyang Liu [Sun, 28 Jan 2024 07:05:26 +0000 (15:05 +0800)] 
doc: sophgo: milkv_duo: document Milk-V Duo board

Add document for Milk-V Duo board which based on Sophgo's CV1800B SoC.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agoriscv: sophgo: milkv_duo: initial support added
Kongyang Liu [Sun, 28 Jan 2024 07:05:25 +0000 (15:05 +0800)] 
riscv: sophgo: milkv_duo: initial support added

Add support for Sophgo's Milk-V Duo board, only minimal device tree and
serial console are enabled, and it can boot via vendor first stage
bootloader.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agoriscv: dts: sophgo: add basic device tree for Milk-V Duo board
Kongyang Liu [Sun, 28 Jan 2024 07:05:24 +0000 (15:05 +0800)] 
riscv: dts: sophgo: add basic device tree for Milk-V Duo board

Import device tree from Linux kernel to add basic support for CPU, PLIC,
UART and Timer. The name cv1800b in the filename represent the chip used
on Milk-V Duo board.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agoconfigs: visionfive2: Disable ENV_IS_NOWHERE
Aurelien Jarno [Sat, 27 Jan 2024 13:48:45 +0000 (14:48 +0100)] 
configs: visionfive2: Disable ENV_IS_NOWHERE

The VisionFive 2 board supports saving the u-boot environment settings
are saved to on-board SPI flash. However the defconfig enables both
ENV_IS_NOWHERE and ENV_IS_IN_SPI_FLASH, preventing the "saveenv" command
to work. Fix that by disabling ENV_IS_NOWHERE.

Fixes: 7d79bed00c9e ("configs: starfive: Enable environment in SPI flash support")
Reported-by: E Shattow <lucent@gmail.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agoriscv: Support building with Clang
kleines Filmröllchen [Thu, 25 Jan 2024 14:06:59 +0000 (15:06 +0100)] 
riscv: Support building with Clang

The -ffixed-gp option of GCC has an exact equivalent of -ffixed-x3 in
Clang.

Signed-off-by: kleines Filmröllchen <filmroellchen@serenityos.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 months agocmd: sbi: add support for Debug Trigger Extension
Heinrich Schuchardt [Wed, 17 Jan 2024 16:46:52 +0000 (17:46 +0100)] 
cmd: sbi: add support for Debug Trigger Extension

Detect and show if the SBI implements the Debug Trigger Extension.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agoboard: sifive: spl: Initialized the PWM setting in the SPL stage
Vincent Chen [Tue, 16 Jan 2024 06:35:57 +0000 (14:35 +0800)] 
board: sifive: spl: Initialized the PWM setting in the SPL stage

LEDs and multiple fans can be controlled by SPL. This patch ensures
that all fans have been enabled in the SPL stage. In addition, the
LED's color will be set to yellow.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Co-developed-by: Nylon Chen <nylon.chen@sifive.com>
Signed-off-by: Nylon Chen <nylon.chen@sifive.com>
Co-developed-by: Zong Li <zong.li@sifve.com>
Signed-off-by: Zong Li <zong.li@sifve.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agoriscv: qemu: enable booting on a second virtio device
Aurelien Jarno [Wed, 10 Jan 2024 20:26:53 +0000 (21:26 +0100)] 
riscv: qemu: enable booting on a second virtio device

QEMU RISC-V supports multiple virtio devices, but only tries to boot to
the first one. Enable support for a second virtio device, that is useful
for instance to boot on a disk image + an installer. Ideally that should
be made dynamic, but that's a first step.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agoboard: starfive: handle compatible property in dynamic DT configuration
Aurelien Jarno [Wed, 10 Jan 2024 20:17:44 +0000 (21:17 +0100)] 
board: starfive: handle compatible property in dynamic DT configuration

The difference between the StarFive VisionFive 2 1.2A and 1.3B boards is
handled dynamically by looking at the PCB version in the EEPROM in order
to have a single u-boot version for both versions of the board. While
the "model" property is correctly handled, the "compatible" one is
always the the one of version 1.3b.

This patch add support for dynamically configuring that property.

Fixes: 9b7060bd15e7 ("riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B")
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agoconfigs: andes: add the fdt blob copy address for SPL
Randolph [Fri, 29 Dec 2023 08:32:23 +0000 (16:32 +0800)] 
configs: andes: add the fdt blob copy address for SPL

Add the address to which the FDT blob is to be moved.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agospl: riscv: falcon: move fdt blob to specified address
Randolph [Fri, 29 Dec 2023 08:32:22 +0000 (16:32 +0800)] 
spl: riscv: falcon: move fdt blob to specified address

In Falcon Boot mode, the fdt blob should be move to the RAM from
kernel BSS section. To avoid being cleared by BSS initialisation.
SPL_PAYLOAD_ARGS_ADDR is the address where SPL copies.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
3 months agodoc: falcon: riscv: Falcon Mode boot on RISC-V
Randolph [Fri, 29 Dec 2023 08:32:21 +0000 (16:32 +0800)] 
doc: falcon: riscv: Falcon Mode boot on RISC-V

Add documentation to introduce the Falcon Mode on RISC-V.
In this mode, the boot sequence is SPL -> OpenSBI -> Linux kernel.

Signed-off-by: Randolph <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
4 months agoMerge tag 'clk-2024.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-clk
Tom Rini [Tue, 30 Jan 2024 12:54:28 +0000 (07:54 -0500)] 
Merge tag 'clk-2024.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-clk

Clock changes for v2024.04

This pull has the usual fixes and new (clock-adjacent) drivers. It also has some
cleanups for the clock API; in particular removing the unused rfree callback.

CI: https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/19486

4 months agoclk: clk-gpio: add actual gated clock
Svyatoslav Ryhel [Wed, 10 Jan 2024 16:09:56 +0000 (18:09 +0200)] 
clk: clk-gpio: add actual gated clock

Existing gpio-gate-clock driver acts like a simple GPIO switch without any
effect on gated clock. Add actual clock actions into enable/disable ops and
implement get_rate op by passing gated clock if it is enabled.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20240110160956.4476-2-clamor95@gmail.com
[ sorted includes ]
Signed-off-by: Sean Anderson <seanga2@gmail.com>
4 months agoclk: Document clk_ops return codes and behavior
Sean Anderson [Sat, 16 Dec 2023 19:38:43 +0000 (14:38 -0500)] 
clk: Document clk_ops return codes and behavior

Currently, clock consumers cannot take any programmatic action based on the
return code of a clock function. This is because there is no
standardization, and generally no way of separating e.g. "there was a major
problem setting the rate for this clock" which usually should not be
recovered from, from "this clock doesn't support setting its rate" or "this
clock doesn't support *this* rate" which could be absolutely fine depending
on the driver.

This commit aims to standardize the acceptable codes which may be returned
from clock operations. In general,

- ENOSYS should be returned when an operation is not supported for a
  particular clock.
- ENOENT may be returned if the clock ID is invalid. However, it is
  encouraged to move any checks to request() to reduce code duplication.
- EINVAL should be returned for logical errors only (such as requesting an
  invalid rate).

Each function has had specific guidance added for when to return each error
code. This is just guidance for now; most of the clock subsystem does not
yet conform to this standard. However, it is expected that new clock
drivers return these error codes.

Additionally, this commit adds expected behavior for each of the clock
operations. I believe these should be mostly straightforward and correspond
to existing behavior. I remember not understanding what the expected
invariants were for several clock functions, so hopefully this should help
out new driver authors. In the future, some of these invariants could be
checked via an optional config option.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-4-seanga2@gmail.com
4 months agotreewide: Remove clk_free
Sean Anderson [Sat, 16 Dec 2023 19:38:42 +0000 (14:38 -0500)] 
treewide: Remove clk_free

This function is a no-op. Remove it.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com
4 months agoclk: Remove rfree
Sean Anderson [Sat, 16 Dec 2023 19:38:41 +0000 (14:38 -0500)] 
clk: Remove rfree

Nothing uses this function. Remove it. Since clk_free no longer does
anything, just stub it out.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231216193843.2463779-2-seanga2@gmail.com
4 months agoclk: fix clk_get_rate() always return ulong
Julien Masson [Fri, 15 Dec 2023 14:09:43 +0000 (15:09 +0100)] 
clk: fix clk_get_rate() always return ulong

When we call clk_get_rate(), we expect to get clock rate value as
ulong.
In that case we should not use log_ret() macro since it use internally
an int.
Otherwise we may return an invalid/truncated clock rate value.

Signed-off-by: Julien Masson <jmasson@baylibre.com>
Fixes: 5c5992cb90c ("clk: Add debugging for return values")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/87o7erv9p4.fsf@baylibre.com
4 months agoclk: meson: add Hardware Clock measure driver
Neil Armstrong [Mon, 18 Dec 2023 09:47:55 +0000 (10:47 +0100)] 
clk: meson: add Hardware Clock measure driver

Amlogic SoCs embeds an hardware clock measure block, port it
from Linux and implement it as a UCLK_CLK with only the dump
op and fail-only xlate.

Based on the Linux driver introduced in [1].

[1] commit 2b45ebef39a2 ("soc: amlogic: Add Meson Clock Measure driver").

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231218-uboot-meson-clk-msr-v3-1-acf4d90ccfee@linaro.org
4 months agoPrepare v2024.04-rc1 v2024.04-rc1
Tom Rini [Tue, 30 Jan 2024 01:53:19 +0000 (20:53 -0500)] 
Prepare v2024.04-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
4 months agoMerge tag 'efi-2024-04-rc1-4' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Mon, 29 Jan 2024 21:19:10 +0000 (16:19 -0500)] 
Merge tag 'efi-2024-04-rc1-4' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2024-04-rc1-4

Documentation:

* uefi: remove ".py" suffix for pytest.py command
* correct date in migration plan for CONFIG_DM

UEFI:

* fix conflicting SPDX license in RISC-V EFI linker scripts
* page align EFI binary section in RISC-V EFI binaries
* separate .data and .text sections of RISC-V EFI binaries
* use common function to get EFI configuration table

4 months agotools: buildman: fix non-existing SafeConfigParser in Python 3.12+
Quentin Schulz [Tue, 23 Jan 2024 17:57:01 +0000 (18:57 +0100)] 
tools: buildman: fix non-existing SafeConfigParser in Python 3.12+

SafeConfigParser was renamed back in Python 3.2 (yes, no typo) to
ConfigParser[1], but it was still working as an alias until it got
removed in 3.12[2].

[1] https://docs.python.org/3.8/whatsnew/3.2.html#configparser
[2] https://github.com/python/cpython/pull/92503

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
4 months agovideo: console: Fix buffer overflow in cmd 'font list'
Janne Grunau [Wed, 17 Jan 2024 22:29:29 +0000 (23:29 +0100)] 
video: console: Fix buffer overflow in cmd 'font list'

vidconsole_ops.get_font is documented to return -ENOENT after the last
video_fontdata entry.

Signed-off-by: Janne Grunau <j@jannau.net>
4 months agovideo: Support VIDEO_X2R10G10B10 in truetype console
Janne Grunau [Wed, 17 Jan 2024 22:27:34 +0000 (23:27 +0100)] 
video: Support VIDEO_X2R10G10B10 in truetype console

Without explicit support for VIDEO_X2R10G10B10 VIDEO_X8R8G8B8 white
will be rendered as cyan-ish. The conversion leaves to lowest 2 bits
unset for more compact code.

Signed-off-by: Janne Grunau <j@jannau.net>
4 months agoenv: sf: report malloc error to caller
Ralph Siemsen [Fri, 19 Jan 2024 21:32:17 +0000 (16:32 -0500)] 
env: sf: report malloc error to caller

In the non-redundant code for env_sf_save(), a failure to malloc() the
temporary buffer produces the following output:

    Saving Environment to SPIFlash... OK

This is misleading as the flash has neither been erased nor written.

Fix it to return an error to the caller, so the output will be:

    Saving Environment to SPIFlash... Failed (-12)

Note that there is another copy of env_sf_save() in the same file, for
handling redundant environment, and it already has the same logic.

Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
4 months agovideo: tidss: Use DT property names for parsing nodes
Devarsh Thakkar [Wed, 24 Jan 2024 09:07:11 +0000 (14:37 +0530)] 
video: tidss: Use DT property names for parsing nodes

Use device-tree node property names for parsing nodes instead of
indexing as indexing could be different between different SoCs based on
number of DSS entities available on that particular SoC.

Also correct the video layer naming in driver to match to actual one
being used in upstream DSS device-tree node [1].

This also fixes AM62x splash screen usage using the latest upstream DSS
device-tree nodes where hard-coded indexing which driver was using
before this patch was not matching the correct properties in the DT
node.

[1]: Upstream AM62x DSS node:
https://github.com/torvalds/linux/blob/v6.8-rc1/arch/arm64/boot/dts/ti/k3-am62-main.dtsi#L774

Fixes: 5f9f816bb8 ("drivers: video: tidss: TIDSS video driver support for AM62x")
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
4 months agocommon: splash_source: Don't compile ubifs splash cmd for SPL build
Devarsh Thakkar [Wed, 24 Jan 2024 09:05:09 +0000 (14:35 +0530)] 
common: splash_source: Don't compile ubifs splash cmd for SPL build

Don't compile ubifs splash mount command for SPL build as this command
is not supported (and also not enabled) during SPL stage.

This fixes below compilation error, when CONFIG_CMD_UBIFS is enabled in
defconfig along with splash screen enabled at SPL stage:

"aarch64-none-linux-gnu-ld.bfd: common/cli.o: in function `run_command':
u-boot-next/u-boot/common/cli.c:51: undefined reference to
`parse_string_outer'
u-boot-next/u-boot/common/cli.c:51:(.text.run_command+0x10): relocation
truncated to fit: R_AARCH64_JUMP26 against undefined symbol
`parse_string_outer' make[2]: ***
[u-boot-next/u-boot/scripts/Makefile.spl:527: spl/u-boot-spl] Error 1
make[1]: *** [u-boot-next/u-boot/Makefile:2053: spl/u-boot-spl] Error 2
make[1]: Leaving directory 'u-boot-next/u-boot/out/a53' make: ***
[Makefile:177: sub-make] Error 2"

Fixes: eb9217dc03 ("common: Enable splash functions at SPL")
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
4 months agoMerge patch series "Move framebuffer reservation for SPL to RAM end"
Tom Rini [Mon, 29 Jan 2024 19:49:25 +0000 (14:49 -0500)] 
Merge patch series "Move framebuffer reservation for SPL to RAM end"

Devarsh Thakkar <devarsht@ti.com> says:

Move video memory reservation for SPL at end of RAM so that it does
not interefere with reservations for next stage so that the next stage
need not have holes in between for passed regions and instead it can
maintain continuity in reservations.

Also catch the bloblist before starting reservations to avoid the same
problem.

While at it, also fill missing fields in video handoff struct before
passing it to next stage.

This is as per discussions at :
For moving SPL framebuffer reservation at end of RAM:

https://lore.kernel.org/all/CAPnjgZ3xSoe_G3yrqwuAvoiVjUfZ+YQgkOR0ZTVXGT9VK8TwJg@mail.gmail.com/

For filling missing video handoff fields :
https://lore.kernel.org/all/CAPnjgZ1Hs0rNf0JDirp6YPsOQ5=QqQSP9g9qRwLoOASUV8a4cw@mail.gmail.com/

4 months agodoc: spl: Add info regarding memory reservation
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:23 +0000 (21:25 +0530)] 
doc: spl: Add info regarding memory reservation

Add details regarding scheme which need to be followed in SPL and
further stages for those regions which need to be preserved across
bootstages.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium>
4 months agodoc: spl: Add info for missing Kconfigs
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:22 +0000 (21:25 +0530)] 
doc: spl: Add info for missing Kconfigs

Add info regarding splash screen, video, bloblist and GPIO related
Kconfigs which were missing in the documentation.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium>
4 months agovideo: Fill video handoff in video post probe
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:21 +0000 (21:25 +0530)] 
video: Fill video handoff in video post probe

Fill video handoff fields in video_post_probe as at this point we have
full framebuffer-related information.

Also fill all the fields available in video hand-off struct as those
were missing earlier and U-boot framework expects them to be filled for
some of the functionalities.

While filling framebuffer size in video hand-off structure use the
actual framebuffer region size as derived from gd->video_top and
gd->video_bottom instead of directly using the size populated in
video_uc_plat as it contains unaligned size.

Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 months agovideo: Skip framebuffer reservation if already reserved
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:20 +0000 (21:25 +0530)] 
video: Skip framebuffer reservation if already reserved

Skip framebufer reservation if it was already reserved from previous
stage and whose information was passed using a bloblist.

Return error in case framebuffer information received from bloblist is
invalid i.e NULL or empty.

While at it, improve the debug message to make it more clear that
address in discussion is of framebuffer and not bloblist and also match
it with printing scheme followed in video_reserve function.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 months agocommon/board_f: Catch bloblist before starting reservations
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:19 +0000 (21:25 +0530)] 
common/board_f: Catch bloblist before starting reservations

Start reservations needed for init sequence only after catching
bloblists from previous stage.

This is to avoid catching bloblists in the middle causing gaps while
u-boot is reserving.

Adjust the relocaddr as per video hand-off information received from
previous stage so that further reservations start only after regions
reserved for previous stages

Skip reservation for video memory if it was already filled by a
bloblist.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 months agoboard: ti: am62x: evm: Remove video_setup from spl_board_init
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:18 +0000 (21:25 +0530)] 
board: ti: am62x: evm: Remove video_setup from spl_board_init

Remove video_setup from evm_init sequence since video memory is getting
called at an earlier place to make sure video memory is reserved at
the end of RAM.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 months agoarm: mach-k3: common: Reserve video memory from end of the RAM
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:17 +0000 (21:25 +0530)] 
arm: mach-k3: common: Reserve video memory from end of the RAM

Setup video memory before page table reservation using
"spl_reserve_video_from_ram_top" which ensures framebuffer memory gets
reserved from the end of RAM.

This is done to enable the next stage to directly skip the
pre-reserved area from previous stage right from the end of RAM without
having to make any gaps/holes to accommodate those regions which was the
case before as previous stage reserved region not from the end of RAM.

Use gd->ram_top instead of local ram_top and update gd->reloc_addr after
each reservation to ensure further regions are reserved properly.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Nikhil M Jain <n-jain1@ti.com>
4 months agospl: Enforce framebuffer reservation from end of RAM
Devarsh Thakkar [Tue, 5 Dec 2023 15:55:16 +0000 (21:25 +0530)] 
spl: Enforce framebuffer reservation from end of RAM

Add an API which enforces framebuffer reservation from end of RAM.
This is done so that next stage can directly skip this region before
carrying out further reservations.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 months agoboard/sunxi/MAINTAINERS: Add new defconfigs
Tom Rini [Mon, 29 Jan 2024 18:49:29 +0000 (13:49 -0500)] 
board/sunxi/MAINTAINERS: Add new defconfigs

Add entries for the recently added defconfig files. I had thought I had
committed these updates but lost them before pushing the branch.

Signed-off-by: Tom Rini <trini@konsulko.com>
4 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi
Tom Rini [Mon, 29 Jan 2024 17:58:42 +0000 (12:58 -0500)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi

- Support Infineon S28HS02GT (Takahiro)

4 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Mon, 29 Jan 2024 15:57:42 +0000 (10:57 -0500)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi

- Some cleanups in header files: those do not affect the generated
  binaries at all.
- The usual update of DT files from the kernel repo, mostly adding new
  board files this time. On the wake of this there is one defconfig to
  enable a new board, some H618 TV box branded as "Transpeed".
- Samuel's series to support SPL FIT image loading for 32-bit SoCs as
  well, so far this was restricted to ARM64 boards. I refrained from
  automatically enabling this everywhere, instead this requires user
  intervention during board configuration. This allows to ship the
  "crust" management processor firmware on H3 boards, which enables
  better power saving.
- One defconfig for an older H3 board. There was a close-by defconfig
  for a related board, but there are some differences which deserve a
  separate file.
- Support for the EMAC driver to work with fixed-link PHYs, which allows
  to directly wire the MAC to a switch IC.

4 months agoMerge branch '2024-01-29-pytest-enhancements'
Tom Rini [Mon, 29 Jan 2024 15:56:56 +0000 (10:56 -0500)] 
Merge branch '2024-01-29-pytest-enhancements'

- Update pygit2 version and add a number of additional hardware pytests

4 months agotest/py: scsi: Add test for scsi commands
Love Kumar [Fri, 19 Jan 2024 14:37:13 +0000 (20:07 +0530)] 
test/py: scsi: Add test for scsi commands

Add a following test cases for scsi commands:
scsi_reset - To reset SCSI controller
scsi_info - To show available SCSI devices
scsi_scan - To (re-)scan SCSI bus
scsi_device - To show or set surrent device
scsi_part - To print partition table of selected SCSI device

Signed-off-by: Love Kumar <love.kumar@amd.com>
4 months agotest/py: usb: Add tests for USB device
Love Kumar [Fri, 19 Jan 2024 14:26:02 +0000 (19:56 +0530)] 
test/py: usb: Add tests for USB device

Add the test cases for usb commands to test its various functionality
such as start, stop, reset, info, tree, storage, dev, part, ls, load,
and save. It also adds different file systems cases such as fat32, ext2
and ext4.

Signed-off-by: Love Kumar <love.kumar@amd.com>
4 months agotest/py: mmc: Add tests for MMC device
Love Kumar [Fri, 19 Jan 2024 14:25:50 +0000 (19:55 +0530)] 
test/py: mmc: Add tests for MMC device

Add the test cases for mmc commands to test its various functionality
such as mmc list, dev, info, rescan, part, ls, load, and save. It also
adds different file systems cases such as fat32, ext2 and ext4.

Signed-off-by: Love Kumar <love.kumar@amd.com>
4 months agotest/py: secure: Add secure tests for Zynq & ZynqMP
Love Kumar [Fri, 19 Jan 2024 10:01:29 +0000 (15:31 +0530)] 
test/py: secure: Add secure tests for Zynq & ZynqMP

Add test cases to verify the different type of secure boot images loaded
at DDR location for AMD's ZynqMP SoC. It also adds tests authentication
and decryption functionality using AES and RSA features for Zynq.

Signed-off-by: Love Kumar <love.kumar@amd.com>
4 months agotest/py: gpio: Add gpio pins generic test
Love Kumar [Fri, 19 Jan 2024 05:38:34 +0000 (11:08 +0530)] 
test/py: gpio: Add gpio pins generic test

Add gpio pins generic test for the set of gpio pin list to test various
gpio related functionality, such as the input, set, clear, and toggle,
it also tests the input and output functionality for shorted gpio pins.
This test depends on boardenv* configuration to define gpio pins names.

Signed-off-by: Love Kumar <love.kumar@amd.com>
4 months agotest/py: zynqmp_rpu: Add test for loading RPU apps
Love Kumar [Fri, 19 Jan 2024 05:36:41 +0000 (11:06 +0530)] 
test/py: zynqmp_rpu: Add test for loading RPU apps

Add testcases for loading RPU applications in split and lockstep mode
including the negative one for AMD's ZynqMP SoC.

Signed-off-by: Love Kumar <love.kumar@amd.com>
4 months agopytest: update requirements.txt
Caleb Connolly [Tue, 2 Jan 2024 11:55:30 +0000 (11:55 +0000)] 
pytest: update requirements.txt

Update pygit2 and py to their latest versions. Even in the venv pygit2
still links against the system libgit2 library which is failing on
latest Arch Linux.

The py library also needs updating to fix a KeyNotFound exception during
test initialisation.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
4 months agosunxi: Consider SPL size limitations for FIT loading
Samuel Holland [Tue, 31 Oct 2023 05:17:41 +0000 (00:17 -0500)] 
sunxi: Consider SPL size limitations for FIT loading

Now that 32-bit SoCs can load U-Boot proper (and possibly other firmware)
from a FIT, people can use that by enabling CONFIG_SPL_LOAD_FIT.
However SPL_FIT_IMAGE_TINY is required to stay within the 24 or 32 KiB
SPL size limit on early SoCs; for consistency, enable it everywhere.

Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: drop unconditional FIT image enablement for all SoCs]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
4 months agosunxi: binman: Support FIT generation for 32-bit SoCs
Samuel Holland [Tue, 31 Oct 2023 05:17:40 +0000 (00:17 -0500)] 
sunxi: binman: Support FIT generation for 32-bit SoCs

Some 32-bit SoCs can use SCP firmware to implement additional PSCI
functionality, such as system suspend. In order to load this firmware
from SPL, we need to generate and use a FIT instead of a legacy image.

Adjust the binman FIT definition so it does not rely on TF-A BL31, as
this is not used on 32-bit SoCs. Instead, after loading the firmware,
U-Boot proper is executed directly. This requires to provide an
entry point property for the U-Boot image node, which confuses some
loaders like sunxi-fel, so protect that to only be used if we have no
BL31.

Signed-off-by: Samuel Holland <samuel@sholland.org>
[Andre: filter U-Boot entry point property]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
4 months agosunxi: binman: Move BL31 and SCP firmware addresses to Kconfig
Samuel Holland [Tue, 31 Oct 2023 05:17:39 +0000 (00:17 -0500)] 
sunxi: binman: Move BL31 and SCP firmware addresses to Kconfig

This is easier to read than the #ifdef staircase, provides better
visibility into the memory map (alongside the other Kconfig
definitions), and allows these addresses to be reused from code.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
4 months agosunxi: spl: Disable padding from SPL_PAD_TO
Samuel Holland [Tue, 31 Oct 2023 05:17:38 +0000 (00:17 -0500)] 
sunxi: spl: Disable padding from SPL_PAD_TO

Starting with H6, Allwinner removed the artificial 32 KiB SPL size limit
from the boot ROM. Now SPL size is only limited by the available SRAM.
This limit ranges from 152 KiB on H6 to a whopping 2052 KiB on R329. To
take advantage of this additional space, we must increase SPL_MAX_SIZE.
Since we do not want to unnecessarily pad SPL out to these giant sizes,
we must set SPL_PAD_TO to zero. This causes no problems because binman
already takes care of appending the SPL payload at the right offset.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
4 months agosunxi: add defconfig for nanopi_duo2
Chuanhong Guo [Thu, 28 Dec 2023 05:29:15 +0000 (13:29 +0800)] 
sunxi: add defconfig for nanopi_duo2

FriendlyElec NanoPi Duo2 is a tiny SBC with Allwinner H3 and
Ampak AP6212 WiFi module. The device-tree for it is already
available in u-boot source tree. Add a default config for it.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[Andre: enable USB gadgets]
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 months agonet: sun8i-emac: Add support for fixed-link phy
Maksim Kiselev [Sat, 20 Jan 2024 16:26:24 +0000 (19:26 +0300)] 
net: sun8i-emac: Add support for fixed-link phy

Make the "phy-handle" property optional, which allows support
for a fixed-link phy configuration.

Thus if the "phy-handle" is present in a DT, then driver will work as
before. Otherwise, phyaddr initialization will not be necessary,
as it is not needed in case of a fixed-link config.

Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
4 months agosunxi: add Transpeed 8K618-T board support
Nick Alilovic [Thu, 18 Jan 2024 16:25:56 +0000 (11:25 -0500)] 
sunxi: add Transpeed 8K618-T board support

This is a Chinese TV box based on Allwinner H618 SoC.

The DRAM parameters were derived from the values found in a firmware update.

Signed-off-by: Nick Alilovic <nickalilovic@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
4 months agosunxi: dts: update devicetree files from Linux-v6.8-rc1
Andre Przywara [Sun, 21 Jan 2024 00:06:00 +0000 (00:06 +0000)] 
sunxi: dts: update devicetree files from Linux-v6.8-rc1

Sync the devicetree files from the official Linux kernel tree, v6.8-rc1.
This time only small changes in the existing files, but five new boards
got added, which opens the door for their respective defconfig files.

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 months agomtd: spi-nor-ids: Add Infineon(Cypress) s28hs02gt ID
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:06 +0000 (14:46 +0900)] 
mtd: spi-nor-ids: Add Infineon(Cypress) s28hs02gt ID

Infineon(Cypress) S28HS02GT is 1.8V, 2Gb (256MB) NOR Flash memory with
Octal interface. It is a dual-die package parts and has same features
with existing S28 series.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agomtd: spi-nor-core: Rework spi_nor_cypress_octal_dtr_enable()
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:05 +0000 (14:46 +0900)] 
mtd: spi-nor-core: Rework spi_nor_cypress_octal_dtr_enable()

Enabling Octal DTR mode in multi-die package parts requires reister setup
for each die. That can be done by simple for-loop. write_enable() takes
effect to all die at once so we can call it before the loop. Besides we
can replace spi_mem_exec_op() calls with spansion_read/write_any_reg().
And finally, we must mask CFR2V[7:4] when changing dummy cycles, as
CFR2V[7] indicates current addressing mode and that should be 1 (4-byte
address mode) for multi-die package parts.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agomtd: spi-nor-core: Consolidate post_bfpt_fixup() for Infineon(Cypress) S25 and S28
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:04 +0000 (14:46 +0900)] 
mtd: spi-nor-core: Consolidate post_bfpt_fixup() for Infineon(Cypress) S25 and S28

s28hx_t_post_bfpt_fixup() fixes erase opcode, erase size, and page size.
s25_post_bfpt_fixup() is doing same thing including multi-die support.
We can consolidate s28hx_t_post_bfpt_fixup() and s25_post_bfpt_fixup()
into one named s25_s28_post_bfpt_fixup().

In s25_s28_post_bfpt_fixup(), set_4byte() is called to force the device to
be 4-byte addressing mode. In S28HS02GT datasheet, the B7 opcode is missing
but it works actually (confirmed).

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agomtd: spi-nor-core: Consolidate setup() hook for Infineon(Cypress) S25 and S28
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:03 +0000 (14:46 +0900)] 
mtd: spi-nor-core: Consolidate setup() hook for Infineon(Cypress) S25 and S28

s28hx_t_setup() only checks sector layout setting. To support multi-die
package parts like S28HS02GT, it needs to check device size and assign
ready() hook for multi-die package parts. These are covered in s25_setup()
so we can consolidate s28hx_t_setup() and s25_setup() into one named
s25_s28_setup().

spi_nor_wait_till_ready() at the beginning of s28hx_t_setup() can be
removed since there is no op that makes device busy state before setup.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agomtd: spi-nor-core: Rework s25_mdp_ready() to support Octal DTR mode
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:02 +0000 (14:46 +0900)] 
mtd: spi-nor-core: Rework s25_mdp_ready() to support Octal DTR mode

s25_mdp_ready() handles status polling for multi-die package parts that
requires to read and check status register for each die. To support
S28HS02GT(dual-die package with Octal DTR support), rename function and
use nor->rdsr_dummy in octal DTR mode.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agomtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:01 +0000 (14:46 +0900)] 
mtd: spi-nor-core: Use CLPEF(0x82) as alternative to CLSR(0x30) for S25 and S28

Infineon(Cypress) S28Hx-T family does not support legacy CLSR(0x30) opcode.
Instead, it supports CLPEF(0x82) which has the same functionality as CLSR.
spansion_sr_ready() is for multi-die package parts including S28HS02GT, so
we need to use CLPEF instead of CLSR.

This change does not affect to S25x02GT which uses spansion_sr_ready() as
S25Hx-T family also supports CLPEF(0x82) as well as CLSR(0x30).

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agomtd: spi-nor-core: Rework spansion_read_any_reg() to support Octal DTR mode
Takahiro Kuwano [Fri, 22 Dec 2023 05:46:00 +0000 (14:46 +0900)] 
mtd: spi-nor-core: Rework spansion_read_any_reg() to support Octal DTR mode

In Infineon multi-die package parts, we need to use Read Any Register op
to read status register in 2nd or further die. Infineon S28HS02GT is
dual-die package and supports Octal DTR interface. To support this,
spansion_read_any_reg() needs to be reworked. Implementation is similar
to existing read_sr() that already supports Octal DTR mode.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agomtd: spi-nor-core: Consolidate non-uniform erase helpers for S25 and S28
Takahiro Kuwano [Fri, 22 Dec 2023 05:45:59 +0000 (14:45 +0900)] 
mtd: spi-nor-core: Consolidate non-uniform erase helpers for S25 and S28

s25_erase_non_uniform() and s28hx_t_erase_uniform() support hybrid sector
layout (32 x 4KB sectors overlaid at bottom address) and doing same thing.
Consolidate them into single helper named s25_s28_erase_non_uniform().

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agomtd: spi-nor-core: Clean up macros for Infineon(Cypress) S25 and S28
Takahiro Kuwano [Fri, 22 Dec 2023 05:45:58 +0000 (14:45 +0900)] 
mtd: spi-nor-core: Clean up macros for Infineon(Cypress) S25 and S28

Some macro definitions used in Infineon(Cypress) S25 and S28 series are
redundant and some have inconsistent prefix. This patch removes
redundant ones and renames some to have same prefix as others.

Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agomtd: spi: spi-nor-ids: Add more XM25Q series chips
Ssunk [Tue, 16 Jan 2024 05:38:34 +0000 (13:38 +0800)] 
mtd: spi: spi-nor-ids: Add more XM25Q series chips

- XM25QH128C
- XM25QH256C
- XM25QU256C
- XM25QH512C
- XM25QU512C

Signed-off-by: Kankan Sun <ssunkkan@gmail.com>
[jagan: update the commit message]
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agospi: cadence_qspi: Address the comparison failure for 0-8 bytes of data
Tejas Bhumkar [Sun, 28 Jan 2024 06:37:46 +0000 (12:07 +0530)] 
spi: cadence_qspi: Address the comparison failure for 0-8 bytes of data

The current implementation encounters issues when testing data ranging
from 0 to 8 bytes. This was confirmed through testing with both ISSI
(IS25WX256) and Micron (MT35XU02G) Flash exclusively in SDR mode.

Upon investigation, it was observed that utilizing the
"SPI_NOR_OCTAL_READ" flag and attempting to read less than 8 bytes in
STIG mode results in a read failure, leading to a compare test failure.

To resolve this issue, the CMD_4BYTE_FAST_READ opcode is now utilized
instead of CMD_4BYTE_OCTAL_READ, specifically in SDR mode.

This is based on patch series:
https://lore.kernel.org/all/cover.1701853668.git.tejas.arvind.bhumkar@amd.com/

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agomtd: spi-nor-ids: Add is25lx512 chip
Tejas Bhumkar [Wed, 27 Dec 2023 16:28:39 +0000 (21:58 +0530)] 
mtd: spi-nor-ids: Add is25lx512 chip

Added support for the ISSI OSPI flash part IS25LX512M.
Initial testing was performed on the Tenzing-se1 board using
SDR mode, covering basic erase, write, and readback operations.

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agospi: dw: add check for Rx FIFO overflow
Maksim Kiselev [Thu, 21 Dec 2023 10:13:30 +0000 (13:13 +0300)] 
spi: dw: add check for Rx FIFO overflow

If even one byte is lost due to Rx FIFO overflow then we will never
exit the read loop. Because the (priv->rx != priv->rx_end) condition will
be always true.

Let's check if Rx FIFO overflow occurred and exit the read loop
in this case.

Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
4 months agoefi_loader: check efi_get_variable_int return value
Masahisa Kojima [Mon, 29 Jan 2024 02:51:14 +0000 (11:51 +0900)] 
efi_loader: check efi_get_variable_int return value

efi_get_variable_int() may fail, the buffer should be
cleared before using it.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Addresses-Coverity-ID: 478333 ("Error handling issues")

4 months agoefi_loader: replace find_smbios_table by library function
Heinrich Schuchardt [Fri, 26 Jan 2024 08:13:22 +0000 (09:13 +0100)] 
efi_loader: replace find_smbios_table by library function

The code in find_smbios_table() is redundant to
efi_get_configuration_table(). Replace it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 months agocmd: in do_efi_capsule_esrt use efi_get_configuration_table
Heinrich Schuchardt [Fri, 26 Jan 2024 07:54:31 +0000 (08:54 +0100)] 
cmd: in do_efi_capsule_esrt use efi_get_configuration_table

Use library function efi_get_configuration_table() to find the ESRT.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 months agoefi_loader: export efi_get_configuration_table
Heinrich Schuchardt [Fri, 26 Jan 2024 07:54:30 +0000 (08:54 +0100)] 
efi_loader: export efi_get_configuration_table

In multiple places we need a function to find an EFI configuration table.
Rename get_config_table() to efi_get_configuration_table() and export it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 months agodoc: uefi: remove ".py" suffix for pytest.py command
Wei Ming Chen [Fri, 26 Jan 2024 07:52:19 +0000 (15:52 +0800)] 
doc: uefi: remove ".py" suffix for pytest.py command

the file pytest.py does not exist

Signed-off-by: Wei Ming Chen <jj251510319013@gmail.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 months agoriscv: separate .data and .text sections of EFI binaries
Heinrich Schuchardt [Thu, 25 Jan 2024 08:38:15 +0000 (09:38 +0100)] 
riscv: separate .data and .text sections of EFI binaries

EFI binaries should not contain sections that are both writable and
executable. Separate the RX .text section from the RW .data section

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 months agoriscv: page align EFI binary section
Heinrich Schuchardt [Thu, 25 Jan 2024 08:38:14 +0000 (09:38 +0100)] 
riscv: page align EFI binary section

Change the alignment of the relocation code in EFI binaries to match page
boundaries.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 months agoriscv: conflicting SPDX license linker scripts
Heinrich Schuchardt [Thu, 25 Jan 2024 08:38:13 +0000 (09:38 +0100)] 
riscv: conflicting SPDX license linker scripts

Fix conflicting SPDX license information in linker scripts introduced by
commit 7215787c4ea4 ("SPDX: Convert single license tags to Linux Kernel
style").

Fixes: 7215787c4ea4 ("SPDX: Convert single license tags to Linux Kernel style")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
4 months agoefi_selftest: add missing line feed in efi_selftest_miniapp_exit
Heinrich Schuchardt [Wed, 24 Jan 2024 20:04:32 +0000 (21:04 +0100)] 
efi_selftest: add missing line feed in efi_selftest_miniapp_exit

If an error occurs we may see an output like:

    EFI application calling Exit

    Could not open loaded image protocolLoaded image protocol missing

Add the missing line feed.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 months agodoc: dm: Fix typo
Alexander Dahl [Wed, 24 Jan 2024 07:48:58 +0000 (08:48 +0100)] 
doc: dm: Fix typo

That's most probably a typo, because driver model design documents seem
to be from 2012 and there is no 2010.01 release.

Fixes: 282ed24fb3ca ("dm: MIGRATION: Add migration plan for CONFIG_DM")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
4 months agosunxi: simplify U-Boot proper only builds
Andre Przywara [Wed, 3 Jan 2024 00:12:27 +0000 (00:12 +0000)] 
sunxi: simplify U-Boot proper only builds

At the moment every Allwinner board builds and requires an SPL, even
though we select this individually in each _defconfig file.
For experiments and for early bringup of new SoCs it would be beneficial
to only build U-Boot proper, for instance to postpone a tedious SPL port
(including DRAM support) in the initial phase.

Protect some SPL related symbols that we unconditionally select at the
moment with "if SPL", to avoid Kconfig conflicts when CONFIG_SPL is
disabled.

This alone does not cleanly build U-Boot proper only yet, but gets it
far enough so that the binary can be harvested.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 months agosunxi: remove common.h inclusion
Andre Przywara [Wed, 3 Jan 2024 00:12:26 +0000 (00:12 +0000)] 
sunxi: remove common.h inclusion

The usage of the common.h include file is deprecated, and has already
been removed from several files.

Get rid of all inclusions in the arch/arm/mach-sunxi directory. Most
files actually don't need the header at all, for the few others just
include the headers that we actually require.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 months agosunxi: sun9i: remove unneeded base addresses from header
Andre Przywara [Wed, 3 Jan 2024 00:12:24 +0000 (00:12 +0000)] 
sunxi: sun9i: remove unneeded base addresses from header

The cpu_sun9i.h header file defined the base addresses for quite some
peripherals of the Allwinner A80 CPU, even though we now only use a
fraction of that.
Most of the addresses are now either read from the DT, or were never
used in U-Boot in the first place.

Removed the ones that are not used in the whole of the U-Boot source.
to make it clear that this file only contains addresses that are needed
for the SPL operation.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 months agosunxi: sun4i: remove unneeded base addresses from header
Andre Przywara [Wed, 3 Jan 2024 00:12:23 +0000 (00:12 +0000)] 
sunxi: sun4i: remove unneeded base addresses from header

The cpu_sun4i.h header file defined the base addresses for quite some
peripherals of earlier Allwinner CPUs, even though we now only use a
fraction of that.
Most of the addresses are now either read from the DT, or were never
used in U-Boot in the first place.

Removed the ones that are not used in the whole of the U-Boot source.
to make it clear that this file only contains addresses that are needed
for the SPL operation.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 months agosunxi: sun50i-h6: remove unneeded base addresses from header
Andre Przywara [Wed, 3 Jan 2024 00:12:22 +0000 (00:12 +0000)] 
sunxi: sun50i-h6: remove unneeded base addresses from header

The cpu_sun50i_h6.h header file defined the base addresses for quite some
peripherals of the Allwinner H6 and related CPUs, even though we now only
use a fraction of that.
Most of the addresses are now either read from the DT, or were never used
in U-Boot in the first place.

Removed the ones that are not used in the whole of the U-Boot source.
to make it clear that this file only contains addresses that are needed
for the SPL operation.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 months agosunxi: cleanup sunxi-common.h
Andre Przywara [Wed, 3 Jan 2024 00:12:21 +0000 (00:12 +0000)] 
sunxi: cleanup sunxi-common.h

The sunxi-common.h configs header used to contain a lot of random
Allwinner platform related constants, but over the years we moved a lot
of those definitions out there.

Clean up the file to remove outdated comments which are leftovers from
the olden days. Also remove the definition of LOW_LEVEL_SRAM_STACK,
which is actually used nowhere in the whole source tree.

This also uses the opportunity to add some section comments that helps
structuring the header file and improving readability.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
4 months agoMerge branch 'master-cleanup' of https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Sun, 28 Jan 2024 01:43:20 +0000 (20:43 -0500)] 
Merge branch 'master-cleanup' of https://source.denx.de/u-boot/custodians/u-boot-sh

- Assorted code clean-ups

4 months agoARM: renesas: whitehawk: Drop extra leading space
Marek Vasut [Sun, 21 Jan 2024 17:33:12 +0000 (18:33 +0100)] 
ARM: renesas: whitehawk: Drop extra leading space

Drop leading space in front of a comment. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
4 months agoARM: renesas: Drop include common.h
Marek Vasut [Sun, 21 Jan 2024 17:31:23 +0000 (18:31 +0100)] 
ARM: renesas: Drop include common.h

The header file is not necessary in either of those files,
remove it as common.h is going away.

Include missing asm/arch/rmobile.h in board/renesas/rcar-common/v3-common.c
to prevent build failure of r8a77970_eagle r8a779a0_falcon r8a77980_v3hsk
and r8a77970_v3msk .

Include missing asm/u-boot.h in falcon.c and grpeach.c to fix build failure
due to missing definition of struct bd_info . Include errno.h in grpeach.c
to fix build error due to missing definition of EINVAL.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
4 months agopinctrl: renesas: Drop include common.h
Marek Vasut [Sun, 21 Jan 2024 17:31:22 +0000 (18:31 +0100)] 
pinctrl: renesas: Drop include common.h

The header file is not necessary in either of those files,
remove it as common.h is going away.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
4 months agoclk: renesas: Drop include common.h
Marek Vasut [Sun, 21 Jan 2024 17:31:21 +0000 (18:31 +0100)] 
clk: renesas: Drop include common.h

The header file is not necessary in either of those files,
remove it as common.h is going away.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
4 months agoMerge tag 'smbios-2024-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sat, 27 Jan 2024 12:53:29 +0000 (07:53 -0500)] 
Merge tag 'smbios-2024-04-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request smbios-2024-04-rc1-2

* Add missing field to SMBIOS type 2 structure definition
* Provide smbios command to display smbios table
* Enable the command on sandbox and qemu_arm64_defconfig
* Provide a python test for the smbios command
* Fix copying SMBIOS 2.1 table from QEMU
* Correct EFI TCG measurement to assume SMBIOS 3 table

4 months agolib: support SMBIOS3 table in uuid_guid_get_str()
Heinrich Schuchardt [Mon, 22 Jan 2024 13:04:35 +0000 (14:04 +0100)] 
lib: support SMBIOS3 table in uuid_guid_get_str()

As we support installing SMBIOS3 tables in U-Boot we need to add this GUID
to the translation table used buy uuid_guid_get_str().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
4 months agosmbios: use struct_table_length to get SMBIOS 2.1 total table length
Masahisa Kojima [Thu, 25 Jan 2024 01:11:28 +0000 (10:11 +0900)] 
smbios: use struct_table_length to get SMBIOS 2.1 total table length

The current code convert the SMBIOS 2.1 entry point structure to
SMBIOS 3.0 entry point structure. The max_struct_size member in
SMBIOS 2.1 entry point structure indicates
"Size of the largest SMBIOS structure, in bytes".
We need to use struct_table_length instead.

Fixes: 1c5aab803c0b ("smbios: copy QEMU tables")
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
4 months agoefi_loader: migrate SMBIOS 3.0 entry point structure for measurement
Masahisa Kojima [Fri, 26 Jan 2024 00:53:42 +0000 (09:53 +0900)] 
efi_loader: migrate SMBIOS 3.0 entry point structure for measurement

Current U-Boot only supports the SMBIOS 3.0 entry point structure.
TCG2 measurement code should migrate to SMBIOS 3.0 entry
point structure.

efi_selftest tcg2 test also needs to be updated, and expected
PCR[1] result is changed since guid for SMBIOS EFI system table
uses different guid SMBIOS3_TABLE_GUID instead of SMBIOS_TABLE_GUID.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
4 months agoconfigs: enable smbios command on qemu_arm64_defconfig
Heinrich Schuchardt [Thu, 25 Jan 2024 15:54:38 +0000 (16:54 +0100)] 
configs: enable smbios command on qemu_arm64_defconfig

We have a Python test the copying of SMBIOS tables from QEMU.
To make use of the test we need the smbios command.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>