]> git.ipfire.org Git - ipfire-2.x.git/blobdiff - src/hwinfo/src/int10/i10_v86.c
hwinfo in den Installer gebracht.
[ipfire-2.x.git] / src / hwinfo / src / int10 / i10_v86.c
index 8fcdef160cacff676246ea60ba4c4681b7c98256..13fe52d8f502f1cf91c24768be6eaa9b34e81b08 100644 (file)
@@ -179,6 +179,7 @@ do_x86(unsigned long bios_start, i86biosRegsPtr regs, int cpuemu)
 #define LIN_PREF_SI  ((pref_seg << 4) + CPU_REG_LW(esi))
 
 #define LWECX       (prefix66 ^ prefix67 ? CPU_REG(ecx) : CPU_REG_LW(ecx))
+#define SET_LWECX_ZERO (prefix66 ^ prefix67 ? (CPU_REG(ecx) = 0) : (CPU_REG_LW(ecx) = 0))
 
 static int
 vm86_GP_fault(void)
@@ -230,7 +231,7 @@ vm86_GP_fault(void)
                                                                                SEG_ADR((CARD8 *),es,di),
                                                                                CPU_REG_LW(eflags)&DF,
                                                                                (is_rep? LWECX:1));
-               if (is_rep) LWECX = 0;
+               if (is_rep) SET_LWECX_ZERO;
                CPU_REG_LW(eip)++;
                break;
 
@@ -249,7 +250,7 @@ vm86_GP_fault(void)
                                                                                        CPU_REG_LW(eflags)&DF,
                                                                                        (is_rep? LWECX:1));
                }
-               if (is_rep) LWECX = 0;
+               if (is_rep) SET_LWECX_ZERO;
                CPU_REG_LW(eip)++;
                break;
 
@@ -259,7 +260,7 @@ vm86_GP_fault(void)
                CPU_REG_LW(esi) += port_rep_outb(CPU_REG_LW(edx),(CARD8*)INT2PTR(LIN_PREF_SI),
                                                                                 CPU_REG_LW(eflags)&DF,
                                                                                 (is_rep? LWECX:1));
-               if (is_rep) LWECX = 0;
+               if (is_rep) SET_LWECX_ZERO;
                CPU_REG_LW(eip)++;
                break;
 
@@ -278,7 +279,7 @@ vm86_GP_fault(void)
                                                                                         CPU_REG_LW(eflags)&DF,
                                                                                         (is_rep? LWECX:1));
                } 
-               if (is_rep) LWECX = 0;
+               if (is_rep) SET_LWECX_ZERO;
                CPU_REG_LW(eip)++;
                break;