2 * Device Tree Source for AM4372 SoC
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "skeleton.dtsi"
16 compatible = "ti,am4372", "ti,am43";
17 interrupt-parent = <&gic>;
25 ethernet0 = &cpsw_emac0;
26 ethernet1 = &cpsw_emac1;
33 compatible = "arm,cortex-a9";
39 gic: interrupt-controller@48241000 {
40 compatible = "arm,cortex-a9-gic";
42 #interrupt-cells = <3>;
43 reg = <0x48241000 0x1000>,
47 l2-cache-controller@48242000 {
48 compatible = "arm,pl310-cache";
49 reg = <0x48242000 0x1000>;
54 am43xx_pinmux: pinmux@44e10800 {
55 compatible = "pinctrl-single";
56 reg = <0x44e10800 0x31c>;
59 pinctrl-single,register-width = <32>;
60 pinctrl-single,function-mask = <0xffffffff>;
64 compatible = "simple-bus";
68 ti,hwmods = "l3_main";
71 compatible = "ti,am4-prcm";
72 reg = <0x44df0000 0x11000>;
79 prcm_clockdomains: clockdomains {
84 compatible = "ti,am4-scrm";
85 reg = <0x44e10000 0x2000>;
92 scrm_clockdomains: clockdomains {
97 compatible = "ti,edma3";
98 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
99 reg = <0x49000000 0x10000>,
101 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
102 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
103 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
106 ti,edma-regions = <4>;
107 ti,edma-slots = <256>;
110 uart0: serial@44e09000 {
111 compatible = "ti,am4372-uart","ti,omap2-uart";
112 reg = <0x44e09000 0x2000>;
113 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
117 uart1: serial@48022000 {
118 compatible = "ti,am4372-uart","ti,omap2-uart";
119 reg = <0x48022000 0x2000>;
120 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
125 uart2: serial@48024000 {
126 compatible = "ti,am4372-uart","ti,omap2-uart";
127 reg = <0x48024000 0x2000>;
128 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
133 uart3: serial@481a6000 {
134 compatible = "ti,am4372-uart","ti,omap2-uart";
135 reg = <0x481a6000 0x2000>;
136 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
141 uart4: serial@481a8000 {
142 compatible = "ti,am4372-uart","ti,omap2-uart";
143 reg = <0x481a8000 0x2000>;
144 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
149 uart5: serial@481aa000 {
150 compatible = "ti,am4372-uart","ti,omap2-uart";
151 reg = <0x481aa000 0x2000>;
152 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
157 mailbox: mailbox@480C8000 {
158 compatible = "ti,omap4-mailbox";
159 reg = <0x480C8000 0x200>;
160 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
161 ti,hwmods = "mailbox";
162 ti,mbox-num-users = <4>;
163 ti,mbox-num-fifos = <8>;
166 timer1: timer@44e31000 {
167 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
168 reg = <0x44e31000 0x400>;
169 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
171 ti,hwmods = "timer1";
174 timer2: timer@48040000 {
175 compatible = "ti,am4372-timer","ti,am335x-timer";
176 reg = <0x48040000 0x400>;
177 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
178 ti,hwmods = "timer2";
181 timer3: timer@48042000 {
182 compatible = "ti,am4372-timer","ti,am335x-timer";
183 reg = <0x48042000 0x400>;
184 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
185 ti,hwmods = "timer3";
189 timer4: timer@48044000 {
190 compatible = "ti,am4372-timer","ti,am335x-timer";
191 reg = <0x48044000 0x400>;
192 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
194 ti,hwmods = "timer4";
198 timer5: timer@48046000 {
199 compatible = "ti,am4372-timer","ti,am335x-timer";
200 reg = <0x48046000 0x400>;
201 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
203 ti,hwmods = "timer5";
207 timer6: timer@48048000 {
208 compatible = "ti,am4372-timer","ti,am335x-timer";
209 reg = <0x48048000 0x400>;
210 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
212 ti,hwmods = "timer6";
216 timer7: timer@4804a000 {
217 compatible = "ti,am4372-timer","ti,am335x-timer";
218 reg = <0x4804a000 0x400>;
219 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
221 ti,hwmods = "timer7";
225 timer8: timer@481c1000 {
226 compatible = "ti,am4372-timer","ti,am335x-timer";
227 reg = <0x481c1000 0x400>;
228 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
229 ti,hwmods = "timer8";
233 timer9: timer@4833d000 {
234 compatible = "ti,am4372-timer","ti,am335x-timer";
235 reg = <0x4833d000 0x400>;
236 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
237 ti,hwmods = "timer9";
241 timer10: timer@4833f000 {
242 compatible = "ti,am4372-timer","ti,am335x-timer";
243 reg = <0x4833f000 0x400>;
244 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
245 ti,hwmods = "timer10";
249 timer11: timer@48341000 {
250 compatible = "ti,am4372-timer","ti,am335x-timer";
251 reg = <0x48341000 0x400>;
252 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
253 ti,hwmods = "timer11";
257 counter32k: counter@44e86000 {
258 compatible = "ti,am4372-counter32k","ti,omap-counter32k";
259 reg = <0x44e86000 0x40>;
260 ti,hwmods = "counter_32k";
264 compatible = "ti,am4372-rtc","ti,da830-rtc";
265 reg = <0x44e3e000 0x1000>;
266 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
267 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
273 compatible = "ti,am4372-wdt","ti,omap3-wdt";
274 reg = <0x44e35000 0x1000>;
275 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
276 ti,hwmods = "wd_timer2";
279 gpio0: gpio@44e07000 {
280 compatible = "ti,am4372-gpio","ti,omap4-gpio";
281 reg = <0x44e07000 0x1000>;
282 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
285 interrupt-controller;
286 #interrupt-cells = <2>;
291 gpio1: gpio@4804c000 {
292 compatible = "ti,am4372-gpio","ti,omap4-gpio";
293 reg = <0x4804c000 0x1000>;
294 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
297 interrupt-controller;
298 #interrupt-cells = <2>;
303 gpio2: gpio@481ac000 {
304 compatible = "ti,am4372-gpio","ti,omap4-gpio";
305 reg = <0x481ac000 0x1000>;
306 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
309 interrupt-controller;
310 #interrupt-cells = <2>;
315 gpio3: gpio@481ae000 {
316 compatible = "ti,am4372-gpio","ti,omap4-gpio";
317 reg = <0x481ae000 0x1000>;
318 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
321 interrupt-controller;
322 #interrupt-cells = <2>;
327 gpio4: gpio@48320000 {
328 compatible = "ti,am4372-gpio","ti,omap4-gpio";
329 reg = <0x48320000 0x1000>;
330 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
333 interrupt-controller;
334 #interrupt-cells = <2>;
339 gpio5: gpio@48322000 {
340 compatible = "ti,am4372-gpio","ti,omap4-gpio";
341 reg = <0x48322000 0x1000>;
342 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
345 interrupt-controller;
346 #interrupt-cells = <2>;
352 compatible = "ti,am4372-i2c","ti,omap4-i2c";
353 reg = <0x44e0b000 0x1000>;
354 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
356 #address-cells = <1>;
362 compatible = "ti,am4372-i2c","ti,omap4-i2c";
363 reg = <0x4802a000 0x1000>;
364 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
366 #address-cells = <1>;
372 compatible = "ti,am4372-i2c","ti,omap4-i2c";
373 reg = <0x4819c000 0x1000>;
374 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
376 #address-cells = <1>;
382 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
383 reg = <0x48030000 0x400>;
384 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
386 #address-cells = <1>;
392 compatible = "ti,omap4-hsmmc";
393 reg = <0x48060000 0x1000>;
396 ti,needs-special-reset;
399 dma-names = "tx", "rx";
400 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
405 compatible = "ti,omap4-hsmmc";
406 reg = <0x481d8000 0x1000>;
408 ti,needs-special-reset;
411 dma-names = "tx", "rx";
412 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
417 compatible = "ti,omap4-hsmmc";
418 reg = <0x47810000 0x1000>;
420 ti,needs-special-reset;
421 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
426 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
427 reg = <0x481a0000 0x400>;
428 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
430 #address-cells = <1>;
436 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
437 reg = <0x481a2000 0x400>;
438 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
440 #address-cells = <1>;
446 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
447 reg = <0x481a4000 0x400>;
448 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
450 #address-cells = <1>;
456 compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
457 reg = <0x48345000 0x400>;
458 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
460 #address-cells = <1>;
465 mac: ethernet@4a100000 {
466 compatible = "ti,am4372-cpsw","ti,cpsw";
467 reg = <0x4a100000 0x800
469 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH
470 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
471 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
472 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
473 #address-cells = <1>;
475 ti,hwmods = "cpgmac0";
477 cpdma_channels = <8>;
478 ale_entries = <1024>;
479 bd_ram_size = <0x2000>;
482 mac_control = <0x20>;
485 cpts_clock_mult = <0x80000000>;
486 cpts_clock_shift = <29>;
489 davinci_mdio: mdio@4a101000 {
490 compatible = "ti,am4372-mdio","ti,davinci_mdio";
491 reg = <0x4a101000 0x100>;
492 #address-cells = <1>;
494 ti,hwmods = "davinci_mdio";
495 bus_freq = <1000000>;
499 cpsw_emac0: slave@4a100200 {
500 /* Filled in by U-Boot */
501 mac-address = [ 00 00 00 00 00 00 ];
504 cpsw_emac1: slave@4a100300 {
505 /* Filled in by U-Boot */
506 mac-address = [ 00 00 00 00 00 00 ];
510 epwmss0: epwmss@48300000 {
511 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
512 reg = <0x48300000 0x10>;
513 #address-cells = <1>;
516 ti,hwmods = "epwmss0";
519 ecap0: ecap@48300100 {
520 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
521 reg = <0x48300100 0x80>;
526 ehrpwm0: ehrpwm@48300200 {
527 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
528 reg = <0x48300200 0x80>;
529 ti,hwmods = "ehrpwm0";
534 epwmss1: epwmss@48302000 {
535 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
536 reg = <0x48302000 0x10>;
537 #address-cells = <1>;
540 ti,hwmods = "epwmss1";
543 ecap1: ecap@48302100 {
544 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
545 reg = <0x48302100 0x80>;
550 ehrpwm1: ehrpwm@48302200 {
551 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
552 reg = <0x48302200 0x80>;
553 ti,hwmods = "ehrpwm1";
558 epwmss2: epwmss@48304000 {
559 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
560 reg = <0x48304000 0x10>;
561 #address-cells = <1>;
564 ti,hwmods = "epwmss2";
567 ecap2: ecap@48304100 {
568 compatible = "ti,am4372-ecap","ti,am33xx-ecap";
569 reg = <0x48304100 0x80>;
574 ehrpwm2: ehrpwm@48304200 {
575 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
576 reg = <0x48304200 0x80>;
577 ti,hwmods = "ehrpwm2";
582 epwmss3: epwmss@48306000 {
583 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
584 reg = <0x48306000 0x10>;
585 #address-cells = <1>;
588 ti,hwmods = "epwmss3";
591 ehrpwm3: ehrpwm@48306200 {
592 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
593 reg = <0x48306200 0x80>;
594 ti,hwmods = "ehrpwm3";
599 epwmss4: epwmss@48308000 {
600 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
601 reg = <0x48308000 0x10>;
602 #address-cells = <1>;
605 ti,hwmods = "epwmss4";
608 ehrpwm4: ehrpwm@48308200 {
609 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
610 reg = <0x48308200 0x80>;
611 ti,hwmods = "ehrpwm4";
616 epwmss5: epwmss@4830a000 {
617 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
618 reg = <0x4830a000 0x10>;
619 #address-cells = <1>;
622 ti,hwmods = "epwmss5";
625 ehrpwm5: ehrpwm@4830a200 {
626 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
627 reg = <0x4830a200 0x80>;
628 ti,hwmods = "ehrpwm5";
633 sham: sham@53100000 {
634 compatible = "ti,omap5-sham";
636 reg = <0x53100000 0x300>;
639 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
643 compatible = "ti,omap4-aes";
645 reg = <0x53501000 0xa0>;
646 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
649 dma-names = "tx", "rx";
653 compatible = "ti,omap4-des";
655 reg = <0x53701000 0xa0>;
656 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
659 dma-names = "tx", "rx";
662 mcasp0: mcasp@48038000 {
663 compatible = "ti,am33xx-mcasp-audio";
664 ti,hwmods = "mcasp0";
665 reg = <0x48038000 0x2000>,
666 <0x46000000 0x400000>;
667 reg-names = "mpu", "dat";
668 interrupts = <80>, <81>;
669 interrupts-names = "tx", "rx";
673 dma-names = "tx", "rx";
676 mcasp1: mcasp@4803C000 {
677 compatible = "ti,am33xx-mcasp-audio";
678 ti,hwmods = "mcasp1";
679 reg = <0x4803C000 0x2000>,
680 <0x46400000 0x400000>;
681 reg-names = "mpu", "dat";
682 interrupts = <82>, <83>;
683 interrupts-names = "tx", "rx";
687 dma-names = "tx", "rx";
692 /include/ "am43xx-clocks.dtsi"