arch/arm/boot/dts/at91rm9200.dtsi

   1 /*
   2  * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
   3  *
   4  *  Copyright (C) 2011 Atmel,
   5  *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
   6  *                2012 Joachim Eastwood <manabian@gmail.com>
   7  *
   8  * Based on at91sam9260.dtsi
   9  *
  10  * Licensed under GPLv2 or later.
  11  */
  12
  13 #include "skeleton.dtsi"
  14 #include <dt-bindings/pinctrl/at91.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17
  18 / {
  19         model = "Atmel AT91RM9200 family SoC";
  20         compatible = "atmel,at91rm9200";
  21         interrupt-parent = <&aic>;
  22
  23         aliases {
  24                 serial0 = &dbgu;
  25                 serial1 = &usart0;
  26                 serial2 = &usart1;
  27                 serial3 = &usart2;
  28                 serial4 = &usart3;
  29                 gpio0 = &pioA;
  30                 gpio1 = &pioB;
  31                 gpio2 = &pioC;
  32                 gpio3 = &pioD;
  33                 tcb0 = &tcb0;
  34                 tcb1 = &tcb1;
  35                 i2c0 = &i2c0;
  36                 ssc0 = &ssc0;
  37                 ssc1 = &ssc1;
  38                 ssc2 = &ssc2;
  39         };
  40         cpus {
  41                 #address-cells = <0>;
  42                 #size-cells = <0>;
  43
  44                 cpu {
  45                         compatible = "arm,arm920t";
  46                         device_type = "cpu";
  47                 };
  48         };
  49
  50         memory {
  51                 reg = <0x20000000 0x04000000>;
  52         };
  53
  54         ahb {
  55                 compatible = "simple-bus";
  56                 #address-cells = <1>;
  57                 #size-cells = <1>;
  58                 ranges;
  59
  60                 apb {
  61                         compatible = "simple-bus";
  62                         #address-cells = <1>;
  63                         #size-cells = <1>;
  64                         ranges;
  65
  66                         aic: interrupt-controller@fffff000 {
  67                                 #interrupt-cells = <3>;
  68                                 compatible = "atmel,at91rm9200-aic";
  69                                 interrupt-controller;
  70                                 reg = <0xfffff000 0x200>;
  71                                 atmel,external-irqs = <25 26 27 28 29 30 31>;
  72                         };
  73
  74                         ramc0: ramc@ffffff00 {
  75                                 compatible = "atmel,at91rm9200-sdramc";
  76                                 reg = <0xffffff00 0x100>;
  77                         };
  78
  79                         pmc: pmc@fffffc00 {
  80                                 compatible = "atmel,at91rm9200-pmc";
  81                                 reg = <0xfffffc00 0x100>;
  82                         };
  83
  84                         st: timer@fffffd00 {
  85                                 compatible = "atmel,at91rm9200-st";
  86                                 reg = <0xfffffd00 0x100>;
  87                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  88                         };
  89
  90                         tcb0: timer@fffa0000 {
  91                                 compatible = "atmel,at91rm9200-tcb";
  92                                 reg = <0xfffa0000 0x100>;
  93                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
  94                                               18 IRQ_TYPE_LEVEL_HIGH 0
  95                                               19 IRQ_TYPE_LEVEL_HIGH 0>;
  96                         };
  97
  98                         tcb1: timer@fffa4000 {
  99                                 compatible = "atmel,at91rm9200-tcb";
 100                                 reg = <0xfffa4000 0x100>;
 101                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
 102                                               21 IRQ_TYPE_LEVEL_HIGH 0
 103                                               22 IRQ_TYPE_LEVEL_HIGH 0>;
 104                         };
 105
 106                         i2c0: i2c@fffb8000 {
 107                                 compatible = "atmel,at91rm9200-i2c";
 108                                 reg = <0xfffb8000 0x4000>;
 109                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
 110                                 pinctrl-names = "default";
 111                                 pinctrl-0 = <&pinctrl_twi>;
 112                                 #address-cells = <1>;
 113                                 #size-cells = <0>;
 114                                 status = "disabled";
 115                         };
 116
 117                         mmc0: mmc@fffb4000 {
 118                                 compatible = "atmel,hsmci";
 119                                 reg = <0xfffb4000 0x4000>;
 120                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
 121                                 #address-cells = <1>;
 122                                 #size-cells = <0>;
 123                                 pinctrl-names = "default";
 124                                 status = "disabled";
 125                         };
 126
 127                         ssc0: ssc@fffd0000 {
 128                                 compatible = "atmel,at91rm9200-ssc";
 129                                 reg = <0xfffd0000 0x4000>;
 130                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
 131                                 pinctrl-names = "default";
 132                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 133                                 status = "disable";
 134                         };
 135
 136                         ssc1: ssc@fffd4000 {
 137                                 compatible = "atmel,at91rm9200-ssc";
 138                                 reg = <0xfffd4000 0x4000>;
 139                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 140                                 pinctrl-names = "default";
 141                                 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
 142                                 status = "disable";
 143                         };
 144
 145                         ssc2: ssc@fffd8000 {
 146                                 compatible = "atmel,at91rm9200-ssc";
 147                                 reg = <0xfffd8000 0x4000>;
 148                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 149                                 pinctrl-names = "default";
 150                                 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
 151                                 status = "disable";
 152                         };
 153
 154                         macb0: ethernet@fffbc000 {
 155                                 compatible = "cdns,at91rm9200-emac", "cdns,emac";
 156                                 reg = <0xfffbc000 0x4000>;
 157                                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
 158                                 phy-mode = "rmii";
 159                                 pinctrl-names = "default";
 160                                 pinctrl-0 = <&pinctrl_macb_rmii>;
 161                                 status = "disabled";
 162                         };
 163
 164                         pinctrl@fffff400 {
 165                                 #address-cells = <1>;
 166                                 #size-cells = <1>;
 167                                 compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
 168                                 ranges = <0xfffff400 0xfffff400 0x800>;
 169
 170                                 atmel,mux-mask = <
 171                                         /*    A         B     */
 172                                          0xffffffff 0xffffffff  /* pioA */
 173                                          0xffffffff 0x083fffff  /* pioB */
 174                                          0xffff3fff 0x00000000  /* pioC */
 175                                          0x03ff87ff 0x0fffff80  /* pioD */
 176                                         >;
 177
 178                                 /* shared pinctrl settings */
 179                                 dbgu {
 180                                         pinctrl_dbgu: dbgu-0 {
 181                                                 atmel,pins =
 182                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A */
 183                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA31 periph with pullup */
 184                                         };
 185                                 };
 186
 187                                 uart0 {
 188                                         pinctrl_uart0: uart0-0 {
 189                                                 atmel,pins =
 190                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 191                                                          AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
 192                                         };
 193
 194                                         pinctrl_uart0_cts: uart0_cts-0 {
 195                                                 atmel,pins =
 196                                                         <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
 197                                         };
 198
 199                                         pinctrl_uart0_rts: uart0_rts-0 {
 200                                                 atmel,pins =
 201                                                         <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
 202                                         };
 203                                 };
 204
 205                                 uart1 {
 206                                         pinctrl_uart1: uart1-0 {
 207                                                 atmel,pins =
 208                                                         <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PB20 periph A with pullup */
 209                                                          AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
 210                                         };
 211
 212                                         pinctrl_uart1_rts: uart1_rts-0 {
 213                                                 atmel,pins =
 214                                                         <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
 215                                         };
 216
 217                                         pinctrl_uart1_cts: uart1_cts-0 {
 218                                                 atmel,pins =
 219                                                         <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
 220                                         };
 221
 222                                         pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
 223                                                 atmel,pins =
 224                                                         <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB19 periph A */
 225                                                          AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
 226                                         };
 227
 228                                         pinctrl_uart1_dcd: uart1_dcd-0 {
 229                                                 atmel,pins =
 230                                                         <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
 231                                         };
 232
 233                                         pinctrl_uart1_ri: uart1_ri-0 {
 234                                                 atmel,pins =
 235                                                         <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
 236                                         };
 237                                 };
 238
 239                                 uart2 {
 240                                         pinctrl_uart2: uart2-0 {
 241                                                 atmel,pins =
 242                                                         <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA22 periph A */
 243                                                          AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA23 periph A with pullup */
 244                                         };
 245
 246                                         pinctrl_uart2_rts: uart2_rts-0 {
 247                                                 atmel,pins =
 248                                                         <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
 249                                         };
 250
 251                                         pinctrl_uart2_cts: uart2_cts-0 {
 252                                                 atmel,pins =
 253                                                         <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
 254                                         };
 255                                 };
 256
 257                                 uart3 {
 258                                         pinctrl_uart3: uart3-0 {
 259                                                 atmel,pins =
 260                                                         <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
 261                                                          AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PA6 periph B */
 262                                         };
 263
 264                                         pinctrl_uart3_rts: uart3_rts-0 {
 265                                                 atmel,pins =
 266                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
 267                                         };
 268
 269                                         pinctrl_uart3_cts: uart3_cts-0 {
 270                                                 atmel,pins =
 271                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
 272                                         };
 273                                 };
 274
 275                                 nand {
 276                                         pinctrl_nand: nand-0 {
 277                                                 atmel,pins =
 278                                                         <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PC2 gpio RDY pin pull_up */
 279                                                          AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;    /* PB1 gpio CD pin pull_up */
 280                                         };
 281                                 };
 282
 283                                 macb {
 284                                         pinctrl_macb_rmii: macb_rmii-0 {
 285                                                 atmel,pins =
 286                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA7 periph A */
 287                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA8 periph A */
 288                                                          AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA9 periph A */
 289                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA10 periph A */
 290                                                          AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A */
 291                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A */
 292                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA13 periph A */
 293                                                          AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA14 periph A */
 294                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA15 periph A */
 295                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
 296                                         };
 297
 298                                         pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
 299                                                 atmel,pins =
 300                                                         <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB12 periph B */
 301                                                          AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB13 periph B */
 302                                                          AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB14 periph B */
 303                                                          AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB15 periph B */
 304                                                          AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB16 periph B */
 305                                                          AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB17 periph B */
 306                                                          AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB18 periph B */
 307                                                          AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
 308                                         };
 309                                 };
 310
 311                                 mmc0 {
 312                                         pinctrl_mmc0_clk: mmc0_clk-0 {
 313                                                 atmel,pins =
 314                                                         <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
 315                                         };
 316
 317                                         pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
 318                                                 atmel,pins =
 319                                                         <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA28 periph A with pullup */
 320                                                          AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA29 periph A with pullup */
 321                                         };
 322
 323                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 324                                                 atmel,pins =
 325                                                         <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
 326                                                          AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
 327                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PB5 periph B with pullup */
 328                                         };
 329
 330                                         pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
 331                                                 atmel,pins =
 332                                                         <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
 333                                                          AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA9 periph B with pullup */
 334                                         };
 335
 336                                         pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
 337                                                 atmel,pins =
 338                                                         <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA10 periph B with pullup */
 339                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA11 periph B with pullup */
 340                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA12 periph B with pullup */
 341                                         };
 342                                 };
 343
 344                                 ssc0 {
 345                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 346                                                 atmel,pins =
 347                                                         <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB0 periph A */
 348                                                          AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB1 periph A */
 349                                                          AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB2 periph A */
 350                                         };
 351
 352                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 353                                                 atmel,pins =
 354                                                         <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB3 periph A */
 355                                                          AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB4 periph A */
 356                                                          AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB5 periph A */
 357                                         };
 358                                 };
 359
 360                                 ssc1 {
 361                                         pinctrl_ssc1_tx: ssc1_tx-0 {
 362                                                 atmel,pins =
 363                                                         <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB6 periph A */
 364                                                          AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB7 periph A */
 365                                                          AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PB8 periph A */
 366                                         };
 367
 368                                         pinctrl_ssc1_rx: ssc1_rx-0 {
 369                                                 atmel,pins =
 370                                                         <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PB9 periph A */
 371                                                          AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB10 periph A */
 372                                                          AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
 373                                         };
 374                                 };
 375
 376                                 ssc2 {
 377                                         pinctrl_ssc2_tx: ssc2_tx-0 {
 378                                                 atmel,pins =
 379                                                         <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB12 periph A */
 380                                                          AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB13 periph A */
 381                                                          AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
 382                                         };
 383
 384                                         pinctrl_ssc2_rx: ssc2_rx-0 {
 385                                                 atmel,pins =
 386                                                         <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB15 periph A */
 387                                                          AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PB16 periph A */
 388                                                          AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
 389                                         };
 390                                 };
 391
 392                                 twi {
 393                                         pinctrl_twi: twi-0 {
 394                                                 atmel,pins =
 395                                                         <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE    /* PA25 periph A with multi drive */
 396                                                          AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>;  /* PA26 periph A with multi drive */
 397                                         };
 398
 399                                         pinctrl_twi_gpio: twi_gpio-0 {
 400                                                 atmel,pins =
 401                                                         <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
 402                                                          AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;       /* PA26 GPIO with multi drive */
 403                                         };
 404                                 };
 405
 406                                 tcb0 {
 407                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 408                                                 atmel,pins = <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 409                                         };
 410
 411                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 412                                                 atmel,pins = <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 413                                         };
 414
 415                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 416                                                 atmel,pins = <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 417                                         };
 418
 419                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 420                                                 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 421                                         };
 422
 423                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 424                                                 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 425                                         };
 426
 427                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 428                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 429                                         };
 430
 431                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 432                                                 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 433                                         };
 434
 435                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 436                                                 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 437                                         };
 438
 439                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 440                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 441                                         };
 442                                 };
 443
 444                                 tcb1 {
 445                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 446                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 447                                         };
 448
 449                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 450                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 451                                         };
 452
 453                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 454                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 455                                         };
 456
 457                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 458                                                 atmel,pins = <AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 459                                         };
 460
 461                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 462                                                 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 463                                         };
 464
 465                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 466                                                 atmel,pins = <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 467                                         };
 468
 469                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 470                                                 atmel,pins = <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 471                                         };
 472
 473                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 474                                                 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 475                                         };
 476
 477                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 478                                                 atmel,pins = <AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
 479                                         };
 480                                 };
 481
 482                                 spi0 {
 483                                         pinctrl_spi0: spi0-0 {
 484                                                 atmel,pins =
 485                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA0 periph A SPI0_MISO pin */
 486                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA1 periph A SPI0_MOSI pin */
 487                                                          AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A SPI0_SPCK pin */
 488                                         };
 489                                 };
 490
 491                                 pioA: gpio@fffff400 {
 492                                         compatible = "atmel,at91rm9200-gpio";
 493                                         reg = <0xfffff400 0x200>;
 494                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 495                                         #gpio-cells = <2>;
 496                                         gpio-controller;
 497                                         interrupt-controller;
 498                                         #interrupt-cells = <2>;
 499                                 };
 500
 501                                 pioB: gpio@fffff600 {
 502                                         compatible = "atmel,at91rm9200-gpio";
 503                                         reg = <0xfffff600 0x200>;
 504                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 505                                         #gpio-cells = <2>;
 506                                         gpio-controller;
 507                                         interrupt-controller;
 508                                         #interrupt-cells = <2>;
 509                                 };
 510
 511                                 pioC: gpio@fffff800 {
 512                                         compatible = "atmel,at91rm9200-gpio";
 513                                         reg = <0xfffff800 0x200>;
 514                                         interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
 515                                         #gpio-cells = <2>;
 516                                         gpio-controller;
 517                                         interrupt-controller;
 518                                         #interrupt-cells = <2>;
 519                                 };
 520
 521                                 pioD: gpio@fffffa00 {
 522                                         compatible = "atmel,at91rm9200-gpio";
 523                                         reg = <0xfffffa00 0x200>;
 524                                         interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
 525                                         #gpio-cells = <2>;
 526                                         gpio-controller;
 527                                         interrupt-controller;
 528                                         #interrupt-cells = <2>;
 529                                 };
 530                         };
 531
 532                         dbgu: serial@fffff200 {
 533                                 compatible = "atmel,at91rm9200-usart";
 534                                 reg = <0xfffff200 0x200>;
 535                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 536                                 pinctrl-names = "default";
 537                                 pinctrl-0 = <&pinctrl_dbgu>;
 538                                 status = "disabled";
 539                         };
 540
 541                         usart0: serial@fffc0000 {
 542                                 compatible = "atmel,at91rm9200-usart";
 543                                 reg = <0xfffc0000 0x200>;
 544                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 545                                 atmel,use-dma-rx;
 546                                 atmel,use-dma-tx;
 547                                 pinctrl-names = "default";
 548                                 pinctrl-0 = <&pinctrl_uart0>;
 549                                 status = "disabled";
 550                         };
 551
 552                         usart1: serial@fffc4000 {
 553                                 compatible = "atmel,at91rm9200-usart";
 554                                 reg = <0xfffc4000 0x200>;
 555                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 556                                 atmel,use-dma-rx;
 557                                 atmel,use-dma-tx;
 558                                 pinctrl-names = "default";
 559                                 pinctrl-0 = <&pinctrl_uart1>;
 560                                 status = "disabled";
 561                         };
 562
 563                         usart2: serial@fffc8000 {
 564                                 compatible = "atmel,at91rm9200-usart";
 565                                 reg = <0xfffc8000 0x200>;
 566                                 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
 567                                 atmel,use-dma-rx;
 568                                 atmel,use-dma-tx;
 569                                 pinctrl-names = "default";
 570                                 pinctrl-0 = <&pinctrl_uart2>;
 571                                 status = "disabled";
 572                         };
 573
 574                         usart3: serial@fffcc000 {
 575                                 compatible = "atmel,at91rm9200-usart";
 576                                 reg = <0xfffcc000 0x200>;
 577                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
 578                                 atmel,use-dma-rx;
 579                                 atmel,use-dma-tx;
 580                                 pinctrl-names = "default";
 581                                 pinctrl-0 = <&pinctrl_uart3>;
 582                                 status = "disabled";
 583                         };
 584
 585                         usb1: gadget@fffb0000 {
 586                                 compatible = "atmel,at91rm9200-udc";
 587                                 reg = <0xfffb0000 0x4000>;
 588                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
 589                                 status = "disabled";
 590                         };
 591
 592                         spi0: spi@fffe0000 {
 593                                 #address-cells = <1>;
 594                                 #size-cells = <0>;
 595                                 compatible = "atmel,at91rm9200-spi";
 596                                 reg = <0xfffe0000 0x200>;
 597                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
 598                                 pinctrl-names = "default";
 599                                 pinctrl-0 = <&pinctrl_spi0>;
 600                                 status = "disabled";
 601                         };
 602                 };
 603
 604                 nand0: nand@40000000 {
 605                         compatible = "atmel,at91rm9200-nand";
 606                         #address-cells = <1>;
 607                         #size-cells = <1>;
 608                         reg = <0x40000000 0x10000000>;
 609                         atmel,nand-addr-offset = <21>;
 610                         atmel,nand-cmd-offset = <22>;
 611                         pinctrl-names = "default";
 612                         pinctrl-0 = <&pinctrl_nand>;
 613                         nand-ecc-mode = "soft";
 614                         gpios = <&pioC 2 GPIO_ACTIVE_HIGH
 615                                  0
 616                                  &pioB 1 GPIO_ACTIVE_HIGH
 617                                 >;
 618                         status = "disabled";
 619                 };
 620
 621                 usb0: ohci@00300000 {
 622                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 623                         reg = <0x00300000 0x100000>;
 624                         interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
 625                         status = "disabled";
 626                 };
 627         };
 628
 629         i2c@0 {
 630                 compatible = "i2c-gpio";
 631                 gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
 632                          &pioA 26 GPIO_ACTIVE_HIGH /* scl */
 633                         >;
 634                 i2c-gpio,sda-open-drain;
 635                 i2c-gpio,scl-open-drain;
 636                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 637                 pinctrl-names = "default";
 638                 pinctrl-0 = <&pinctrl_twi_gpio>;
 639                 #address-cells = <1>;
 640                 #size-cells = <0>;
 641                 status = "disabled";
 642         };
 643 };