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[people/arne_f/kernel.git] / arch / arm / boot / dts / hi3620-hi4511.dts
1 /*
2 * Copyright (C) 2012-2013 Linaro Ltd.
3 * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * publishhed by the Free Software Foundation.
8 */
9
10 /dts-v1/;
11
12 #include "hi3620.dtsi"
13
14 / {
15 model = "Hisilicon Hi4511 Development Board";
16 compatible = "hisilicon,hi3620-hi4511";
17
18 chosen {
19 bootargs = "console=ttyAMA0,115200 root=/dev/ram0 earlyprintk";
20 };
21
22 memory {
23 device_type = "memory";
24 reg = <0x40000000 0x20000000>;
25 };
26
27 amba {
28 dual_timer0: dual_timer@800000 {
29 status = "ok";
30 };
31
32 uart0: uart@b00000 { /* console */
33 pinctrl-names = "default", "idle";
34 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
35 pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
36 status = "ok";
37 };
38
39 uart1: uart@b01000 { /* modem */
40 pinctrl-names = "default", "idle";
41 pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
42 pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>;
43 status = "ok";
44 };
45
46 uart2: uart@b02000 { /* audience */
47 pinctrl-names = "default", "idle";
48 pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
49 pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>;
50 status = "ok";
51 };
52
53 uart3: uart@b03000 {
54 pinctrl-names = "default", "idle";
55 pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
56 pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>;
57 status = "ok";
58 };
59
60 uart4: uart@b04000 {
61 pinctrl-names = "default", "idle";
62 pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
63 pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>;
64 status = "ok";
65 };
66
67 pmx0: pinmux@803000 {
68 pinctrl-names = "default";
69 pinctrl-0 = <&board_pmx_pins>;
70
71 board_pmx_pins: board_pmx_pins {
72 pinctrl-single,pins = <
73 0x008 0x0 /* GPIO -- eFUSE_DOUT */
74 0x100 0x0 /* USIM_CLK & USIM_DATA (IOMG63) */
75 >;
76 };
77 uart0_pmx_func: uart0_pmx_func {
78 pinctrl-single,pins = <
79 0x0f0 0x0
80 0x0f4 0x0 /* UART0_RX & UART0_TX */
81 >;
82 };
83 uart0_pmx_idle: uart0_pmx_idle {
84 pinctrl-single,pins = <
85 /*0x0f0 0x1*/ /* UART0_CTS & UART0_RTS */
86 0x0f4 0x1 /* UART0_RX & UART0_TX */
87 >;
88 };
89 uart1_pmx_func: uart1_pmx_func {
90 pinctrl-single,pins = <
91 0x0f8 0x0 /* UART1_CTS & UART1_RTS (IOMG61) */
92 0x0fc 0x0 /* UART1_RX & UART1_TX (IOMG62) */
93 >;
94 };
95 uart1_pmx_idle: uart1_pmx_idle {
96 pinctrl-single,pins = <
97 0x0f8 0x1 /* GPIO (IOMG61) */
98 0x0fc 0x1 /* GPIO (IOMG62) */
99 >;
100 };
101 uart2_pmx_func: uart2_pmx_func {
102 pinctrl-single,pins = <
103 0x104 0x2 /* UART2_RXD (IOMG96) */
104 0x108 0x2 /* UART2_TXD (IOMG64) */
105 >;
106 };
107 uart2_pmx_idle: uart2_pmx_idle {
108 pinctrl-single,pins = <
109 0x104 0x1 /* GPIO (IOMG96) */
110 0x108 0x1 /* GPIO (IOMG64) */
111 >;
112 };
113 uart3_pmx_func: uart3_pmx_func {
114 pinctrl-single,pins = <
115 0x160 0x2 /* UART3_CTS & UART3_RTS (IOMG85) */
116 0x164 0x2 /* UART3_RXD & UART3_TXD (IOMG86) */
117 >;
118 };
119 uart3_pmx_idle: uart3_pmx_idle {
120 pinctrl-single,pins = <
121 0x160 0x1 /* GPIO (IOMG85) */
122 0x164 0x1 /* GPIO (IOMG86) */
123 >;
124 };
125 uart4_pmx_func: uart4_pmx_func {
126 pinctrl-single,pins = <
127 0x168 0x0 /* UART4_CTS & UART4_RTS (IOMG87) */
128 0x16c 0x0 /* UART4_RXD (IOMG88) */
129 0x170 0x0 /* UART4_TXD (IOMG93) */
130 >;
131 };
132 uart4_pmx_idle: uart4_pmx_idle {
133 pinctrl-single,pins = <
134 0x168 0x1 /* GPIO (IOMG87) */
135 0x16c 0x1 /* GPIO (IOMG88) */
136 0x170 0x1 /* GPIO (IOMG93) */
137 >;
138 };
139 i2c0_pmx_func: i2c0_pmx_func {
140 pinctrl-single,pins = <
141 0x0b4 0x0 /* I2C0_SCL & I2C0_SDA (IOMG45) */
142 >;
143 };
144 i2c0_pmx_idle: i2c0_pmx_idle {
145 pinctrl-single,pins = <
146 0x0b4 0x1 /* GPIO (IOMG45) */
147 >;
148 };
149 i2c1_pmx_func: i2c1_pmx_func {
150 pinctrl-single,pins = <
151 0x0b8 0x0 /* I2C1_SCL & I2C1_SDA (IOMG46) */
152 >;
153 };
154 i2c1_pmx_idle: i2c1_pmx_idle {
155 pinctrl-single,pins = <
156 0x0b8 0x1 /* GPIO (IOMG46) */
157 >;
158 };
159 i2c2_pmx_func: i2c2_pmx_func {
160 pinctrl-single,pins = <
161 0x068 0x0 /* I2C2_SCL (IOMG26) */
162 0x06c 0x0 /* I2C2_SDA (IOMG27) */
163 >;
164 };
165 i2c2_pmx_idle: i2c2_pmx_idle {
166 pinctrl-single,pins = <
167 0x068 0x1 /* GPIO (IOMG26) */
168 0x06c 0x1 /* GPIO (IOMG27) */
169 >;
170 };
171 i2c3_pmx_func: i2c3_pmx_func {
172 pinctrl-single,pins = <
173 0x050 0x2 /* I2C3_SCL (IOMG20) */
174 0x054 0x2 /* I2C3_SDA (IOMG21) */
175 >;
176 };
177 i2c3_pmx_idle: i2c3_pmx_idle {
178 pinctrl-single,pins = <
179 0x050 0x1 /* GPIO (IOMG20) */
180 0x054 0x1 /* GPIO (IOMG21) */
181 >;
182 };
183 spi0_pmx_func: spi0_pmx_func {
184 pinctrl-single,pins = <
185 0x0d4 0x0 /* SPI0_CLK/SPI0_DI/SPI0_DO (IOMG53) */
186 0x0d8 0x0 /* SPI0_CS0 (IOMG54) */
187 0x0dc 0x0 /* SPI0_CS1 (IOMG55) */
188 0x0e0 0x0 /* SPI0_CS2 (IOMG56) */
189 0x0e4 0x0 /* SPI0_CS3 (IOMG57) */
190 >;
191 };
192 spi0_pmx_idle: spi0_pmx_idle {
193 pinctrl-single,pins = <
194 0x0d4 0x1 /* GPIO (IOMG53) */
195 0x0d8 0x1 /* GPIO (IOMG54) */
196 0x0dc 0x1 /* GPIO (IOMG55) */
197 0x0e0 0x1 /* GPIO (IOMG56) */
198 0x0e4 0x1 /* GPIO (IOMG57) */
199 >;
200 };
201 spi1_pmx_func: spi1_pmx_func {
202 pinctrl-single,pins = <
203 0x184 0x0 /* SPI1_CLK/SPI1_DI (IOMG98) */
204 0x0e8 0x0 /* SPI1_DO (IOMG58) */
205 0x0ec 0x0 /* SPI1_CS (IOMG95) */
206 >;
207 };
208 spi1_pmx_idle: spi1_pmx_idle {
209 pinctrl-single,pins = <
210 0x184 0x1 /* GPIO (IOMG98) */
211 0x0e8 0x1 /* GPIO (IOMG58) */
212 0x0ec 0x1 /* GPIO (IOMG95) */
213 >;
214 };
215 kpc_pmx_func: kpc_pmx_func {
216 pinctrl-single,pins = <
217 0x12c 0x0 /* KEY_IN0 (IOMG73) */
218 0x130 0x0 /* KEY_IN1 (IOMG74) */
219 0x134 0x0 /* KEY_IN2 (IOMG75) */
220 0x10c 0x0 /* KEY_OUT0 (IOMG65) */
221 0x110 0x0 /* KEY_OUT1 (IOMG66) */
222 0x114 0x0 /* KEY_OUT2 (IOMG67) */
223 >;
224 };
225 kpc_pmx_idle: kpc_pmx_idle {
226 pinctrl-single,pins = <
227 0x12c 0x1 /* GPIO (IOMG73) */
228 0x130 0x1 /* GPIO (IOMG74) */
229 0x134 0x1 /* GPIO (IOMG75) */
230 0x10c 0x1 /* GPIO (IOMG65) */
231 0x110 0x1 /* GPIO (IOMG66) */
232 0x114 0x1 /* GPIO (IOMG67) */
233 >;
234 };
235 gpio_key_func: gpio_key_func {
236 pinctrl-single,pins = <
237 0x10c 0x1 /* KEY_OUT0/GPIO (IOMG65) */
238 0x130 0x1 /* KEY_IN1/GPIO (IOMG74) */
239 >;
240 };
241 emmc_pmx_func: emmc_pmx_func {
242 pinctrl-single,pins = <
243 0x030 0x2 /* eMMC_CMD/eMMC_CLK (IOMG12) */
244 0x018 0x0 /* NAND_CS3_N (IOMG6) */
245 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */
246 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */
247 0x02c 0x2 /* eMMC_DATA[0:7] (IOMG10) */
248 >;
249 };
250 emmc_pmx_idle: emmc_pmx_idle {
251 pinctrl-single,pins = <
252 0x030 0x0 /* GPIO (IOMG12) */
253 0x018 0x1 /* GPIO (IOMG6) */
254 0x024 0x1 /* GPIO (IOMG8) */
255 0x028 0x1 /* GPIO (IOMG9) */
256 0x02c 0x1 /* GPIO (IOMG10) */
257 >;
258 };
259 sd_pmx_func: sd_pmx_func {
260 pinctrl-single,pins = <
261 0x0bc 0x0 /* SD_CLK/SD_CMD/SD_DATA0/SD_DATA1/SD_DATA2 (IOMG47) */
262 0x0c0 0x0 /* SD_DATA3 (IOMG48) */
263 >;
264 };
265 sd_pmx_idle: sd_pmx_idle {
266 pinctrl-single,pins = <
267 0x0bc 0x1 /* GPIO (IOMG47) */
268 0x0c0 0x1 /* GPIO (IOMG48) */
269 >;
270 };
271 nand_pmx_func: nand_pmx_func {
272 pinctrl-single,pins = <
273 0x00c 0x0 /* NAND_ALE/NAND_CLE/.../NAND_DATA[0:7] (IOMG3) */
274 0x010 0x0 /* NAND_CS1_N (IOMG4) */
275 0x014 0x0 /* NAND_CS2_N (IOMG5) */
276 0x018 0x0 /* NAND_CS3_N (IOMG6) */
277 0x01c 0x0 /* NAND_BUSY0_N (IOMG94) */
278 0x020 0x0 /* NAND_BUSY1_N (IOMG7) */
279 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */
280 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */
281 0x02c 0x0 /* NAND_DATA[8:15] (IOMG10) */
282 >;
283 };
284 nand_pmx_idle: nand_pmx_idle {
285 pinctrl-single,pins = <
286 0x00c 0x1 /* GPIO (IOMG3) */
287 0x010 0x1 /* GPIO (IOMG4) */
288 0x014 0x1 /* GPIO (IOMG5) */
289 0x018 0x1 /* GPIO (IOMG6) */
290 0x01c 0x1 /* GPIO (IOMG94) */
291 0x020 0x1 /* GPIO (IOMG7) */
292 0x024 0x1 /* GPIO (IOMG8) */
293 0x028 0x1 /* GPIO (IOMG9) */
294 0x02c 0x1 /* GPIO (IOMG10) */
295 >;
296 };
297 sdio_pmx_func: sdio_pmx_func {
298 pinctrl-single,pins = <
299 0x0c4 0x0 /* SDIO_CLK/SDIO_CMD/SDIO_DATA[0:3] (IOMG49) */
300 >;
301 };
302 sdio_pmx_idle: sdio_pmx_idle {
303 pinctrl-single,pins = <
304 0x0c4 0x1 /* GPIO (IOMG49) */
305 >;
306 };
307 audio_out_pmx_func: audio_out_pmx_func {
308 pinctrl-single,pins = <
309 0x0f0 0x1 /* GPIO (IOMG59), audio spk & earphone */
310 >;
311 };
312 };
313
314 pmx1: pinmux@803800 {
315 pinctrl-names = "default";
316 pinctrl-0 = < &board_pu_pins &board_pd_pins &board_pd_ps_pins
317 &board_np_pins &board_ps_pins &kpc_cfg_func
318 &audio_out_cfg_func>;
319 board_pu_pins: board_pu_pins {
320 pinctrl-single,pins = <
321 0x014 0 /* GPIO_158 (IOCFG2) */
322 0x018 0 /* GPIO_159 (IOCFG3) */
323 0x01c 0 /* BOOT_MODE0 (IOCFG4) */
324 0x020 0 /* BOOT_MODE1 (IOCFG5) */
325 >;
326 pinctrl-single,bias-pulldown = <0 2 0 2>;
327 pinctrl-single,bias-pullup = <1 1 0 1>;
328 };
329 board_pd_pins: board_pd_pins {
330 pinctrl-single,pins = <
331 0x038 0 /* eFUSE_DOUT (IOCFG11) */
332 0x150 0 /* ISP_GPIO8 (IOCFG93) */
333 0x154 0 /* ISP_GPIO9 (IOCFG94) */
334 >;
335 pinctrl-single,bias-pulldown = <2 2 0 2>;
336 pinctrl-single,bias-pullup = <0 1 0 1>;
337 };
338 board_pd_ps_pins: board_pd_ps_pins {
339 pinctrl-single,pins = <
340 0x2d8 0 /* CLK_OUT0 (IOCFG190) */
341 0x004 0 /* PMU_SPI_DATA (IOCFG192) */
342 >;
343 pinctrl-single,bias-pulldown = <2 2 0 2>;
344 pinctrl-single,bias-pullup = <0 1 0 1>;
345 pinctrl-single,drive-strength = <0x30 0xf0>;
346 };
347 board_np_pins: board_np_pins {
348 pinctrl-single,pins = <
349 0x24c 0 /* KEYPAD_OUT7 (IOCFG155) */
350 >;
351 pinctrl-single,bias-pulldown = <0 2 0 2>;
352 pinctrl-single,bias-pullup = <0 1 0 1>;
353 };
354 board_ps_pins: board_ps_pins {
355 pinctrl-single,pins = <
356 0x000 0 /* PMU_SPI_CLK (IOCFG191) */
357 0x008 0 /* PMU_SPI_CS_N (IOCFG193) */
358 >;
359 pinctrl-single,drive-strength = <0x30 0xf0>;
360 };
361 uart0_cfg_func: uart0_cfg_func {
362 pinctrl-single,pins = <
363 0x208 0 /* UART0_RXD (IOCFG138) */
364 0x20c 0 /* UART0_TXD (IOCFG139) */
365 >;
366 pinctrl-single,bias-pulldown = <0 2 0 2>;
367 pinctrl-single,bias-pullup = <0 1 0 1>;
368 };
369 uart0_cfg_idle: uart0_cfg_idle {
370 pinctrl-single,pins = <
371 0x208 0 /* UART0_RXD (IOCFG138) */
372 0x20c 0 /* UART0_TXD (IOCFG139) */
373 >;
374 pinctrl-single,bias-pulldown = <2 2 0 2>;
375 pinctrl-single,bias-pullup = <0 1 0 1>;
376 };
377 uart1_cfg_func: uart1_cfg_func {
378 pinctrl-single,pins = <
379 0x210 0 /* UART1_CTS (IOCFG140) */
380 0x214 0 /* UART1_RTS (IOCFG141) */
381 0x218 0 /* UART1_RXD (IOCFG142) */
382 0x21c 0 /* UART1_TXD (IOCFG143) */
383 >;
384 pinctrl-single,bias-pulldown = <0 2 0 2>;
385 pinctrl-single,bias-pullup = <0 1 0 1>;
386 };
387 uart1_cfg_idle: uart1_cfg_idle {
388 pinctrl-single,pins = <
389 0x210 0 /* UART1_CTS (IOCFG140) */
390 0x214 0 /* UART1_RTS (IOCFG141) */
391 0x218 0 /* UART1_RXD (IOCFG142) */
392 0x21c 0 /* UART1_TXD (IOCFG143) */
393 >;
394 pinctrl-single,bias-pulldown = <2 2 0 2>;
395 pinctrl-single,bias-pullup = <0 1 0 1>;
396 };
397 uart2_cfg_func: uart2_cfg_func {
398 pinctrl-single,pins = <
399 0x220 0 /* UART2_CTS (IOCFG144) */
400 0x224 0 /* UART2_RTS (IOCFG145) */
401 0x228 0 /* UART2_RXD (IOCFG146) */
402 0x22c 0 /* UART2_TXD (IOCFG147) */
403 >;
404 pinctrl-single,bias-pulldown = <0 2 0 2>;
405 pinctrl-single,bias-pullup = <0 1 0 1>;
406 };
407 uart2_cfg_idle: uart2_cfg_idle {
408 pinctrl-single,pins = <
409 0x220 0 /* GPIO (IOCFG144) */
410 0x224 0 /* GPIO (IOCFG145) */
411 0x228 0 /* GPIO (IOCFG146) */
412 0x22c 0 /* GPIO (IOCFG147) */
413 >;
414 pinctrl-single,bias-pulldown = <2 2 0 2>;
415 pinctrl-single,bias-pullup = <0 1 0 1>;
416 };
417 uart3_cfg_func: uart3_cfg_func {
418 pinctrl-single,pins = <
419 0x294 0 /* UART3_CTS (IOCFG173) */
420 0x298 0 /* UART3_RTS (IOCFG174) */
421 0x29c 0 /* UART3_RXD (IOCFG175) */
422 0x2a0 0 /* UART3_TXD (IOCFG176) */
423 >;
424 pinctrl-single,bias-pulldown = <0 2 0 2>;
425 pinctrl-single,bias-pullup = <0 1 0 1>;
426 };
427 uart3_cfg_idle: uart3_cfg_idle {
428 pinctrl-single,pins = <
429 0x294 0 /* UART3_CTS (IOCFG173) */
430 0x298 0 /* UART3_RTS (IOCFG174) */
431 0x29c 0 /* UART3_RXD (IOCFG175) */
432 0x2a0 0 /* UART3_TXD (IOCFG176) */
433 >;
434 pinctrl-single,bias-pulldown = <2 2 0 2>;
435 pinctrl-single,bias-pullup = <0 1 0 1>;
436 };
437 uart4_cfg_func: uart4_cfg_func {
438 pinctrl-single,pins = <
439 0x2a4 0 /* UART4_CTS (IOCFG177) */
440 0x2a8 0 /* UART4_RTS (IOCFG178) */
441 0x2ac 0 /* UART4_RXD (IOCFG179) */
442 0x2b0 0 /* UART4_TXD (IOCFG180) */
443 >;
444 pinctrl-single,bias-pulldown = <0 2 0 2>;
445 pinctrl-single,bias-pullup = <0 1 0 1>;
446 };
447 i2c0_cfg_func: i2c0_cfg_func {
448 pinctrl-single,pins = <
449 0x17c 0 /* I2C0_SCL (IOCFG103) */
450 0x180 0 /* I2C0_SDA (IOCFG104) */
451 >;
452 pinctrl-single,bias-pulldown = <0 2 0 2>;
453 pinctrl-single,bias-pullup = <0 1 0 1>;
454 pinctrl-single,drive-strength = <0x30 0xf0>;
455 };
456 i2c1_cfg_func: i2c1_cfg_func {
457 pinctrl-single,pins = <
458 0x184 0 /* I2C1_SCL (IOCFG105) */
459 0x188 0 /* I2C1_SDA (IOCFG106) */
460 >;
461 pinctrl-single,bias-pulldown = <0 2 0 2>;
462 pinctrl-single,bias-pullup = <0 1 0 1>;
463 pinctrl-single,drive-strength = <0x30 0xf0>;
464 };
465 i2c2_cfg_func: i2c2_cfg_func {
466 pinctrl-single,pins = <
467 0x118 0 /* I2C2_SCL (IOCFG79) */
468 0x11c 0 /* I2C2_SDA (IOCFG80) */
469 >;
470 pinctrl-single,bias-pulldown = <0 2 0 2>;
471 pinctrl-single,bias-pullup = <0 1 0 1>;
472 pinctrl-single,drive-strength = <0x30 0xf0>;
473 };
474 i2c3_cfg_func: i2c3_cfg_func {
475 pinctrl-single,pins = <
476 0x100 0 /* I2C3_SCL (IOCFG73) */
477 0x104 0 /* I2C3_SDA (IOCFG74) */
478 >;
479 pinctrl-single,bias-pulldown = <0 2 0 2>;
480 pinctrl-single,bias-pullup = <0 1 0 1>;
481 pinctrl-single,drive-strength = <0x30 0xf0>;
482 };
483 spi0_cfg_func1: spi0_cfg_func1 {
484 pinctrl-single,pins = <
485 0x1d4 0 /* SPI0_CLK (IOCFG125) */
486 0x1d8 0 /* SPI0_DI (IOCFG126) */
487 0x1dc 0 /* SPI0_DO (IOCFG127) */
488 >;
489 pinctrl-single,bias-pulldown = <2 2 0 2>;
490 pinctrl-single,bias-pullup = <0 1 0 1>;
491 pinctrl-single,drive-strength = <0x30 0xf0>;
492 };
493 spi0_cfg_func2: spi0_cfg_func2 {
494 pinctrl-single,pins = <
495 0x1e0 0 /* SPI0_CS0 (IOCFG128) */
496 0x1e4 0 /* SPI0_CS1 (IOCFG129) */
497 0x1e8 0 /* SPI0_CS2 (IOCFG130 */
498 0x1ec 0 /* SPI0_CS3 (IOCFG131) */
499 >;
500 pinctrl-single,bias-pulldown = <0 2 0 2>;
501 pinctrl-single,bias-pullup = <1 1 0 1>;
502 pinctrl-single,drive-strength = <0x30 0xf0>;
503 };
504 spi1_cfg_func1: spi1_cfg_func1 {
505 pinctrl-single,pins = <
506 0x1f0 0 /* SPI1_CLK (IOCFG132) */
507 0x1f4 0 /* SPI1_DI (IOCFG133) */
508 0x1f8 0 /* SPI1_DO (IOCFG134) */
509 >;
510 pinctrl-single,bias-pulldown = <2 2 0 2>;
511 pinctrl-single,bias-pullup = <0 1 0 1>;
512 pinctrl-single,drive-strength = <0x30 0xf0>;
513 };
514 spi1_cfg_func2: spi1_cfg_func2 {
515 pinctrl-single,pins = <
516 0x1fc 0 /* SPI1_CS (IOCFG135) */
517 >;
518 pinctrl-single,bias-pulldown = <0 2 0 2>;
519 pinctrl-single,bias-pullup = <1 1 0 1>;
520 pinctrl-single,drive-strength = <0x30 0xf0>;
521 };
522 kpc_cfg_func: kpc_cfg_func {
523 pinctrl-single,pins = <
524 0x250 0 /* KEY_IN0 (IOCFG156) */
525 0x254 0 /* KEY_IN1 (IOCFG157) */
526 0x258 0 /* KEY_IN2 (IOCFG158) */
527 0x230 0 /* KEY_OUT0 (IOCFG148) */
528 0x234 0 /* KEY_OUT1 (IOCFG149) */
529 0x238 0 /* KEY_OUT2 (IOCFG150) */
530 >;
531 pinctrl-single,bias-pulldown = <2 2 0 2>;
532 pinctrl-single,bias-pullup = <0 1 0 1>;
533 };
534 emmc_cfg_func: emmc_cfg_func {
535 pinctrl-single,pins = <
536 0x0ac 0 /* eMMC_CMD (IOCFG40) */
537 0x0b0 0 /* eMMC_CLK (IOCFG41) */
538 0x058 0 /* NAND_CS3_N (IOCFG19) */
539 0x064 0 /* NAND_BUSY2_N (IOCFG22) */
540 0x068 0 /* NAND_BUSY3_N (IOCFG23) */
541 0x08c 0 /* NAND_DATA8 (IOCFG32) */
542 0x090 0 /* NAND_DATA9 (IOCFG33) */
543 0x094 0 /* NAND_DATA10 (IOCFG34) */
544 0x098 0 /* NAND_DATA11 (IOCFG35) */
545 0x09c 0 /* NAND_DATA12 (IOCFG36) */
546 0x0a0 0 /* NAND_DATA13 (IOCFG37) */
547 0x0a4 0 /* NAND_DATA14 (IOCFG38) */
548 0x0a8 0 /* NAND_DATA15 (IOCFG39) */
549 >;
550 pinctrl-single,bias-pulldown = <0 2 0 2>;
551 pinctrl-single,bias-pullup = <1 1 0 1>;
552 pinctrl-single,drive-strength = <0x30 0xf0>;
553 };
554 sd_cfg_func1: sd_cfg_func1 {
555 pinctrl-single,pins = <
556 0x18c 0 /* SD_CLK (IOCFG107) */
557 0x190 0 /* SD_CMD (IOCFG108) */
558 >;
559 pinctrl-single,bias-pulldown = <2 2 0 2>;
560 pinctrl-single,bias-pullup = <0 1 0 1>;
561 pinctrl-single,drive-strength = <0x30 0xf0>;
562 };
563 sd_cfg_func2: sd_cfg_func2 {
564 pinctrl-single,pins = <
565 0x194 0 /* SD_DATA0 (IOCFG109) */
566 0x198 0 /* SD_DATA1 (IOCFG110) */
567 0x19c 0 /* SD_DATA2 (IOCFG111) */
568 0x1a0 0 /* SD_DATA3 (IOCFG112) */
569 >;
570 pinctrl-single,bias-pulldown = <2 2 0 2>;
571 pinctrl-single,bias-pullup = <0 1 0 1>;
572 pinctrl-single,drive-strength = <0x70 0xf0>;
573 };
574 nand_cfg_func1: nand_cfg_func1 {
575 pinctrl-single,pins = <
576 0x03c 0 /* NAND_ALE (IOCFG12) */
577 0x040 0 /* NAND_CLE (IOCFG13) */
578 0x06c 0 /* NAND_DATA0 (IOCFG24) */
579 0x070 0 /* NAND_DATA1 (IOCFG25) */
580 0x074 0 /* NAND_DATA2 (IOCFG26) */
581 0x078 0 /* NAND_DATA3 (IOCFG27) */
582 0x07c 0 /* NAND_DATA4 (IOCFG28) */
583 0x080 0 /* NAND_DATA5 (IOCFG29) */
584 0x084 0 /* NAND_DATA6 (IOCFG30) */
585 0x088 0 /* NAND_DATA7 (IOCFG31) */
586 0x08c 0 /* NAND_DATA8 (IOCFG32) */
587 0x090 0 /* NAND_DATA9 (IOCFG33) */
588 0x094 0 /* NAND_DATA10 (IOCFG34) */
589 0x098 0 /* NAND_DATA11 (IOCFG35) */
590 0x09c 0 /* NAND_DATA12 (IOCFG36) */
591 0x0a0 0 /* NAND_DATA13 (IOCFG37) */
592 0x0a4 0 /* NAND_DATA14 (IOCFG38) */
593 0x0a8 0 /* NAND_DATA15 (IOCFG39) */
594 >;
595 pinctrl-single,bias-pulldown = <2 2 0 2>;
596 pinctrl-single,bias-pullup = <0 1 0 1>;
597 pinctrl-single,drive-strength = <0x30 0xf0>;
598 };
599 nand_cfg_func2: nand_cfg_func2 {
600 pinctrl-single,pins = <
601 0x044 0 /* NAND_RE_N (IOCFG14) */
602 0x048 0 /* NAND_WE_N (IOCFG15) */
603 0x04c 0 /* NAND_CS0_N (IOCFG16) */
604 0x050 0 /* NAND_CS1_N (IOCFG17) */
605 0x054 0 /* NAND_CS2_N (IOCFG18) */
606 0x058 0 /* NAND_CS3_N (IOCFG19) */
607 0x05c 0 /* NAND_BUSY0_N (IOCFG20) */
608 0x060 0 /* NAND_BUSY1_N (IOCFG21) */
609 0x064 0 /* NAND_BUSY2_N (IOCFG22) */
610 0x068 0 /* NAND_BUSY3_N (IOCFG23) */
611 >;
612 pinctrl-single,bias-pulldown = <0 2 0 2>;
613 pinctrl-single,bias-pullup = <1 1 0 1>;
614 pinctrl-single,drive-strength = <0x30 0xf0>;
615 };
616 sdio_cfg_func: sdio_cfg_func {
617 pinctrl-single,pins = <
618 0x1a4 0 /* SDIO0_CLK (IOCG113) */
619 0x1a8 0 /* SDIO0_CMD (IOCG114) */
620 0x1ac 0 /* SDIO0_DATA0 (IOCG115) */
621 0x1b0 0 /* SDIO0_DATA1 (IOCG116) */
622 0x1b4 0 /* SDIO0_DATA2 (IOCG117) */
623 0x1b8 0 /* SDIO0_DATA3 (IOCG118) */
624 >;
625 pinctrl-single,bias-pulldown = <2 2 0 2>;
626 pinctrl-single,bias-pullup = <0 1 0 1>;
627 pinctrl-single,drive-strength = <0x30 0xf0>;
628 };
629 audio_out_cfg_func: audio_out_cfg_func {
630 pinctrl-single,pins = <
631 0x200 0 /* GPIO (IOCFG136) */
632 0x204 0 /* GPIO (IOCFG137) */
633 >;
634 pinctrl-single,bias-pulldown = <2 2 0 2>;
635 pinctrl-single,bias-pullup = <0 1 0 1>;
636 };
637 };
638 };
639
640 gpio-keys {
641 compatible = "gpio-keys";
642
643 call {
644 label = "call";
645 gpios = <&gpio17 2 0>;
646 linux,code = <169>; /* KEY_PHONE */
647 };
648 };
649 };
Arne's tree of linux kernel.