arch/arm/boot/dts/imx27.dtsi

   1 /*
   2  * Copyright 2012 Sascha Hauer, Pengutronix
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include "skeleton.dtsi"
  13
  14 / {
  15         aliases {
  16                 gpio0 = &gpio1;
  17                 gpio1 = &gpio2;
  18                 gpio2 = &gpio3;
  19                 gpio3 = &gpio4;
  20                 gpio4 = &gpio5;
  21                 gpio5 = &gpio6;
  22                 i2c0 = &i2c1;
  23                 i2c1 = &i2c2;
  24                 serial0 = &uart1;
  25                 serial1 = &uart2;
  26                 serial2 = &uart3;
  27                 serial3 = &uart4;
  28                 serial4 = &uart5;
  29                 serial5 = &uart6;
  30                 spi0 = &cspi1;
  31                 spi1 = &cspi2;
  32                 spi2 = &cspi3;
  33                 ethernet0 = &fec;
  34         };
  35
  36         aitc: aitc-interrupt-controller@e0000000 {
  37                 compatible = "fsl,imx27-aitc", "fsl,avic";
  38                 interrupt-controller;
  39                 #interrupt-cells = <1>;
  40                 reg = <0x10040000 0x1000>;
  41         };
  42
  43         clocks {
  44                 #address-cells = <1>;
  45                 #size-cells = <0>;
  46
  47                 osc26m {
  48                         compatible = "fsl,imx-osc26m", "fixed-clock";
  49                         clock-frequency = <26000000>;
  50                 };
  51         };
  52
  53         cpus {
  54                 #size-cells = <0>;
  55                 #address-cells = <1>;
  56
  57                 cpu: cpu@0 {
  58                         device_type = "cpu";
  59                         compatible = "arm,arm926ej-s";
  60                         operating-points = <
  61                                 /* kHz uV */
  62                                 266000 1300000
  63                                 399000 1450000
  64                         >;
  65                         clock-latency = <62500>;
  66                         clocks = <&clks 18>;
  67                         voltage-tolerance = <5>;
  68                 };
  69         };
  70
  71         soc {
  72                 #address-cells = <1>;
  73                 #size-cells = <1>;
  74                 compatible = "simple-bus";
  75                 interrupt-parent = <&aitc>;
  76                 ranges;
  77
  78                 aipi@10000000 { /* AIPI1 */
  79                         compatible = "fsl,aipi-bus", "simple-bus";
  80                         #address-cells = <1>;
  81                         #size-cells = <1>;
  82                         reg = <0x10000000 0x20000>;
  83                         ranges;
  84
  85                         dma: dma@10001000 {
  86                                 compatible = "fsl,imx27-dma";
  87                                 reg = <0x10001000 0x1000>;
  88                                 interrupts = <32>;
  89                                 clocks = <&clks 50>, <&clks 70>;
  90                                 clock-names = "ipg", "ahb";
  91                                 #dma-cells = <1>;
  92                                 #dma-channels = <16>;
  93                         };
  94
  95                         wdog: wdog@10002000 {
  96                                 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
  97                                 reg = <0x10002000 0x1000>;
  98                                 interrupts = <27>;
  99                                 clocks = <&clks 74>;
 100                         };
 101
 102                         gpt1: timer@10003000 {
 103                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 104                                 reg = <0x10003000 0x1000>;
 105                                 interrupts = <26>;
 106                                 clocks = <&clks 46>, <&clks 61>;
 107                                 clock-names = "ipg", "per";
 108                         };
 109
 110                         gpt2: timer@10004000 {
 111                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 112                                 reg = <0x10004000 0x1000>;
 113                                 interrupts = <25>;
 114                                 clocks = <&clks 45>, <&clks 61>;
 115                                 clock-names = "ipg", "per";
 116                         };
 117
 118                         gpt3: timer@10005000 {
 119                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 120                                 reg = <0x10005000 0x1000>;
 121                                 interrupts = <24>;
 122                                 clocks = <&clks 44>, <&clks 61>;
 123                                 clock-names = "ipg", "per";
 124                         };
 125
 126                         pwm: pwm@10006000 {
 127                                 #pwm-cells = <2>;
 128                                 compatible = "fsl,imx27-pwm";
 129                                 reg = <0x10006000 0x1000>;
 130                                 interrupts = <23>;
 131                                 clocks = <&clks 34>, <&clks 61>;
 132                                 clock-names = "ipg", "per";
 133                         };
 134
 135                         kpp: kpp@10008000 {
 136                                 compatible = "fsl,imx27-kpp", "fsl,imx21-kpp";
 137                                 reg = <0x10008000 0x1000>;
 138                                 interrupts = <21>;
 139                                 clocks = <&clks 37>;
 140                                 status = "disabled";
 141                         };
 142
 143                         owire: owire@10009000 {
 144                                 compatible = "fsl,imx27-owire", "fsl,imx21-owire";
 145                                 reg = <0x10009000 0x1000>;
 146                                 clocks = <&clks 35>;
 147                                 status = "disabled";
 148                         };
 149
 150                         uart1: serial@1000a000 {
 151                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 152                                 reg = <0x1000a000 0x1000>;
 153                                 interrupts = <20>;
 154                                 clocks = <&clks 81>, <&clks 61>;
 155                                 clock-names = "ipg", "per";
 156                                 status = "disabled";
 157                         };
 158
 159                         uart2: serial@1000b000 {
 160                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 161                                 reg = <0x1000b000 0x1000>;
 162                                 interrupts = <19>;
 163                                 clocks = <&clks 80>, <&clks 61>;
 164                                 clock-names = "ipg", "per";
 165                                 status = "disabled";
 166                         };
 167
 168                         uart3: serial@1000c000 {
 169                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 170                                 reg = <0x1000c000 0x1000>;
 171                                 interrupts = <18>;
 172                                 clocks = <&clks 79>, <&clks 61>;
 173                                 clock-names = "ipg", "per";
 174                                 status = "disabled";
 175                         };
 176
 177                         uart4: serial@1000d000 {
 178                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 179                                 reg = <0x1000d000 0x1000>;
 180                                 interrupts = <17>;
 181                                 clocks = <&clks 78>, <&clks 61>;
 182                                 clock-names = "ipg", "per";
 183                                 status = "disabled";
 184                         };
 185
 186                         cspi1: cspi@1000e000 {
 187                                 #address-cells = <1>;
 188                                 #size-cells = <0>;
 189                                 compatible = "fsl,imx27-cspi";
 190                                 reg = <0x1000e000 0x1000>;
 191                                 interrupts = <16>;
 192                                 clocks = <&clks 53>, <&clks 60>;
 193                                 clock-names = "ipg", "per";
 194                                 status = "disabled";
 195                         };
 196
 197                         cspi2: cspi@1000f000 {
 198                                 #address-cells = <1>;
 199                                 #size-cells = <0>;
 200                                 compatible = "fsl,imx27-cspi";
 201                                 reg = <0x1000f000 0x1000>;
 202                                 interrupts = <15>;
 203                                 clocks = <&clks 52>, <&clks 60>;
 204                                 clock-names = "ipg", "per";
 205                                 status = "disabled";
 206                         };
 207
 208                         i2c1: i2c@10012000 {
 209                                 #address-cells = <1>;
 210                                 #size-cells = <0>;
 211                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 212                                 reg = <0x10012000 0x1000>;
 213                                 interrupts = <12>;
 214                                 clocks = <&clks 40>;
 215                                 status = "disabled";
 216                         };
 217
 218                         sdhci1: sdhci@10013000 {
 219                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 220                                 reg = <0x10013000 0x1000>;
 221                                 interrupts = <11>;
 222                                 clocks = <&clks 30>, <&clks 60>;
 223                                 clock-names = "ipg", "per";
 224                                 dmas = <&dma 7>;
 225                                 dma-names = "rx-tx";
 226                                 status = "disabled";
 227                         };
 228
 229                         sdhci2: sdhci@10014000 {
 230                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 231                                 reg = <0x10014000 0x1000>;
 232                                 interrupts = <10>;
 233                                 clocks = <&clks 29>, <&clks 60>;
 234                                 clock-names = "ipg", "per";
 235                                 dmas = <&dma 6>;
 236                                 dma-names = "rx-tx";
 237                                 status = "disabled";
 238                         };
 239
 240                         gpio1: gpio@10015000 {
 241                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 242                                 reg = <0x10015000 0x100>;
 243                                 interrupts = <8>;
 244                                 gpio-controller;
 245                                 #gpio-cells = <2>;
 246                                 interrupt-controller;
 247                                 #interrupt-cells = <2>;
 248                         };
 249
 250                         gpio2: gpio@10015100 {
 251                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 252                                 reg = <0x10015100 0x100>;
 253                                 interrupts = <8>;
 254                                 gpio-controller;
 255                                 #gpio-cells = <2>;
 256                                 interrupt-controller;
 257                                 #interrupt-cells = <2>;
 258                         };
 259
 260                         gpio3: gpio@10015200 {
 261                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 262                                 reg = <0x10015200 0x100>;
 263                                 interrupts = <8>;
 264                                 gpio-controller;
 265                                 #gpio-cells = <2>;
 266                                 interrupt-controller;
 267                                 #interrupt-cells = <2>;
 268                         };
 269
 270                         gpio4: gpio@10015300 {
 271                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 272                                 reg = <0x10015300 0x100>;
 273                                 interrupts = <8>;
 274                                 gpio-controller;
 275                                 #gpio-cells = <2>;
 276                                 interrupt-controller;
 277                                 #interrupt-cells = <2>;
 278                         };
 279
 280                         gpio5: gpio@10015400 {
 281                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 282                                 reg = <0x10015400 0x100>;
 283                                 interrupts = <8>;
 284                                 gpio-controller;
 285                                 #gpio-cells = <2>;
 286                                 interrupt-controller;
 287                                 #interrupt-cells = <2>;
 288                         };
 289
 290                         gpio6: gpio@10015500 {
 291                                 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
 292                                 reg = <0x10015500 0x100>;
 293                                 interrupts = <8>;
 294                                 gpio-controller;
 295                                 #gpio-cells = <2>;
 296                                 interrupt-controller;
 297                                 #interrupt-cells = <2>;
 298                         };
 299
 300                         audmux: audmux@10016000 {
 301                                 compatible = "fsl,imx27-audmux", "fsl,imx21-audmux";
 302                                 reg = <0x10016000 0x1000>;
 303                                 clocks = <&clks 0>;
 304                                 clock-names = "audmux";
 305                                 status = "disabled";
 306                         };
 307
 308                         cspi3: cspi@10017000 {
 309                                 #address-cells = <1>;
 310                                 #size-cells = <0>;
 311                                 compatible = "fsl,imx27-cspi";
 312                                 reg = <0x10017000 0x1000>;
 313                                 interrupts = <6>;
 314                                 clocks = <&clks 51>, <&clks 60>;
 315                                 clock-names = "ipg", "per";
 316                                 status = "disabled";
 317                         };
 318
 319                         gpt4: timer@10019000 {
 320                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 321                                 reg = <0x10019000 0x1000>;
 322                                 interrupts = <4>;
 323                                 clocks = <&clks 43>, <&clks 61>;
 324                                 clock-names = "ipg", "per";
 325                         };
 326
 327                         gpt5: timer@1001a000 {
 328                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 329                                 reg = <0x1001a000 0x1000>;
 330                                 interrupts = <3>;
 331                                 clocks = <&clks 42>, <&clks 61>;
 332                                 clock-names = "ipg", "per";
 333                         };
 334
 335                         uart5: serial@1001b000 {
 336                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 337                                 reg = <0x1001b000 0x1000>;
 338                                 interrupts = <49>;
 339                                 clocks = <&clks 77>, <&clks 61>;
 340                                 clock-names = "ipg", "per";
 341                                 status = "disabled";
 342                         };
 343
 344                         uart6: serial@1001c000 {
 345                                 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
 346                                 reg = <0x1001c000 0x1000>;
 347                                 interrupts = <48>;
 348                                 clocks = <&clks 78>, <&clks 61>;
 349                                 clock-names = "ipg", "per";
 350                                 status = "disabled";
 351                         };
 352
 353                         i2c2: i2c@1001d000 {
 354                                 #address-cells = <1>;
 355                                 #size-cells = <0>;
 356                                 compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
 357                                 reg = <0x1001d000 0x1000>;
 358                                 interrupts = <1>;
 359                                 clocks = <&clks 39>;
 360                                 status = "disabled";
 361                         };
 362
 363                         sdhci3: sdhci@1001e000 {
 364                                 compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";
 365                                 reg = <0x1001e000 0x1000>;
 366                                 interrupts = <9>;
 367                                 clocks = <&clks 28>, <&clks 60>;
 368                                 clock-names = "ipg", "per";
 369                                 dmas = <&dma 36>;
 370                                 dma-names = "rx-tx";
 371                                 status = "disabled";
 372                         };
 373
 374                         gpt6: timer@1001f000 {
 375                                 compatible = "fsl,imx27-gpt", "fsl,imx1-gpt";
 376                                 reg = <0x1001f000 0x1000>;
 377                                 interrupts = <2>;
 378                                 clocks = <&clks 41>, <&clks 61>;
 379                                 clock-names = "ipg", "per";
 380                         };
 381                 };
 382
 383                 aipi@10020000 { /* AIPI2 */
 384                         compatible = "fsl,aipi-bus", "simple-bus";
 385                         #address-cells = <1>;
 386                         #size-cells = <1>;
 387                         reg = <0x10020000 0x20000>;
 388                         ranges;
 389
 390                         fb: fb@10021000 {
 391                                 compatible = "fsl,imx27-fb", "fsl,imx21-fb";
 392                                 interrupts = <61>;
 393                                 reg = <0x10021000 0x1000>;
 394                                 clocks = <&clks 36>, <&clks 65>, <&clks 59>;
 395                                 clock-names = "ipg", "ahb", "per";
 396                                 status = "disabled";
 397                         };
 398
 399                         coda: coda@10023000 {
 400                                 compatible = "fsl,imx27-vpu";
 401                                 reg = <0x10023000 0x0200>;
 402                                 interrupts = <53>;
 403                                 clocks = <&clks 57>, <&clks 66>;
 404                                 clock-names = "per", "ahb";
 405                                 iram = <&iram>;
 406                         };
 407
 408                         sahara2: sahara@10025000 {
 409                                 compatible = "fsl,imx27-sahara";
 410                                 reg = <0x10025000 0x1000>;
 411                                 interrupts = <59>;
 412                                 clocks = <&clks 32>, <&clks 64>;
 413                                 clock-names = "ipg", "ahb";
 414                         };
 415
 416                         clks: ccm@10027000{
 417                                 compatible = "fsl,imx27-ccm";
 418                                 reg = <0x10027000 0x1000>;
 419                                 #clock-cells = <1>;
 420                         };
 421
 422                         iim: iim@10028000 {
 423                                 compatible = "fsl,imx27-iim";
 424                                 reg = <0x10028000 0x1000>;
 425                                 interrupts = <62>;
 426                                 clocks = <&clks 38>;
 427                         };
 428
 429                         fec: ethernet@1002b000 {
 430                                 compatible = "fsl,imx27-fec";
 431                                 reg = <0x1002b000 0x4000>;
 432                                 interrupts = <50>;
 433                                 clocks = <&clks 48>, <&clks 67>;
 434                                 clock-names = "ipg", "ahb";
 435                                 status = "disabled";
 436                         };
 437                 };
 438
 439                 nfc: nand@d8000000 {
 440                         #address-cells = <1>;
 441                         #size-cells = <1>;
 442                         compatible = "fsl,imx27-nand";
 443                         reg = <0xd8000000 0x1000>;
 444                         interrupts = <29>;
 445                         clocks = <&clks 54>;
 446                         status = "disabled";
 447                 };
 448
 449                 weim: weim@d8002000 {
 450                         #address-cells = <2>;
 451                         #size-cells = <1>;
 452                         compatible = "fsl,imx27-weim";
 453                         reg = <0xd8002000 0x1000>;
 454                         clocks = <&clks 0>;
 455                         ranges = <
 456                                 0 0 0xc0000000 0x08000000
 457                                 1 0 0xc8000000 0x08000000
 458                                 2 0 0xd0000000 0x02000000
 459                                 3 0 0xd2000000 0x02000000
 460                                 4 0 0xd4000000 0x02000000
 461                                 5 0 0xd6000000 0x02000000
 462                         >;
 463                         status = "disabled";
 464                 };
 465
 466                 iram: iram@ffff4c00 {
 467                         compatible = "mmio-sram";
 468                         reg = <0xffff4c00 0xb400>;
 469                 };
 470         };
 471 };