2 * AMD CPU Microcode Update Driver for Linux
4 * This driver allows to upgrade microcode on F10h AMD
7 * Copyright (C) 2008-2011 Advanced Micro Devices Inc.
8 * 2013-2016 Borislav Petkov <bp@alien8.de>
10 * Author: Peter Oruba <peter.oruba@amd.com>
13 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
16 * Copyright (C) 2013 Advanced Micro Devices, Inc.
18 * Author: Jacob Shin <jacob.shin@amd.com>
19 * Fixes: Borislav Petkov <bp@suse.de>
21 * Licensed under the terms of the GNU General Public
22 * License version 2. See file COPYING for details.
24 #define pr_fmt(fmt) "microcode: " fmt
26 #include <linux/earlycpio.h>
27 #include <linux/firmware.h>
28 #include <linux/uaccess.h>
29 #include <linux/vmalloc.h>
30 #include <linux/initrd.h>
31 #include <linux/kernel.h>
32 #include <linux/pci.h>
34 #include <asm/microcode_amd.h>
35 #include <asm/microcode.h>
36 #include <asm/processor.h>
37 #include <asm/setup.h>
41 static struct equiv_cpu_entry
*equiv_cpu_table
;
44 * This points to the current valid container of microcode patches which we will
45 * save from the initrd/builtin before jettisoning its contents. @mc is the
46 * microcode patch we found to match.
48 static struct cont_desc
{
49 struct microcode_amd
*mc
;
57 static u32 ucode_new_rev
;
58 static u8 amd_ucode_patch
[PATCH_MAX_SIZE
];
61 * Microcode patch container file is prepended to the initrd in cpio
62 * format. See Documentation/x86/early-microcode.txt
65 ucode_path
[] __maybe_unused
= "kernel/x86/microcode/AuthenticAMD.bin";
67 static u16
find_equiv_id(struct equiv_cpu_entry
*equiv_table
, u32 sig
)
69 for (; equiv_table
&& equiv_table
->installed_cpu
; equiv_table
++) {
70 if (sig
== equiv_table
->installed_cpu
)
71 return equiv_table
->equiv_cpu
;
78 * This scans the ucode blob for the proper container as we can have multiple
79 * containers glued together. Returns the equivalence ID from the equivalence
80 * table or 0 if none found.
81 * Returns the amount of bytes consumed while scanning. @desc contains all the
82 * data we're going to use in later stages of the application.
84 static ssize_t
parse_container(u8
*ucode
, ssize_t size
, struct cont_desc
*desc
)
86 struct equiv_cpu_entry
*eq
;
87 ssize_t orig_size
= size
;
88 u32
*hdr
= (u32
*)ucode
;
92 /* Am I looking at an equivalence table header? */
93 if (hdr
[0] != UCODE_MAGIC
||
94 hdr
[1] != UCODE_EQUIV_CPU_TABLE_TYPE
||
97 return CONTAINER_HDR_SZ
;
102 eq
= (struct equiv_cpu_entry
*)(buf
+ CONTAINER_HDR_SZ
);
104 /* Find the equivalence ID of our CPU in this table: */
105 eq_id
= find_equiv_id(eq
, desc
->cpuid_1_eax
);
107 buf
+= hdr
[2] + CONTAINER_HDR_SZ
;
108 size
-= hdr
[2] + CONTAINER_HDR_SZ
;
111 * Scan through the rest of the container to find where it ends. We do
112 * some basic sanity-checking too.
115 struct microcode_amd
*mc
;
120 if (hdr
[0] != UCODE_UCODE_TYPE
)
123 /* Sanity-check patch size. */
125 if (patch_size
> PATCH_MAX_SIZE
)
128 /* Skip patch section header: */
129 buf
+= SECTION_HDR_SIZE
;
130 size
-= SECTION_HDR_SIZE
;
132 mc
= (struct microcode_amd
*)buf
;
133 if (eq_id
== mc
->hdr
.processor_rev_id
) {
134 desc
->psize
= patch_size
;
143 * If we have found a patch (desc->mc), it means we're looking at the
144 * container which has a patch for this CPU so return 0 to mean, @ucode
145 * already points to the proper container. Otherwise, we return the size
146 * we scanned so that we can advance to the next container in the
152 desc
->size
= orig_size
- size
;
157 return orig_size
- size
;
161 * Scan the ucode blob for the proper container as we can have multiple
162 * containers glued together.
164 static void scan_containers(u8
*ucode
, size_t size
, struct cont_desc
*desc
)
169 ssize_t s
= parse_container(ucode
, rem
, desc
);
178 static int __apply_microcode_amd(struct microcode_amd
*mc
)
182 native_wrmsrl(MSR_AMD64_PATCH_LOADER
, (u64
)(long)&mc
->hdr
.data_code
);
184 /* verify patch application was successful */
185 native_rdmsr(MSR_AMD64_PATCH_LEVEL
, rev
, dummy
);
186 if (rev
!= mc
->hdr
.patch_id
)
193 * Early load occurs before we can vmalloc(). So we look for the microcode
194 * patch container file in initrd, traverse equivalent cpu table, look for a
195 * matching microcode patch, and update, all in initrd memory in place.
196 * When vmalloc() is available for use later -- on 64-bit during first AP load,
197 * and on 32-bit during save_microcode_in_initrd_amd() -- we can call
198 * load_microcode_amd() to save equivalent cpu table and microcode patches in
199 * kernel heap memory.
201 * Returns true if container found (sets @desc), false otherwise.
204 apply_microcode_early_amd(u32 cpuid_1_eax
, void *ucode
, size_t size
,
205 bool save_patch
, struct cont_desc
*ret_desc
)
207 struct cont_desc desc
= { 0 };
208 u8 (*patch
)[PATCH_MAX_SIZE
];
209 struct microcode_amd
*mc
;
210 u32 rev
, dummy
, *new_rev
;
214 new_rev
= (u32
*)__pa_nodebug(&ucode_new_rev
);
215 patch
= (u8 (*)[PATCH_MAX_SIZE
])__pa_nodebug(&amd_ucode_patch
);
217 new_rev
= &ucode_new_rev
;
218 patch
= &amd_ucode_patch
;
221 desc
.cpuid_1_eax
= cpuid_1_eax
;
223 scan_containers(ucode
, size
, &desc
);
231 native_rdmsr(MSR_AMD64_PATCH_LEVEL
, rev
, dummy
);
232 if (rev
>= mc
->hdr
.patch_id
)
235 if (!__apply_microcode_amd(mc
)) {
236 *new_rev
= mc
->hdr
.patch_id
;
240 memcpy(patch
, mc
, min_t(u32
, desc
.psize
, PATCH_MAX_SIZE
));
249 static bool get_builtin_microcode(struct cpio_data
*cp
, unsigned int family
)
252 char fw_name
[36] = "amd-ucode/microcode_amd.bin";
255 snprintf(fw_name
, sizeof(fw_name
),
256 "amd-ucode/microcode_amd_fam%.2xh.bin", family
);
258 return get_builtin_firmware(cp
, fw_name
);
264 void __load_ucode_amd(unsigned int cpuid_1_eax
, struct cpio_data
*ret
)
266 struct ucode_cpu_info
*uci
;
271 if (IS_ENABLED(CONFIG_X86_32
)) {
272 uci
= (struct ucode_cpu_info
*)__pa_nodebug(ucode_cpu_info
);
273 path
= (const char *)__pa_nodebug(ucode_path
);
276 uci
= ucode_cpu_info
;
281 if (!get_builtin_microcode(&cp
, x86_family(cpuid_1_eax
)))
282 cp
= find_microcode_in_initrd(path
, use_pa
);
284 /* Needed in load_microcode_amd() */
285 uci
->cpu_sig
.sig
= cpuid_1_eax
;
290 void __init
load_ucode_amd_bsp(unsigned int cpuid_1_eax
)
292 struct cpio_data cp
= { };
294 __load_ucode_amd(cpuid_1_eax
, &cp
);
296 if (!(cp
.data
&& cp
.size
))
299 apply_microcode_early_amd(cpuid_1_eax
, cp
.data
, cp
.size
, true, NULL
);
302 void load_ucode_amd_ap(unsigned int cpuid_1_eax
)
304 struct equiv_cpu_entry
*eq
;
305 struct microcode_amd
*mc
;
306 struct cont_desc
*desc
;
309 if (IS_ENABLED(CONFIG_X86_32
)) {
310 mc
= (struct microcode_amd
*)__pa_nodebug(amd_ucode_patch
);
311 desc
= (struct cont_desc
*)__pa_nodebug(&cont
);
313 mc
= (struct microcode_amd
*)amd_ucode_patch
;
317 /* First AP hasn't cached it yet, go through the blob. */
319 struct cpio_data cp
= { };
321 if (desc
->size
== -1)
325 __load_ucode_amd(cpuid_1_eax
, &cp
);
326 if (!(cp
.data
&& cp
.size
)) {
328 * Mark it so that other APs do not scan again for no
329 * real reason and slow down boot needlessly.
335 if (!apply_microcode_early_amd(cpuid_1_eax
, cp
.data
, cp
.size
, false, desc
)) {
342 eq
= (struct equiv_cpu_entry
*)(desc
->data
+ CONTAINER_HDR_SZ
);
344 eq_id
= find_equiv_id(eq
, cpuid_1_eax
);
348 if (eq_id
== desc
->eq_id
) {
351 native_rdmsr(MSR_AMD64_PATCH_LEVEL
, rev
, dummy
);
353 mc
= (struct microcode_amd
*)amd_ucode_patch
;
355 if (mc
&& rev
< mc
->hdr
.patch_id
) {
356 if (!__apply_microcode_amd(mc
))
357 ucode_new_rev
= mc
->hdr
.patch_id
;
363 * AP has a different equivalence ID than BSP, looks like
364 * mixed-steppings silicon so go through the ucode blob anew.
370 static enum ucode_state
371 load_microcode_amd(int cpu
, u8 family
, const u8
*data
, size_t size
);
373 int __init
save_microcode_in_initrd_amd(unsigned int cpuid_1_eax
)
375 struct cont_desc desc
= { 0 };
376 enum ucode_state ret
;
379 cp
= find_microcode_in_initrd(ucode_path
, false);
380 if (!(cp
.data
&& cp
.size
))
383 desc
.cpuid_1_eax
= cpuid_1_eax
;
385 scan_containers(cp
.data
, cp
.size
, &desc
);
389 ret
= load_microcode_amd(smp_processor_id(), x86_family(cpuid_1_eax
),
390 desc
.data
, desc
.size
);
397 void reload_ucode_amd(void)
399 struct microcode_amd
*mc
;
402 mc
= (struct microcode_amd
*)amd_ucode_patch
;
406 rdmsr(MSR_AMD64_PATCH_LEVEL
, rev
, dummy
);
408 if (rev
< mc
->hdr
.patch_id
) {
409 if (!__apply_microcode_amd(mc
)) {
410 ucode_new_rev
= mc
->hdr
.patch_id
;
411 pr_info("reload patch_level=0x%08x\n", ucode_new_rev
);
415 static u16
__find_equiv_id(unsigned int cpu
)
417 struct ucode_cpu_info
*uci
= ucode_cpu_info
+ cpu
;
418 return find_equiv_id(equiv_cpu_table
, uci
->cpu_sig
.sig
);
421 static u32
find_cpu_family_by_equiv_cpu(u16 equiv_cpu
)
425 BUG_ON(!equiv_cpu_table
);
427 while (equiv_cpu_table
[i
].equiv_cpu
!= 0) {
428 if (equiv_cpu
== equiv_cpu_table
[i
].equiv_cpu
)
429 return equiv_cpu_table
[i
].installed_cpu
;
436 * a small, trivial cache of per-family ucode patches
438 static struct ucode_patch
*cache_find_patch(u16 equiv_cpu
)
440 struct ucode_patch
*p
;
442 list_for_each_entry(p
, µcode_cache
, plist
)
443 if (p
->equiv_cpu
== equiv_cpu
)
448 static void update_cache(struct ucode_patch
*new_patch
)
450 struct ucode_patch
*p
;
452 list_for_each_entry(p
, µcode_cache
, plist
) {
453 if (p
->equiv_cpu
== new_patch
->equiv_cpu
) {
454 if (p
->patch_id
>= new_patch
->patch_id
)
455 /* we already have the latest patch */
458 list_replace(&p
->plist
, &new_patch
->plist
);
464 /* no patch found, add it */
465 list_add_tail(&new_patch
->plist
, µcode_cache
);
468 static void free_cache(void)
470 struct ucode_patch
*p
, *tmp
;
472 list_for_each_entry_safe(p
, tmp
, µcode_cache
, plist
) {
473 __list_del(p
->plist
.prev
, p
->plist
.next
);
479 static struct ucode_patch
*find_patch(unsigned int cpu
)
483 equiv_id
= __find_equiv_id(cpu
);
487 return cache_find_patch(equiv_id
);
490 static int collect_cpu_info_amd(int cpu
, struct cpu_signature
*csig
)
492 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
493 struct ucode_cpu_info
*uci
= ucode_cpu_info
+ cpu
;
494 struct ucode_patch
*p
;
496 csig
->sig
= cpuid_eax(0x00000001);
497 csig
->rev
= c
->microcode
;
500 * a patch could have been loaded early, set uci->mc so that
501 * mc_bp_resume() can call apply_microcode()
504 if (p
&& (p
->patch_id
== csig
->rev
))
507 pr_info("CPU%d: patch_level=0x%08x\n", cpu
, csig
->rev
);
512 static unsigned int verify_patch_size(u8 family
, u32 patch_size
,
517 #define F1XH_MPB_MAX_SIZE 2048
518 #define F14H_MPB_MAX_SIZE 1824
519 #define F15H_MPB_MAX_SIZE 4096
520 #define F16H_MPB_MAX_SIZE 3458
524 max_size
= F14H_MPB_MAX_SIZE
;
527 max_size
= F15H_MPB_MAX_SIZE
;
530 max_size
= F16H_MPB_MAX_SIZE
;
533 max_size
= F1XH_MPB_MAX_SIZE
;
537 if (patch_size
> min_t(u32
, size
, max_size
)) {
538 pr_err("patch size mismatch\n");
545 static int apply_microcode_amd(int cpu
)
547 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
548 struct microcode_amd
*mc_amd
;
549 struct ucode_cpu_info
*uci
;
550 struct ucode_patch
*p
;
553 BUG_ON(raw_smp_processor_id() != cpu
);
555 uci
= ucode_cpu_info
+ cpu
;
564 rdmsr(MSR_AMD64_PATCH_LEVEL
, rev
, dummy
);
566 /* need to apply patch? */
567 if (rev
>= mc_amd
->hdr
.patch_id
) {
569 uci
->cpu_sig
.rev
= rev
;
573 if (__apply_microcode_amd(mc_amd
)) {
574 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
575 cpu
, mc_amd
->hdr
.patch_id
);
578 pr_info("CPU%d: new patch_level=0x%08x\n", cpu
,
579 mc_amd
->hdr
.patch_id
);
581 uci
->cpu_sig
.rev
= mc_amd
->hdr
.patch_id
;
582 c
->microcode
= mc_amd
->hdr
.patch_id
;
587 static int install_equiv_cpu_table(const u8
*buf
)
589 unsigned int *ibuf
= (unsigned int *)buf
;
590 unsigned int type
= ibuf
[1];
591 unsigned int size
= ibuf
[2];
593 if (type
!= UCODE_EQUIV_CPU_TABLE_TYPE
|| !size
) {
594 pr_err("empty section/"
595 "invalid type field in container file section header\n");
599 equiv_cpu_table
= vmalloc(size
);
600 if (!equiv_cpu_table
) {
601 pr_err("failed to allocate equivalent CPU table\n");
605 memcpy(equiv_cpu_table
, buf
+ CONTAINER_HDR_SZ
, size
);
607 /* add header length */
608 return size
+ CONTAINER_HDR_SZ
;
611 static void free_equiv_cpu_table(void)
613 vfree(equiv_cpu_table
);
614 equiv_cpu_table
= NULL
;
617 static void cleanup(void)
619 free_equiv_cpu_table();
624 * We return the current size even if some of the checks failed so that
625 * we can skip over the next patch. If we return a negative value, we
626 * signal a grave error like a memory allocation has failed and the
627 * driver cannot continue functioning normally. In such cases, we tear
628 * down everything we've used up so far and exit.
630 static int verify_and_add_patch(u8 family
, u8
*fw
, unsigned int leftover
)
632 struct microcode_header_amd
*mc_hdr
;
633 struct ucode_patch
*patch
;
634 unsigned int patch_size
, crnt_size
, ret
;
638 patch_size
= *(u32
*)(fw
+ 4);
639 crnt_size
= patch_size
+ SECTION_HDR_SIZE
;
640 mc_hdr
= (struct microcode_header_amd
*)(fw
+ SECTION_HDR_SIZE
);
641 proc_id
= mc_hdr
->processor_rev_id
;
643 proc_fam
= find_cpu_family_by_equiv_cpu(proc_id
);
645 pr_err("No patch family for equiv ID: 0x%04x\n", proc_id
);
649 /* check if patch is for the current family */
650 proc_fam
= ((proc_fam
>> 8) & 0xf) + ((proc_fam
>> 20) & 0xff);
651 if (proc_fam
!= family
)
654 if (mc_hdr
->nb_dev_id
|| mc_hdr
->sb_dev_id
) {
655 pr_err("Patch-ID 0x%08x: chipset-specific code unsupported.\n",
660 ret
= verify_patch_size(family
, patch_size
, leftover
);
662 pr_err("Patch-ID 0x%08x: size mismatch.\n", mc_hdr
->patch_id
);
666 patch
= kzalloc(sizeof(*patch
), GFP_KERNEL
);
668 pr_err("Patch allocation failure.\n");
672 patch
->data
= kmemdup(fw
+ SECTION_HDR_SIZE
, patch_size
, GFP_KERNEL
);
674 pr_err("Patch data allocation failure.\n");
679 INIT_LIST_HEAD(&patch
->plist
);
680 patch
->patch_id
= mc_hdr
->patch_id
;
681 patch
->equiv_cpu
= proc_id
;
683 pr_debug("%s: Added patch_id: 0x%08x, proc_id: 0x%04x\n",
684 __func__
, patch
->patch_id
, proc_id
);
686 /* ... and add to cache. */
692 static enum ucode_state
__load_microcode_amd(u8 family
, const u8
*data
,
695 enum ucode_state ret
= UCODE_ERROR
;
696 unsigned int leftover
;
701 offset
= install_equiv_cpu_table(data
);
703 pr_err("failed to create equivalent cpu table\n");
707 leftover
= size
- offset
;
709 if (*(u32
*)fw
!= UCODE_UCODE_TYPE
) {
710 pr_err("invalid type field in container file section header\n");
711 free_equiv_cpu_table();
716 crnt_size
= verify_and_add_patch(family
, fw
, leftover
);
721 leftover
-= crnt_size
;
727 static enum ucode_state
728 load_microcode_amd(int cpu
, u8 family
, const u8
*data
, size_t size
)
730 enum ucode_state ret
;
732 /* free old equiv table */
733 free_equiv_cpu_table();
735 ret
= __load_microcode_amd(family
, data
, size
);
741 /* save BSP's matching patch for early load */
742 if (cpu_data(cpu
).cpu_index
== boot_cpu_data
.cpu_index
) {
743 struct ucode_patch
*p
= find_patch(cpu
);
745 memset(amd_ucode_patch
, 0, PATCH_MAX_SIZE
);
746 memcpy(amd_ucode_patch
, p
->data
, min_t(u32
, ksize(p
->data
),
755 * AMD microcode firmware naming convention, up to family 15h they are in
758 * amd-ucode/microcode_amd.bin
760 * This legacy file is always smaller than 2K in size.
762 * Beginning with family 15h, they are in family-specific firmware files:
764 * amd-ucode/microcode_amd_fam15h.bin
765 * amd-ucode/microcode_amd_fam16h.bin
768 * These might be larger than 2K.
770 static enum ucode_state
request_microcode_amd(int cpu
, struct device
*device
,
773 char fw_name
[36] = "amd-ucode/microcode_amd.bin";
774 struct cpuinfo_x86
*c
= &cpu_data(cpu
);
775 enum ucode_state ret
= UCODE_NFOUND
;
776 const struct firmware
*fw
;
778 /* reload ucode container only on the boot cpu */
779 if (!refresh_fw
|| c
->cpu_index
!= boot_cpu_data
.cpu_index
)
783 snprintf(fw_name
, sizeof(fw_name
), "amd-ucode/microcode_amd_fam%.2xh.bin", c
->x86
);
785 if (request_firmware_direct(&fw
, (const char *)fw_name
, device
)) {
786 pr_debug("failed to load file %s\n", fw_name
);
791 if (*(u32
*)fw
->data
!= UCODE_MAGIC
) {
792 pr_err("invalid magic value (0x%08x)\n", *(u32
*)fw
->data
);
796 ret
= load_microcode_amd(cpu
, c
->x86
, fw
->data
, fw
->size
);
799 release_firmware(fw
);
805 static enum ucode_state
806 request_microcode_user(int cpu
, const void __user
*buf
, size_t size
)
811 static void microcode_fini_cpu_amd(int cpu
)
813 struct ucode_cpu_info
*uci
= ucode_cpu_info
+ cpu
;
818 static struct microcode_ops microcode_amd_ops
= {
819 .request_microcode_user
= request_microcode_user
,
820 .request_microcode_fw
= request_microcode_amd
,
821 .collect_cpu_info
= collect_cpu_info_amd
,
822 .apply_microcode
= apply_microcode_amd
,
823 .microcode_fini_cpu
= microcode_fini_cpu_amd
,
826 struct microcode_ops
* __init
init_amd_microcode(void)
828 struct cpuinfo_x86
*c
= &boot_cpu_data
;
830 if (c
->x86_vendor
!= X86_VENDOR_AMD
|| c
->x86
< 0x10) {
831 pr_warn("AMD CPU family 0x%x not supported\n", c
->x86
);
836 pr_info_once("microcode updated early to new patch_level=0x%08x\n",
839 return µcode_amd_ops
;
842 void __exit
exit_amd_microcode(void)