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CommitLineData
fb1d9738
JB
1/**************************************************************************
2 *
c8261a96 3 * Copyright © 2009-2014 VMware, Inc., Palo Alto, CA., USA
fb1d9738
JB
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
56d1c78d 30
fb1d9738
JB
31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
6abff3c7 34
6abff3c7
JB
35
36/**
37 * Clip @num_rects number of @rects against @clip storing the
38 * results in @out_rects and the number of passed rects in @out_num.
39 */
c8261a96 40void vmw_clip_cliprects(struct drm_clip_rect *rects,
6abff3c7
JB
41 int num_rects,
42 struct vmw_clip_rect clip,
43 SVGASignedRect *out_rects,
44 int *out_num)
45{
46 int i, k;
47
48 for (i = 0, k = 0; i < num_rects; i++) {
49 int x1 = max_t(int, clip.x1, rects[i].x1);
50 int y1 = max_t(int, clip.y1, rects[i].y1);
51 int x2 = min_t(int, clip.x2, rects[i].x2);
52 int y2 = min_t(int, clip.y2, rects[i].y2);
53
54 if (x1 >= x2)
55 continue;
56 if (y1 >= y2)
57 continue;
58
59 out_rects[k].left = x1;
60 out_rects[k].top = y1;
61 out_rects[k].right = x2;
62 out_rects[k].bottom = y2;
63 k++;
64 }
65
66 *out_num = k;
67}
68
c8261a96 69void vmw_du_cleanup(struct vmw_display_unit *du)
fb1d9738
JB
70{
71 if (du->cursor_surface)
72 vmw_surface_unreference(&du->cursor_surface);
73 if (du->cursor_dmabuf)
74 vmw_dmabuf_unreference(&du->cursor_dmabuf);
34ea3d38 75 drm_connector_unregister(&du->connector);
fb1d9738
JB
76 drm_crtc_cleanup(&du->crtc);
77 drm_encoder_cleanup(&du->encoder);
78 drm_connector_cleanup(&du->connector);
79}
80
81/*
82 * Display Unit Cursor functions
83 */
84
85int vmw_cursor_update_image(struct vmw_private *dev_priv,
86 u32 *image, u32 width, u32 height,
87 u32 hotspotX, u32 hotspotY)
88{
89 struct {
90 u32 cmd;
91 SVGAFifoCmdDefineAlphaCursor cursor;
92 } *cmd;
93 u32 image_size = width * height * 4;
94 u32 cmd_size = sizeof(*cmd) + image_size;
95
96 if (!image)
97 return -EINVAL;
98
99 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
100 if (unlikely(cmd == NULL)) {
101 DRM_ERROR("Fifo reserve failed.\n");
102 return -ENOMEM;
103 }
104
105 memset(cmd, 0, sizeof(*cmd));
106
107 memcpy(&cmd[1], image, image_size);
108
109 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
110 cmd->cursor.id = cpu_to_le32(0);
111 cmd->cursor.width = cpu_to_le32(width);
112 cmd->cursor.height = cpu_to_le32(height);
113 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
114 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
115
116 vmw_fifo_commit(dev_priv, cmd_size);
117
118 return 0;
119}
120
6a91d97e
JB
121int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
122 struct vmw_dma_buffer *dmabuf,
123 u32 width, u32 height,
124 u32 hotspotX, u32 hotspotY)
125{
126 struct ttm_bo_kmap_obj map;
127 unsigned long kmap_offset;
128 unsigned long kmap_num;
129 void *virtual;
130 bool dummy;
131 int ret;
132
133 kmap_offset = 0;
134 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
135
ee3939e0 136 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL);
6a91d97e
JB
137 if (unlikely(ret != 0)) {
138 DRM_ERROR("reserve failed\n");
139 return -EINVAL;
140 }
141
142 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
143 if (unlikely(ret != 0))
144 goto err_unreserve;
145
146 virtual = ttm_kmap_obj_virtual(&map, &dummy);
147 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
148 hotspotX, hotspotY);
149
150 ttm_bo_kunmap(&map);
151err_unreserve:
152 ttm_bo_unreserve(&dmabuf->base);
153
154 return ret;
155}
156
157
fb1d9738
JB
158void vmw_cursor_update_position(struct vmw_private *dev_priv,
159 bool show, int x, int y)
160{
161 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
162 uint32_t count;
163
164 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
165 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
166 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
167 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
168 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
169}
170
171int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
172 uint32_t handle, uint32_t width, uint32_t height)
173{
174 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
fb1d9738
JB
175 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
176 struct vmw_surface *surface = NULL;
177 struct vmw_dma_buffer *dmabuf = NULL;
178 int ret;
179
bfb89928
DV
180 /*
181 * FIXME: Unclear whether there's any global state touched by the
182 * cursor_set function, especially vmw_cursor_update_position looks
183 * suspicious. For now take the easy route and reacquire all locks. We
184 * can do this since the caller in the drm core doesn't check anything
185 * which is protected by any looks.
186 */
21e88620 187 drm_modeset_unlock_crtc(crtc);
bfb89928
DV
188 drm_modeset_lock_all(dev_priv->dev);
189
baa91d64 190 /* A lot of the code assumes this */
bfb89928
DV
191 if (handle && (width != 64 || height != 64)) {
192 ret = -EINVAL;
193 goto out;
194 }
baa91d64 195
fb1d9738 196 if (handle) {
a5d0f576
VS
197 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
198
e7ac9211
JB
199 ret = vmw_user_lookup_handle(dev_priv, tfile,
200 handle, &surface, &dmabuf);
201 if (ret) {
202 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
bfb89928
DV
203 ret = -EINVAL;
204 goto out;
fb1d9738
JB
205 }
206 }
207
e7ac9211
JB
208 /* need to do this before taking down old image */
209 if (surface && !surface->snooper.image) {
210 DRM_ERROR("surface not suitable for cursor\n");
211 vmw_surface_unreference(&surface);
bfb89928
DV
212 ret = -EINVAL;
213 goto out;
e7ac9211
JB
214 }
215
fb1d9738
JB
216 /* takedown old cursor */
217 if (du->cursor_surface) {
218 du->cursor_surface->snooper.crtc = NULL;
219 vmw_surface_unreference(&du->cursor_surface);
220 }
221 if (du->cursor_dmabuf)
222 vmw_dmabuf_unreference(&du->cursor_dmabuf);
223
224 /* setup new image */
225 if (surface) {
226 /* vmw_user_surface_lookup takes one reference */
227 du->cursor_surface = surface;
228
229 du->cursor_surface->snooper.crtc = crtc;
230 du->cursor_age = du->cursor_surface->snooper.age;
231 vmw_cursor_update_image(dev_priv, surface->snooper.image,
232 64, 64, du->hotspot_x, du->hotspot_y);
233 } else if (dmabuf) {
fb1d9738
JB
234 /* vmw_user_surface_lookup takes one reference */
235 du->cursor_dmabuf = dmabuf;
236
6a91d97e
JB
237 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
238 du->hotspot_x, du->hotspot_y);
fb1d9738
JB
239 } else {
240 vmw_cursor_update_position(dev_priv, false, 0, 0);
bfb89928
DV
241 ret = 0;
242 goto out;
fb1d9738
JB
243 }
244
da7653d6
TH
245 vmw_cursor_update_position(dev_priv, true,
246 du->cursor_x + du->hotspot_x,
247 du->cursor_y + du->hotspot_y);
fb1d9738 248
bfb89928
DV
249 ret = 0;
250out:
251 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 252 drm_modeset_lock_crtc(crtc, crtc->cursor);
bfb89928
DV
253
254 return ret;
fb1d9738
JB
255}
256
257int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
258{
259 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
260 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
261 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
262
263 du->cursor_x = x + crtc->x;
264 du->cursor_y = y + crtc->y;
265
dac35663
DV
266 /*
267 * FIXME: Unclear whether there's any global state touched by the
268 * cursor_set function, especially vmw_cursor_update_position looks
269 * suspicious. For now take the easy route and reacquire all locks. We
270 * can do this since the caller in the drm core doesn't check anything
271 * which is protected by any looks.
272 */
21e88620 273 drm_modeset_unlock_crtc(crtc);
dac35663
DV
274 drm_modeset_lock_all(dev_priv->dev);
275
fb1d9738 276 vmw_cursor_update_position(dev_priv, shown,
da7653d6
TH
277 du->cursor_x + du->hotspot_x,
278 du->cursor_y + du->hotspot_y);
fb1d9738 279
dac35663 280 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 281 drm_modeset_lock_crtc(crtc, crtc->cursor);
dac35663 282
fb1d9738
JB
283 return 0;
284}
285
286void vmw_kms_cursor_snoop(struct vmw_surface *srf,
287 struct ttm_object_file *tfile,
288 struct ttm_buffer_object *bo,
289 SVGA3dCmdHeader *header)
290{
291 struct ttm_bo_kmap_obj map;
292 unsigned long kmap_offset;
293 unsigned long kmap_num;
294 SVGA3dCopyBox *box;
295 unsigned box_count;
296 void *virtual;
297 bool dummy;
298 struct vmw_dma_cmd {
299 SVGA3dCmdHeader header;
300 SVGA3dCmdSurfaceDMA dma;
301 } *cmd;
2ac86371 302 int i, ret;
fb1d9738
JB
303
304 cmd = container_of(header, struct vmw_dma_cmd, header);
305
306 /* No snooper installed */
307 if (!srf->snooper.image)
308 return;
309
310 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
311 DRM_ERROR("face and mipmap for cursors should never != 0\n");
312 return;
313 }
314
315 if (cmd->header.size < 64) {
316 DRM_ERROR("at least one full copy box must be given\n");
317 return;
318 }
319
320 box = (SVGA3dCopyBox *)&cmd[1];
321 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
322 sizeof(SVGA3dCopyBox);
323
2ac86371 324 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
fb1d9738
JB
325 box->x != 0 || box->y != 0 || box->z != 0 ||
326 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
2ac86371 327 box->d != 1 || box_count != 1) {
fb1d9738 328 /* TODO handle none page aligned offsets */
2ac86371
JB
329 /* TODO handle more dst & src != 0 */
330 /* TODO handle more then one copy */
331 DRM_ERROR("Cant snoop dma request for cursor!\n");
332 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
333 box->srcx, box->srcy, box->srcz,
334 box->x, box->y, box->z,
335 box->w, box->h, box->d, box_count,
336 cmd->dma.guest.ptr.offset);
fb1d9738
JB
337 return;
338 }
339
340 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
341 kmap_num = (64*64*4) >> PAGE_SHIFT;
342
ee3939e0 343 ret = ttm_bo_reserve(bo, true, false, false, NULL);
fb1d9738
JB
344 if (unlikely(ret != 0)) {
345 DRM_ERROR("reserve failed\n");
346 return;
347 }
348
349 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
350 if (unlikely(ret != 0))
351 goto err_unreserve;
352
353 virtual = ttm_kmap_obj_virtual(&map, &dummy);
354
2ac86371
JB
355 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
356 memcpy(srf->snooper.image, virtual, 64*64*4);
357 } else {
358 /* Image is unsigned pointer. */
359 for (i = 0; i < box->h; i++)
360 memcpy(srf->snooper.image + i * 64,
361 virtual + i * cmd->dma.guest.pitch,
362 box->w * 4);
363 }
364
fb1d9738
JB
365 srf->snooper.age++;
366
fb1d9738
JB
367 ttm_bo_kunmap(&map);
368err_unreserve:
369 ttm_bo_unreserve(bo);
370}
371
372void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
373{
374 struct drm_device *dev = dev_priv->dev;
375 struct vmw_display_unit *du;
376 struct drm_crtc *crtc;
377
378 mutex_lock(&dev->mode_config.mutex);
379
380 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
381 du = vmw_crtc_to_du(crtc);
382 if (!du->cursor_surface ||
383 du->cursor_age == du->cursor_surface->snooper.age)
384 continue;
385
386 du->cursor_age = du->cursor_surface->snooper.age;
387 vmw_cursor_update_image(dev_priv,
388 du->cursor_surface->snooper.image,
389 64, 64, du->hotspot_x, du->hotspot_y);
390 }
391
392 mutex_unlock(&dev->mode_config.mutex);
393}
394
395/*
396 * Generic framebuffer code
397 */
398
fb1d9738
JB
399/*
400 * Surface framebuffer code
401 */
402
847c5964 403static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
fb1d9738 404{
3a939a5e 405 struct vmw_framebuffer_surface *vfbs =
fb1d9738 406 vmw_framebuffer_to_vfbs(framebuffer);
3a939a5e
TH
407 struct vmw_master *vmaster = vmw_master(vfbs->master);
408
409
410 mutex_lock(&vmaster->fb_surf_mutex);
411 list_del(&vfbs->head);
412 mutex_unlock(&vmaster->fb_surf_mutex);
fb1d9738 413
3a939a5e 414 drm_master_put(&vfbs->master);
fb1d9738 415 drm_framebuffer_cleanup(framebuffer);
3a939a5e 416 vmw_surface_unreference(&vfbs->surface);
90ff18bc 417 ttm_base_object_unref(&vfbs->base.user_obj);
fb1d9738 418
3a939a5e 419 kfree(vfbs);
fb1d9738
JB
420}
421
847c5964 422static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
02b00162 423 struct drm_file *file_priv,
fb1d9738
JB
424 unsigned flags, unsigned color,
425 struct drm_clip_rect *clips,
426 unsigned num_clips)
427{
428 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
429 struct vmw_framebuffer_surface *vfbs =
430 vmw_framebuffer_to_vfbs(framebuffer);
fb1d9738 431 struct drm_clip_rect norect;
5deb65cf 432 int ret, inc = 1;
fb1d9738 433
3a939a5e
TH
434 if (unlikely(vfbs->master != file_priv->master))
435 return -EINVAL;
436
c8261a96
SY
437 /* Legacy Display Unit does not support 3D */
438 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
439 return -EINVAL;
440
73e9efd4
VS
441 drm_modeset_lock_all(dev_priv->dev);
442
294adf7d 443 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
444 if (unlikely(ret != 0)) {
445 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 446 return ret;
73e9efd4 447 }
3a939a5e 448
fb1d9738
JB
449 if (!num_clips) {
450 num_clips = 1;
451 clips = &norect;
452 norect.x1 = norect.y1 = 0;
453 norect.x2 = framebuffer->width;
454 norect.y2 = framebuffer->height;
455 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
456 num_clips /= 2;
457 inc = 2; /* skip source rects */
458 }
459
c8261a96
SY
460 if (dev_priv->active_display_unit == vmw_du_screen_object)
461 ret = vmw_kms_sou_do_surface_dirty(dev_priv, file_priv,
462 &vfbs->base,
463 flags, color,
464 clips, num_clips,
465 inc, NULL);
35c05125
SY
466 else
467 ret = vmw_kms_stdu_do_surface_dirty(dev_priv, file_priv,
468 &vfbs->base,
469 clips, num_clips,
470 inc);
fb1d9738 471
3eab3d9e 472 vmw_fifo_flush(dev_priv, false);
294adf7d 473 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
474
475 drm_modeset_unlock_all(dev_priv->dev);
476
fb1d9738
JB
477 return 0;
478}
479
480static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
481 .destroy = vmw_framebuffer_surface_destroy,
482 .dirty = vmw_framebuffer_surface_dirty,
fb1d9738
JB
483};
484
d3216a0c 485static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
3a939a5e 486 struct drm_file *file_priv,
d3216a0c
TH
487 struct vmw_surface *surface,
488 struct vmw_framebuffer **out,
489 const struct drm_mode_fb_cmd
490 *mode_cmd)
fb1d9738
JB
491
492{
493 struct drm_device *dev = dev_priv->dev;
494 struct vmw_framebuffer_surface *vfbs;
d3216a0c 495 enum SVGA3dSurfaceFormat format;
3a939a5e 496 struct vmw_master *vmaster = vmw_master(file_priv->master);
fb1d9738
JB
497 int ret;
498
c8261a96
SY
499 /* 3D is only supported on HWv8 and newer hosts */
500 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
501 return -ENOSYS;
502
d3216a0c
TH
503 /*
504 * Sanity checks.
505 */
506
e7ac9211
JB
507 /* Surface must be marked as a scanout. */
508 if (unlikely(!surface->scanout))
509 return -EINVAL;
510
d3216a0c
TH
511 if (unlikely(surface->mip_levels[0] != 1 ||
512 surface->num_sizes != 1 ||
b360a3ce
TH
513 surface->base_size.width < mode_cmd->width ||
514 surface->base_size.height < mode_cmd->height ||
515 surface->base_size.depth != 1)) {
d3216a0c
TH
516 DRM_ERROR("Incompatible surface dimensions "
517 "for requested mode.\n");
518 return -EINVAL;
519 }
520
521 switch (mode_cmd->depth) {
522 case 32:
523 format = SVGA3D_A8R8G8B8;
524 break;
525 case 24:
526 format = SVGA3D_X8R8G8B8;
527 break;
528 case 16:
529 format = SVGA3D_R5G6B5;
530 break;
531 case 15:
532 format = SVGA3D_A1R5G5B5;
533 break;
534 default:
535 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
536 return -EINVAL;
537 }
538
539 if (unlikely(format != surface->format)) {
540 DRM_ERROR("Invalid surface format for requested mode.\n");
541 return -EINVAL;
542 }
543
fb1d9738
JB
544 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
545 if (!vfbs) {
546 ret = -ENOMEM;
547 goto out_err1;
548 }
549
fb1d9738
JB
550 if (!vmw_surface_reference(surface)) {
551 DRM_ERROR("failed to reference surface %p\n", surface);
80f0b5af
DV
552 ret = -EINVAL;
553 goto out_err2;
fb1d9738
JB
554 }
555
556 /* XXX get the first 3 from the surface info */
d3216a0c 557 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 558 vfbs->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
559 vfbs->base.base.depth = mode_cmd->depth;
560 vfbs->base.base.width = mode_cmd->width;
561 vfbs->base.base.height = mode_cmd->height;
fb1d9738 562 vfbs->surface = surface;
90ff18bc 563 vfbs->base.user_handle = mode_cmd->handle;
3a939a5e 564 vfbs->master = drm_master_get(file_priv->master);
3a939a5e
TH
565
566 mutex_lock(&vmaster->fb_surf_mutex);
3a939a5e
TH
567 list_add_tail(&vfbs->head, &vmaster->fb_surf);
568 mutex_unlock(&vmaster->fb_surf_mutex);
569
fb1d9738
JB
570 *out = &vfbs->base;
571
80f0b5af
DV
572 ret = drm_framebuffer_init(dev, &vfbs->base.base,
573 &vmw_framebuffer_surface_funcs);
574 if (ret)
575 goto out_err3;
576
fb1d9738
JB
577 return 0;
578
579out_err3:
80f0b5af 580 vmw_surface_unreference(&surface);
fb1d9738
JB
581out_err2:
582 kfree(vfbs);
583out_err1:
584 return ret;
585}
586
587/*
588 * Dmabuf framebuffer code
589 */
590
847c5964 591static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
fb1d9738
JB
592{
593 struct vmw_framebuffer_dmabuf *vfbd =
594 vmw_framebuffer_to_vfbd(framebuffer);
595
596 drm_framebuffer_cleanup(framebuffer);
597 vmw_dmabuf_unreference(&vfbd->buffer);
90ff18bc 598 ttm_base_object_unref(&vfbd->base.user_obj);
fb1d9738
JB
599
600 kfree(vfbd);
601}
602
847c5964 603static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
02b00162 604 struct drm_file *file_priv,
fb1d9738
JB
605 unsigned flags, unsigned color,
606 struct drm_clip_rect *clips,
607 unsigned num_clips)
608{
609 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
5deb65cf
JB
610 struct vmw_framebuffer_dmabuf *vfbd =
611 vmw_framebuffer_to_vfbd(framebuffer);
fb1d9738 612 struct drm_clip_rect norect;
5deb65cf 613 int ret, increment = 1;
fb1d9738 614
73e9efd4
VS
615 drm_modeset_lock_all(dev_priv->dev);
616
294adf7d 617 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
618 if (unlikely(ret != 0)) {
619 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 620 return ret;
73e9efd4 621 }
3a939a5e 622
df1c93ba 623 if (!num_clips) {
fb1d9738
JB
624 num_clips = 1;
625 clips = &norect;
626 norect.x1 = norect.y1 = 0;
627 norect.x2 = framebuffer->width;
628 norect.y2 = framebuffer->height;
629 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
630 num_clips /= 2;
631 increment = 2;
632 }
633
56d1c78d 634 if (dev_priv->ldu_priv) {
c8261a96
SY
635 ret = vmw_kms_ldu_do_dmabuf_dirty(dev_priv, &vfbd->base,
636 flags, color,
637 clips, num_clips, increment);
638 } else if (dev_priv->active_display_unit == vmw_du_screen_object) {
639 ret = vmw_kms_sou_do_dmabuf_dirty(file_priv, dev_priv,
640 &vfbd->base,
641 flags, color,
642 clips, num_clips, increment,
643 NULL);
35c05125
SY
644 } else {
645 ret = vmw_kms_stdu_do_surface_dirty(dev_priv, file_priv,
646 &vfbd->base,
647 clips, num_clips,
648 increment);
56d1c78d 649 }
fb1d9738 650
3eab3d9e 651 vmw_fifo_flush(dev_priv, false);
294adf7d 652 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
653
654 drm_modeset_unlock_all(dev_priv->dev);
655
5deb65cf 656 return ret;
fb1d9738
JB
657}
658
659static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
660 .destroy = vmw_framebuffer_dmabuf_destroy,
661 .dirty = vmw_framebuffer_dmabuf_dirty,
fb1d9738
JB
662};
663
497a3ff9
JB
664/**
665 * Pin the dmabuffer to the start of vram.
666 */
fb1d9738
JB
667static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
668{
669 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
670 struct vmw_framebuffer_dmabuf *vfbd =
671 vmw_framebuffer_to_vfbd(&vfb->base);
672 int ret;
673
c8261a96
SY
674 /* This code should only be used with Legacy Display Unit */
675 BUG_ON(dev_priv->active_display_unit != vmw_du_legacy);
d7e1958d 676
fb1d9738
JB
677 vmw_overlay_pause_all(dev_priv);
678
d991ef03 679 ret = vmw_dmabuf_to_start_of_vram(dev_priv, vfbd->buffer, true, false);
fb1d9738 680
fb1d9738
JB
681 vmw_overlay_resume_all(dev_priv);
682
316ab13a
JB
683 WARN_ON(ret != 0);
684
fb1d9738
JB
685 return 0;
686}
687
688static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
689{
690 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
691 struct vmw_framebuffer_dmabuf *vfbd =
692 vmw_framebuffer_to_vfbd(&vfb->base);
693
694 if (!vfbd->buffer) {
695 WARN_ON(!vfbd->buffer);
696 return 0;
697 }
698
d991ef03 699 return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
fb1d9738
JB
700}
701
d3216a0c
TH
702static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
703 struct vmw_dma_buffer *dmabuf,
704 struct vmw_framebuffer **out,
705 const struct drm_mode_fb_cmd
706 *mode_cmd)
fb1d9738
JB
707
708{
709 struct drm_device *dev = dev_priv->dev;
710 struct vmw_framebuffer_dmabuf *vfbd;
d3216a0c 711 unsigned int requested_size;
fb1d9738
JB
712 int ret;
713
d3216a0c
TH
714 requested_size = mode_cmd->height * mode_cmd->pitch;
715 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
716 DRM_ERROR("Screen buffer object size is too small "
717 "for requested mode.\n");
718 return -EINVAL;
719 }
720
c337ada7 721 /* Limited framebuffer color depth support for screen objects */
c8261a96 722 if (dev_priv->active_display_unit == vmw_du_screen_object) {
c337ada7
JB
723 switch (mode_cmd->depth) {
724 case 32:
725 case 24:
726 /* Only support 32 bpp for 32 and 24 depth fbs */
727 if (mode_cmd->bpp == 32)
728 break;
729
730 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
731 mode_cmd->depth, mode_cmd->bpp);
732 return -EINVAL;
733 case 16:
734 case 15:
735 /* Only support 16 bpp for 16 and 15 depth fbs */
736 if (mode_cmd->bpp == 16)
737 break;
738
739 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
740 mode_cmd->depth, mode_cmd->bpp);
741 return -EINVAL;
742 default:
743 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
744 return -EINVAL;
745 }
746 }
747
fb1d9738
JB
748 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
749 if (!vfbd) {
750 ret = -ENOMEM;
751 goto out_err1;
752 }
753
fb1d9738
JB
754 if (!vmw_dmabuf_reference(dmabuf)) {
755 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
80f0b5af
DV
756 ret = -EINVAL;
757 goto out_err2;
fb1d9738
JB
758 }
759
d3216a0c 760 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 761 vfbd->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
762 vfbd->base.base.depth = mode_cmd->depth;
763 vfbd->base.base.width = mode_cmd->width;
764 vfbd->base.base.height = mode_cmd->height;
c8261a96 765 if (dev_priv->active_display_unit == vmw_du_legacy) {
56d1c78d
JB
766 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
767 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
768 }
2fcd5a73 769 vfbd->base.dmabuf = true;
fb1d9738 770 vfbd->buffer = dmabuf;
90ff18bc 771 vfbd->base.user_handle = mode_cmd->handle;
fb1d9738
JB
772 *out = &vfbd->base;
773
80f0b5af
DV
774 ret = drm_framebuffer_init(dev, &vfbd->base.base,
775 &vmw_framebuffer_dmabuf_funcs);
776 if (ret)
777 goto out_err3;
778
fb1d9738
JB
779 return 0;
780
781out_err3:
80f0b5af 782 vmw_dmabuf_unreference(&dmabuf);
fb1d9738
JB
783out_err2:
784 kfree(vfbd);
785out_err1:
786 return ret;
787}
788
789/*
790 * Generic Kernel modesetting functions
791 */
792
793static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
794 struct drm_file *file_priv,
308e5bcb 795 struct drm_mode_fb_cmd2 *mode_cmd2)
fb1d9738
JB
796{
797 struct vmw_private *dev_priv = vmw_priv(dev);
798 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
799 struct vmw_framebuffer *vfb = NULL;
800 struct vmw_surface *surface = NULL;
801 struct vmw_dma_buffer *bo = NULL;
90ff18bc 802 struct ttm_base_object *user_obj;
308e5bcb 803 struct drm_mode_fb_cmd mode_cmd;
fb1d9738
JB
804 int ret;
805
308e5bcb
JB
806 mode_cmd.width = mode_cmd2->width;
807 mode_cmd.height = mode_cmd2->height;
808 mode_cmd.pitch = mode_cmd2->pitches[0];
809 mode_cmd.handle = mode_cmd2->handles[0];
248dbc23 810 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
308e5bcb
JB
811 &mode_cmd.bpp);
812
d3216a0c
TH
813 /**
814 * This code should be conditioned on Screen Objects not being used.
815 * If screen objects are used, we can allocate a GMR to hold the
816 * requested framebuffer.
817 */
818
8a783896 819 if (!vmw_kms_validate_mode_vram(dev_priv,
1a464cbb
LT
820 mode_cmd.pitch,
821 mode_cmd.height)) {
c8261a96 822 DRM_ERROR("Requested mode exceed bounding box limit.\n");
d9826409 823 return ERR_PTR(-ENOMEM);
d3216a0c
TH
824 }
825
90ff18bc
TH
826 /*
827 * Take a reference on the user object of the resource
828 * backing the kms fb. This ensures that user-space handle
829 * lookups on that resource will always work as long as
830 * it's registered with a kms framebuffer. This is important,
831 * since vmw_execbuf_process identifies resources in the
832 * command stream using user-space handles.
833 */
834
308e5bcb 835 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
90ff18bc
TH
836 if (unlikely(user_obj == NULL)) {
837 DRM_ERROR("Could not locate requested kms frame buffer.\n");
838 return ERR_PTR(-ENOENT);
839 }
840
d3216a0c
TH
841 /**
842 * End conditioned code.
843 */
844
e7ac9211
JB
845 /* returns either a dmabuf or surface */
846 ret = vmw_user_lookup_handle(dev_priv, tfile,
4cf73129 847 mode_cmd.handle,
e7ac9211 848 &surface, &bo);
fb1d9738 849 if (ret)
e7ac9211
JB
850 goto err_out;
851
852 /* Create the new framebuffer depending one what we got back */
853 if (bo)
854 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
4cf73129 855 &mode_cmd);
e7ac9211
JB
856 else if (surface)
857 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
4cf73129 858 surface, &vfb, &mode_cmd);
e7ac9211
JB
859 else
860 BUG();
861
862err_out:
863 /* vmw_user_lookup_handle takes one ref so does new_fb */
864 if (bo)
865 vmw_dmabuf_unreference(&bo);
866 if (surface)
867 vmw_surface_unreference(&surface);
fb1d9738
JB
868
869 if (ret) {
870 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
90ff18bc 871 ttm_base_object_unref(&user_obj);
cce13ff7 872 return ERR_PTR(ret);
90ff18bc
TH
873 } else
874 vfb->user_obj = user_obj;
fb1d9738
JB
875
876 return &vfb->base;
877}
878
e6ecefaa 879static const struct drm_mode_config_funcs vmw_kms_funcs = {
fb1d9738 880 .fb_create = vmw_kms_fb_create,
fb1d9738
JB
881};
882
c8261a96 883int vmw_kms_generic_present(struct vmw_private *dev_priv,
2fcd5a73
JB
884 struct drm_file *file_priv,
885 struct vmw_framebuffer *vfb,
886 struct vmw_surface *surface,
887 uint32_t sid,
888 int32_t destX, int32_t destY,
889 struct drm_vmw_rect *clips,
890 uint32_t num_clips)
891{
c6ca8391 892 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
6abff3c7 893 struct drm_clip_rect *tmp;
c6ca8391 894 struct drm_crtc *crtc;
2fcd5a73 895 size_t fifo_size;
c6ca8391
JB
896 int i, k, num_units;
897 int ret = 0; /* silence warning */
203dc220 898 int left, right, top, bottom;
2fcd5a73
JB
899
900 struct {
901 SVGA3dCmdHeader header;
902 SVGA3dCmdBlitSurfaceToScreen body;
903 } *cmd;
904 SVGASignedRect *blits;
905
c6ca8391
JB
906 num_units = 0;
907 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
f4510a27 908 if (crtc->primary->fb != &vfb->base)
c6ca8391
JB
909 continue;
910 units[num_units++] = vmw_crtc_to_du(crtc);
911 }
912
2fcd5a73
JB
913 BUG_ON(surface == NULL);
914 BUG_ON(!clips || !num_clips);
915
6abff3c7
JB
916 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
917 if (unlikely(tmp == NULL)) {
918 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
919 return -ENOMEM;
920 }
921
2fcd5a73
JB
922 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
923 cmd = kmalloc(fifo_size, GFP_KERNEL);
924 if (unlikely(cmd == NULL)) {
925 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
6abff3c7
JB
926 ret = -ENOMEM;
927 goto out_free_tmp;
2fcd5a73
JB
928 }
929
203dc220
JB
930 left = clips->x;
931 right = clips->x + clips->w;
932 top = clips->y;
933 bottom = clips->y + clips->h;
934
935 for (i = 1; i < num_clips; i++) {
936 left = min_t(int, left, (int)clips[i].x);
937 right = max_t(int, right, (int)clips[i].x + clips[i].w);
938 top = min_t(int, top, (int)clips[i].y);
939 bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
940 }
941
c6ca8391 942 /* only need to do this once */
2fcd5a73 943 memset(cmd, 0, fifo_size);
2fcd5a73 944 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
6abff3c7
JB
945
946 blits = (SVGASignedRect *)&cmd[1];
2fcd5a73 947
203dc220
JB
948 cmd->body.srcRect.left = left;
949 cmd->body.srcRect.right = right;
950 cmd->body.srcRect.top = top;
951 cmd->body.srcRect.bottom = bottom;
2fcd5a73 952
2fcd5a73 953 for (i = 0; i < num_clips; i++) {
6abff3c7
JB
954 tmp[i].x1 = clips[i].x - left;
955 tmp[i].x2 = clips[i].x + clips[i].w - left;
956 tmp[i].y1 = clips[i].y - top;
957 tmp[i].y2 = clips[i].y + clips[i].h - top;
2fcd5a73
JB
958 }
959
c6ca8391
JB
960 for (k = 0; k < num_units; k++) {
961 struct vmw_display_unit *unit = units[k];
6abff3c7
JB
962 struct vmw_clip_rect clip;
963 int num;
964
965 clip.x1 = left + destX - unit->crtc.x;
966 clip.y1 = top + destY - unit->crtc.y;
967 clip.x2 = right + destX - unit->crtc.x;
968 clip.y2 = bottom + destY - unit->crtc.y;
c6ca8391
JB
969
970 /* skip any crtcs that misses the clip region */
6abff3c7
JB
971 if (clip.x1 >= unit->crtc.mode.hdisplay ||
972 clip.y1 >= unit->crtc.mode.vdisplay ||
973 clip.x2 <= 0 || clip.y2 <= 0)
c6ca8391
JB
974 continue;
975
6abff3c7
JB
976 /*
977 * In order for the clip rects to be correctly scaled
978 * the src and dest rects needs to be the same size.
979 */
980 cmd->body.destRect.left = clip.x1;
981 cmd->body.destRect.right = clip.x2;
982 cmd->body.destRect.top = clip.y1;
983 cmd->body.destRect.bottom = clip.y2;
984
985 /* create a clip rect of the crtc in dest coords */
986 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
987 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
988 clip.x1 = 0 - clip.x1;
989 clip.y1 = 0 - clip.y1;
990
c6ca8391
JB
991 /* need to reset sid as it is changed by execbuf */
992 cmd->body.srcImage.sid = sid;
c6ca8391
JB
993 cmd->body.destScreenId = unit->unit;
994
6abff3c7
JB
995 /* clip and write blits to cmd stream */
996 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
c6ca8391 997
6abff3c7
JB
998 /* if no cliprects hit skip this */
999 if (num == 0)
1000 continue;
c6ca8391 1001
6abff3c7
JB
1002 /* recalculate package length */
1003 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
1004 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
c6ca8391 1005 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
c9146cd9 1006 fifo_size, 0, 0, NULL, NULL);
c6ca8391
JB
1007
1008 if (unlikely(ret != 0))
1009 break;
1010 }
2fcd5a73
JB
1011
1012 kfree(cmd);
6abff3c7
JB
1013out_free_tmp:
1014 kfree(tmp);
2fcd5a73
JB
1015
1016 return ret;
1017}
1018
c8261a96
SY
1019int vmw_kms_present(struct vmw_private *dev_priv,
1020 struct drm_file *file_priv,
1021 struct vmw_framebuffer *vfb,
1022 struct vmw_surface *surface,
1023 uint32_t sid,
1024 int32_t destX, int32_t destY,
1025 struct drm_vmw_rect *clips,
1026 uint32_t num_clips)
1027{
35c05125
SY
1028 int ret;
1029
1030 if (dev_priv->active_display_unit == vmw_du_screen_target)
1031 ret = vmw_kms_stdu_present(dev_priv, file_priv, vfb, sid,
1032 destX, destY, clips, num_clips);
1033 else
1034 ret = vmw_kms_generic_present(dev_priv, file_priv, vfb,
1035 surface, sid, destX, destY,
1036 clips, num_clips);
1037 if (ret)
1038 return ret;
1039
1040 vmw_fifo_flush(dev_priv, false);
1041
1042 return 0;
c8261a96
SY
1043}
1044
2fcd5a73
JB
1045int vmw_kms_readback(struct vmw_private *dev_priv,
1046 struct drm_file *file_priv,
1047 struct vmw_framebuffer *vfb,
1048 struct drm_vmw_fence_rep __user *user_fence_rep,
1049 struct drm_vmw_rect *clips,
1050 uint32_t num_clips)
1051{
1052 struct vmw_framebuffer_dmabuf *vfbd =
1053 vmw_framebuffer_to_vfbd(&vfb->base);
1054 struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1055 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1056 struct drm_crtc *crtc;
1057 size_t fifo_size;
1058 int i, k, ret, num_units, blits_pos;
1059
1060 struct {
1061 uint32_t header;
1062 SVGAFifoCmdDefineGMRFB body;
1063 } *cmd;
1064 struct {
1065 uint32_t header;
1066 SVGAFifoCmdBlitScreenToGMRFB body;
1067 } *blits;
1068
1069 num_units = 0;
1070 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
f4510a27 1071 if (crtc->primary->fb != &vfb->base)
2fcd5a73
JB
1072 continue;
1073 units[num_units++] = vmw_crtc_to_du(crtc);
1074 }
1075
1076 BUG_ON(dmabuf == NULL);
1077 BUG_ON(!clips || !num_clips);
1078
1079 /* take a safe guess at fifo size */
1080 fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1081 cmd = kmalloc(fifo_size, GFP_KERNEL);
1082 if (unlikely(cmd == NULL)) {
1083 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1084 return -ENOMEM;
1085 }
1086
1087 memset(cmd, 0, fifo_size);
1088 cmd->header = SVGA_CMD_DEFINE_GMRFB;
1089 cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1090 cmd->body.format.colorDepth = vfb->base.depth;
1091 cmd->body.format.reserved = 0;
01f2c773 1092 cmd->body.bytesPerLine = vfb->base.pitches[0];
90ff18bc 1093 cmd->body.ptr.gmrId = vfb->user_handle;
2fcd5a73
JB
1094 cmd->body.ptr.offset = 0;
1095
1096 blits = (void *)&cmd[1];
1097 blits_pos = 0;
1098 for (i = 0; i < num_units; i++) {
1099 struct drm_vmw_rect *c = clips;
1100 for (k = 0; k < num_clips; k++, c++) {
1101 /* transform clip coords to crtc origin based coords */
1102 int clip_x1 = c->x - units[i]->crtc.x;
1103 int clip_x2 = c->x - units[i]->crtc.x + c->w;
1104 int clip_y1 = c->y - units[i]->crtc.y;
1105 int clip_y2 = c->y - units[i]->crtc.y + c->h;
1106 int dest_x = c->x;
1107 int dest_y = c->y;
1108
1109 /* compensate for clipping, we negate
1110 * a negative number and add that.
1111 */
1112 if (clip_x1 < 0)
1113 dest_x += -clip_x1;
1114 if (clip_y1 < 0)
1115 dest_y += -clip_y1;
1116
1117 /* clip */
1118 clip_x1 = max(clip_x1, 0);
1119 clip_y1 = max(clip_y1, 0);
1120 clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1121 clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1122
1123 /* and cull any rects that misses the crtc */
1124 if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1125 clip_y1 >= units[i]->crtc.mode.vdisplay ||
1126 clip_x2 <= 0 || clip_y2 <= 0)
1127 continue;
1128
1129 blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1130 blits[blits_pos].body.srcScreenId = units[i]->unit;
1131 blits[blits_pos].body.destOrigin.x = dest_x;
1132 blits[blits_pos].body.destOrigin.y = dest_y;
1133
1134 blits[blits_pos].body.srcRect.left = clip_x1;
1135 blits[blits_pos].body.srcRect.top = clip_y1;
1136 blits[blits_pos].body.srcRect.right = clip_x2;
1137 blits[blits_pos].body.srcRect.bottom = clip_y2;
1138 blits_pos++;
1139 }
1140 }
1141 /* reset size here and use calculated exact size from loops */
1142 fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1143
1144 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
c9146cd9 1145 0, 0, user_fence_rep, NULL);
2fcd5a73
JB
1146
1147 kfree(cmd);
1148
1149 return ret;
1150}
1151
fb1d9738
JB
1152int vmw_kms_init(struct vmw_private *dev_priv)
1153{
1154 struct drm_device *dev = dev_priv->dev;
1155 int ret;
1156
1157 drm_mode_config_init(dev);
1158 dev->mode_config.funcs = &vmw_kms_funcs;
3bef3572
JB
1159 dev->mode_config.min_width = 1;
1160 dev->mode_config.min_height = 1;
7e71f8a5
JB
1161 /* assumed largest fb size */
1162 dev->mode_config.max_width = 8192;
1163 dev->mode_config.max_height = 8192;
fb1d9738 1164
35c05125
SY
1165 ret = vmw_kms_stdu_init_display(dev_priv);
1166 if (ret) {
1167 ret = vmw_kms_sou_init_display(dev_priv);
1168 if (ret) /* Fallback */
1169 ret = vmw_kms_ldu_init_display(dev_priv);
1170 }
fb1d9738 1171
c8261a96 1172 return ret;
fb1d9738
JB
1173}
1174
1175int vmw_kms_close(struct vmw_private *dev_priv)
1176{
c8261a96
SY
1177 int ret;
1178
fb1d9738
JB
1179 /*
1180 * Docs says we should take the lock before calling this function
1181 * but since it destroys encoders and our destructor calls
1182 * drm_encoder_cleanup which takes the lock we deadlock.
1183 */
1184 drm_mode_config_cleanup(dev_priv->dev);
c8261a96
SY
1185 if (dev_priv->active_display_unit == vmw_du_screen_object)
1186 ret = vmw_kms_sou_close_display(dev_priv);
35c05125
SY
1187 else if (dev_priv->active_display_unit == vmw_du_screen_target)
1188 ret = vmw_kms_stdu_close_display(dev_priv);
c0d18316 1189 else
c8261a96
SY
1190 ret = vmw_kms_ldu_close_display(dev_priv);
1191
1192 return ret;
fb1d9738
JB
1193}
1194
1195int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1196 struct drm_file *file_priv)
1197{
1198 struct drm_vmw_cursor_bypass_arg *arg = data;
1199 struct vmw_display_unit *du;
fb1d9738
JB
1200 struct drm_crtc *crtc;
1201 int ret = 0;
1202
1203
1204 mutex_lock(&dev->mode_config.mutex);
1205 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1206
1207 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1208 du = vmw_crtc_to_du(crtc);
1209 du->hotspot_x = arg->xhot;
1210 du->hotspot_y = arg->yhot;
1211 }
1212
1213 mutex_unlock(&dev->mode_config.mutex);
1214 return 0;
1215 }
1216
a4cd5d68
RC
1217 crtc = drm_crtc_find(dev, arg->crtc_id);
1218 if (!crtc) {
4ae87ff0 1219 ret = -ENOENT;
fb1d9738
JB
1220 goto out;
1221 }
1222
fb1d9738
JB
1223 du = vmw_crtc_to_du(crtc);
1224
1225 du->hotspot_x = arg->xhot;
1226 du->hotspot_y = arg->yhot;
1227
1228out:
1229 mutex_unlock(&dev->mode_config.mutex);
1230
1231 return ret;
1232}
1233
0bef23f9 1234int vmw_kms_write_svga(struct vmw_private *vmw_priv,
d7e1958d 1235 unsigned width, unsigned height, unsigned pitch,
6558429b 1236 unsigned bpp, unsigned depth)
fb1d9738 1237{
d7e1958d
JB
1238 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1239 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1240 else if (vmw_fifo_have_pitchlock(vmw_priv))
1241 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1242 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1243 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
6558429b 1244 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
0bef23f9
MD
1245
1246 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1247 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1248 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1249 return -EINVAL;
1250 }
1251
1252 return 0;
d7e1958d 1253}
fb1d9738 1254
d7e1958d
JB
1255int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1256{
7c4f7780
TH
1257 struct vmw_vga_topology_state *save;
1258 uint32_t i;
1259
fb1d9738
JB
1260 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1261 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
7c4f7780 1262 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
d7e1958d
JB
1263 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1264 vmw_priv->vga_pitchlock =
7c4f7780 1265 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
d7e1958d 1266 else if (vmw_fifo_have_pitchlock(vmw_priv))
7c4f7780 1267 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
c8261a96 1268 SVGA_FIFO_PITCHLOCK);
7c4f7780
TH
1269
1270 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1271 return 0;
fb1d9738 1272
7c4f7780
TH
1273 vmw_priv->num_displays = vmw_read(vmw_priv,
1274 SVGA_REG_NUM_GUEST_DISPLAYS);
1275
029e50bf
TH
1276 if (vmw_priv->num_displays == 0)
1277 vmw_priv->num_displays = 1;
1278
7c4f7780
TH
1279 for (i = 0; i < vmw_priv->num_displays; ++i) {
1280 save = &vmw_priv->vga_save[i];
1281 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1282 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1283 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1284 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1285 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1286 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1287 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
30c78bb8
TH
1288 if (i == 0 && vmw_priv->num_displays == 1 &&
1289 save->width == 0 && save->height == 0) {
1290
1291 /*
1292 * It should be fairly safe to assume that these
1293 * values are uninitialized.
1294 */
1295
1296 save->width = vmw_priv->vga_width - save->pos_x;
1297 save->height = vmw_priv->vga_height - save->pos_y;
1298 }
7c4f7780 1299 }
30c78bb8 1300
fb1d9738
JB
1301 return 0;
1302}
1303
1304int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1305{
7c4f7780
TH
1306 struct vmw_vga_topology_state *save;
1307 uint32_t i;
1308
fb1d9738
JB
1309 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1310 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
7c4f7780 1311 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
d7e1958d
JB
1312 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1313 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1314 vmw_priv->vga_pitchlock);
1315 else if (vmw_fifo_have_pitchlock(vmw_priv))
1316 iowrite32(vmw_priv->vga_pitchlock,
1317 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
fb1d9738 1318
7c4f7780
TH
1319 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1320 return 0;
1321
1322 for (i = 0; i < vmw_priv->num_displays; ++i) {
1323 save = &vmw_priv->vga_save[i];
1324 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1325 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1326 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1327 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1328 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1329 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1330 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1331 }
1332
fb1d9738
JB
1333 return 0;
1334}
d8bd19d2 1335
e133e737
TH
1336bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1337 uint32_t pitch,
1338 uint32_t height)
1339{
35c05125
SY
1340 return ((u64) pitch * (u64) height) < (u64)
1341 ((dev_priv->active_display_unit == vmw_du_screen_target) ?
1342 dev_priv->prim_bb_mem : dev_priv->vram_size);
e133e737
TH
1343}
1344
1c482ab3
JB
1345
1346/**
1347 * Function called by DRM code called with vbl_lock held.
1348 */
7a1c2f6c
TH
1349u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1350{
1351 return 0;
1352}
626ab771 1353
1c482ab3
JB
1354/**
1355 * Function called by DRM code called with vbl_lock held.
1356 */
1357int vmw_enable_vblank(struct drm_device *dev, int crtc)
1358{
1359 return -ENOSYS;
1360}
1361
1362/**
1363 * Function called by DRM code called with vbl_lock held.
1364 */
1365void vmw_disable_vblank(struct drm_device *dev, int crtc)
1366{
1367}
1368
626ab771
JB
1369
1370/*
1371 * Small shared kms functions.
1372 */
1373
847c5964 1374static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
626ab771
JB
1375 struct drm_vmw_rect *rects)
1376{
1377 struct drm_device *dev = dev_priv->dev;
1378 struct vmw_display_unit *du;
1379 struct drm_connector *con;
626ab771
JB
1380
1381 mutex_lock(&dev->mode_config.mutex);
1382
1383#if 0
6ea77d13
TH
1384 {
1385 unsigned int i;
1386
1387 DRM_INFO("%s: new layout ", __func__);
1388 for (i = 0; i < num; i++)
1389 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1390 rects[i].w, rects[i].h);
1391 DRM_INFO("\n");
1392 }
626ab771
JB
1393#endif
1394
1395 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1396 du = vmw_connector_to_du(con);
1397 if (num > du->unit) {
1398 du->pref_width = rects[du->unit].w;
1399 du->pref_height = rects[du->unit].h;
1400 du->pref_active = true;
cd2b89e7
TH
1401 du->gui_x = rects[du->unit].x;
1402 du->gui_y = rects[du->unit].y;
626ab771
JB
1403 } else {
1404 du->pref_width = 800;
1405 du->pref_height = 600;
1406 du->pref_active = false;
1407 }
1408 con->status = vmw_du_connector_detect(con, true);
1409 }
1410
1411 mutex_unlock(&dev->mode_config.mutex);
1412
1413 return 0;
1414}
1415
1416void vmw_du_crtc_save(struct drm_crtc *crtc)
1417{
1418}
1419
1420void vmw_du_crtc_restore(struct drm_crtc *crtc)
1421{
1422}
1423
1424void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1425 u16 *r, u16 *g, u16 *b,
1426 uint32_t start, uint32_t size)
1427{
1428 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1429 int i;
1430
1431 for (i = 0; i < size; i++) {
1432 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1433 r[i], g[i], b[i]);
1434 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1435 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1436 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1437 }
1438}
1439
1440void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1441{
1442}
1443
1444void vmw_du_connector_save(struct drm_connector *connector)
1445{
1446}
1447
1448void vmw_du_connector_restore(struct drm_connector *connector)
1449{
1450}
1451
1452enum drm_connector_status
1453vmw_du_connector_detect(struct drm_connector *connector, bool force)
1454{
1455 uint32_t num_displays;
1456 struct drm_device *dev = connector->dev;
1457 struct vmw_private *dev_priv = vmw_priv(dev);
cd2b89e7 1458 struct vmw_display_unit *du = vmw_connector_to_du(connector);
626ab771 1459
626ab771 1460 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
626ab771 1461
cd2b89e7
TH
1462 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1463 du->pref_active) ?
626ab771
JB
1464 connector_status_connected : connector_status_disconnected);
1465}
1466
1467static struct drm_display_mode vmw_kms_connector_builtin[] = {
1468 /* 640x480@60Hz */
1469 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1470 752, 800, 0, 480, 489, 492, 525, 0,
1471 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1472 /* 800x600@60Hz */
1473 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1474 968, 1056, 0, 600, 601, 605, 628, 0,
1475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1476 /* 1024x768@60Hz */
1477 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1478 1184, 1344, 0, 768, 771, 777, 806, 0,
1479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1480 /* 1152x864@75Hz */
1481 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1482 1344, 1600, 0, 864, 865, 868, 900, 0,
1483 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1484 /* 1280x768@60Hz */
1485 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1486 1472, 1664, 0, 768, 771, 778, 798, 0,
1487 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488 /* 1280x800@60Hz */
1489 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1490 1480, 1680, 0, 800, 803, 809, 831, 0,
1491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1492 /* 1280x960@60Hz */
1493 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1494 1488, 1800, 0, 960, 961, 964, 1000, 0,
1495 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1496 /* 1280x1024@60Hz */
1497 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1498 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500 /* 1360x768@60Hz */
1501 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1502 1536, 1792, 0, 768, 771, 777, 795, 0,
1503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504 /* 1440x1050@60Hz */
1505 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1506 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1507 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1508 /* 1440x900@60Hz */
1509 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1510 1672, 1904, 0, 900, 903, 909, 934, 0,
1511 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512 /* 1600x1200@60Hz */
1513 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1514 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1516 /* 1680x1050@60Hz */
1517 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1518 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1519 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1520 /* 1792x1344@60Hz */
1521 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1522 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1523 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1524 /* 1853x1392@60Hz */
1525 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1526 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1527 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1528 /* 1920x1200@60Hz */
1529 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1530 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1531 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1532 /* 1920x1440@60Hz */
1533 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1534 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1535 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1536 /* 2560x1600@60Hz */
1537 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1538 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1539 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1540 /* Terminate */
1541 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1542};
1543
1543b4dd
TH
1544/**
1545 * vmw_guess_mode_timing - Provide fake timings for a
1546 * 60Hz vrefresh mode.
1547 *
1548 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1549 * members filled in.
1550 */
1551static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1552{
1553 mode->hsync_start = mode->hdisplay + 50;
1554 mode->hsync_end = mode->hsync_start + 50;
1555 mode->htotal = mode->hsync_end + 50;
1556
1557 mode->vsync_start = mode->vdisplay + 50;
1558 mode->vsync_end = mode->vsync_start + 50;
1559 mode->vtotal = mode->vsync_end + 50;
1560
1561 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1562 mode->vrefresh = drm_mode_vrefresh(mode);
1563}
1564
1565
626ab771
JB
1566int vmw_du_connector_fill_modes(struct drm_connector *connector,
1567 uint32_t max_width, uint32_t max_height)
1568{
1569 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1570 struct drm_device *dev = connector->dev;
1571 struct vmw_private *dev_priv = vmw_priv(dev);
1572 struct drm_display_mode *mode = NULL;
1573 struct drm_display_mode *bmode;
1574 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1575 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1576 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1577 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1578 };
1579 int i;
9a72384d
SY
1580 u32 assumed_bpp = 2;
1581
1582 /*
1583 * If using screen objects, then assume 32-bpp because that's what the
1584 * SVGA device is assuming
1585 */
c8261a96 1586 if (dev_priv->active_display_unit == vmw_du_screen_object)
9a72384d 1587 assumed_bpp = 4;
626ab771 1588
35c05125
SY
1589 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1590 max_width = min(max_width, dev_priv->stdu_max_width);
1591 max_height = min(max_height, dev_priv->stdu_max_height);
1592 }
1593
626ab771 1594 /* Add preferred mode */
c8261a96
SY
1595 mode = drm_mode_duplicate(dev, &prefmode);
1596 if (!mode)
1597 return 0;
1598 mode->hdisplay = du->pref_width;
1599 mode->vdisplay = du->pref_height;
1600 vmw_guess_mode_timing(mode);
626ab771 1601
c8261a96
SY
1602 if (vmw_kms_validate_mode_vram(dev_priv,
1603 mode->hdisplay * assumed_bpp,
1604 mode->vdisplay)) {
1605 drm_mode_probed_add(connector, mode);
1606 } else {
1607 drm_mode_destroy(dev, mode);
1608 mode = NULL;
1609 }
55bde5b2 1610
c8261a96
SY
1611 if (du->pref_mode) {
1612 list_del_init(&du->pref_mode->head);
1613 drm_mode_destroy(dev, du->pref_mode);
626ab771
JB
1614 }
1615
c8261a96
SY
1616 /* mode might be null here, this is intended */
1617 du->pref_mode = mode;
1618
626ab771
JB
1619 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1620 bmode = &vmw_kms_connector_builtin[i];
1621 if (bmode->hdisplay > max_width ||
1622 bmode->vdisplay > max_height)
1623 continue;
1624
9a72384d
SY
1625 if (!vmw_kms_validate_mode_vram(dev_priv,
1626 bmode->hdisplay * assumed_bpp,
626ab771
JB
1627 bmode->vdisplay))
1628 continue;
1629
1630 mode = drm_mode_duplicate(dev, bmode);
1631 if (!mode)
1632 return 0;
1633 mode->vrefresh = drm_mode_vrefresh(mode);
1634
1635 drm_mode_probed_add(connector, mode);
1636 }
1637
d41025c0
JB
1638 /* Move the prefered mode first, help apps pick the right mode. */
1639 if (du->pref_mode)
1640 list_move(&du->pref_mode->head, &connector->probed_modes);
1641
b87577b7 1642 drm_mode_connector_list_update(connector, true);
626ab771
JB
1643
1644 return 1;
1645}
1646
1647int vmw_du_connector_set_property(struct drm_connector *connector,
1648 struct drm_property *property,
1649 uint64_t val)
1650{
1651 return 0;
1652}
cd2b89e7
TH
1653
1654
1655int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1656 struct drm_file *file_priv)
1657{
1658 struct vmw_private *dev_priv = vmw_priv(dev);
1659 struct drm_vmw_update_layout_arg *arg =
1660 (struct drm_vmw_update_layout_arg *)data;
cd2b89e7
TH
1661 void __user *user_rects;
1662 struct drm_vmw_rect *rects;
1663 unsigned rects_size;
1664 int ret;
1665 int i;
1666 struct drm_mode_config *mode_config = &dev->mode_config;
c8261a96 1667 struct drm_vmw_rect bounding_box = {0};
cd2b89e7 1668
cd2b89e7
TH
1669 if (!arg->num_outputs) {
1670 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1671 vmw_du_update_layout(dev_priv, 1, &def_rect);
5151adb3 1672 return 0;
cd2b89e7
TH
1673 }
1674
1675 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
bab9efc2
XW
1676 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1677 GFP_KERNEL);
5151adb3
TH
1678 if (unlikely(!rects))
1679 return -ENOMEM;
cd2b89e7
TH
1680
1681 user_rects = (void __user *)(unsigned long)arg->rects;
1682 ret = copy_from_user(rects, user_rects, rects_size);
1683 if (unlikely(ret != 0)) {
1684 DRM_ERROR("Failed to get rects.\n");
1685 ret = -EFAULT;
1686 goto out_free;
1687 }
1688
1689 for (i = 0; i < arg->num_outputs; ++i) {
bab9efc2
XW
1690 if (rects[i].x < 0 ||
1691 rects[i].y < 0 ||
1692 rects[i].x + rects[i].w > mode_config->max_width ||
1693 rects[i].y + rects[i].h > mode_config->max_height) {
cd2b89e7
TH
1694 DRM_ERROR("Invalid GUI layout.\n");
1695 ret = -EINVAL;
1696 goto out_free;
1697 }
c8261a96
SY
1698
1699 /*
1700 * bounding_box.w and bunding_box.h are used as
1701 * lower-right coordinates
1702 */
1703 if (rects[i].x + rects[i].w > bounding_box.w)
1704 bounding_box.w = rects[i].x + rects[i].w;
1705
1706 if (rects[i].y + rects[i].h > bounding_box.h)
1707 bounding_box.h = rects[i].y + rects[i].h;
cd2b89e7
TH
1708 }
1709
35c05125
SY
1710 /*
1711 * For Screen Target Display Unit, all the displays must fit
1712 * inside of maximum texture size.
1713 */
1714 if (dev_priv->active_display_unit == vmw_du_screen_target)
1715 if (bounding_box.w > dev_priv->texture_max_width ||
1716 bounding_box.h > dev_priv->texture_max_height) {
1717 DRM_ERROR("Layout exceeds maximum texture size\n");
1718 ret = -EINVAL;
1719 goto out_free;
1720 }
1721
1722
cd2b89e7
TH
1723 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1724
1725out_free:
1726 kfree(rects);
cd2b89e7
TH
1727 return ret;
1728}