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rockchip: dts: rk3399-puma: add /config/sysreset-gpio property
[people/ms/u-boot.git] / arch / arm / dts / rk3399-puma.dtsi
CommitLineData
3c2bbd58
PT
1/*
2 * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
3 *
faf1afc4 4 * SPDX-License-Identifier: GPL-2.0+ X11
3c2bbd58
PT
5 */
6
3c2bbd58
PT
7#include <dt-bindings/pwm/pwm.h>
8#include "rk3399.dtsi"
3c2bbd58
PT
9
10/ {
11 model = "Theobroma Systems RK3399-Q7 SoM";
f592edd9 12 compatible = "tsd,rk3399-q7", "tsd,puma", "rockchip,rk3399";
3c2bbd58 13
572045b6 14 config {
56f580d3
PT
15 u-boot,spl-payload-offset = <0x40000>; /* @ 256KB */
16 u-boot,mmc-env-offset = <0x4000>; /* @ 16KB */
4436c5db 17 u-boot,efi-partition-entries-offset = <0x200000>; /* 2MB */
f592edd9 18 u-boot,boot-led = "module_led";
5f104178 19 sysreset-gpio = <&gpio1 RK_PA6 GPIO_ACTIVE_HIGH>;
572045b6
PT
20 };
21
3c2bbd58
PT
22 chosen {
23 stdout-path = "serial0:115200n8";
775bd78a
PT
24 u-boot,spl-boot-order = \
25 "same-as-spl", &spiflash, &sdhci, &sdmmc;
3c2bbd58
PT
26 };
27
28 aliases {
29 spi0 = &spi1;
30 spi1 = &spi5;
31 };
32
f592edd9
PT
33 leds {
34 compatible = "gpio-leds";
35 pinctrl-names = "default";
36 pinctrl-0 = <&leds_pins_puma>;
37
38 module_led {
39 label = "module_led";
366812fa 40 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
f592edd9
PT
41 linux,default-trigger = "heartbeat";
42 };
43
44 sd_card_led {
45 label = "sd_card_led";
366812fa 46 gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
f592edd9
PT
47 linux,default-trigger = "mmc0";
48 };
49 };
50
51 clkin_gmac: external-gmac-clock {
52 compatible = "fixed-clock";
53 clock-frequency = <125000000>;
54 clock-output-names = "clkin_gmac";
55 #clock-cells = <0>;
56 };
57
58 dw_hdmi_audio: dw-hdmi-audio {
59 status = "enabled";
60 compatible = "rockchip,dw-hdmi-audio";
61 #sound-dai-cells = <0>;
62 };
63
64 hdmi_codec: hdmi-codec {
65 compatible = "simple-audio-card";
66 simple-audio-card,format = "i2s";
67 simple-audio-card,mclk-fs = <256>;
68 simple-audio-card,name = "HDMI-CODEC";
69
70 simple-audio-card,cpu {
71 sound-dai = <&i2s2>;
72 };
73
74 simple-audio-card,codec {
75 sound-dai = <&hdmi>;
76 };
77 };
78
79 hdmi_sound: hdmi-sound {
80 status = "disabled";
81 compatible = "simple-audio-card";
82 simple-audio-card,format = "i2s";
83 simple-audio-card,mclk-fs = <256>;
84 simple-audio-card,name = "rockchip,hdmi";
85
86 simple-audio-card,cpu {
87 sound-dai = <&i2s2>;
88 };
89 simple-audio-card,codec {
90 sound-dai = <&hdmi>;
91 };
92 };
93
46c89c8e
PT
94 usbhub_enable: usbhub_enable {
95 compatible = "regulator-fixed";
96 regulator-name = "usbhub_enable";
97 enable-active-low;
366812fa 98 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
46c89c8e
PT
99 regulator-boot-on;
100 regulator-min-microvolt = <3300000>;
101 regulator-max-microvolt = <3300000>;
102 };
103
482cf223
PT
104 /*
105 * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
106 * eMMC and SPI flash powered-down initially (in fact it keeps the
107 * reset signal asserted). Even though it is an enable signal, we
108 * model this as a regulator.
109 */
110 bios_enable: bios_enable {
111 compatible = "regulator-fixed";
112 u-boot,dm-pre-reloc;
113 regulator-name = "bios_enable";
df1e6212 114 enable-active-high;
366812fa 115 gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
482cf223
PT
116 regulator-always-on;
117 regulator-boot-on;
118 regulator-min-microvolt = <1800000>;
119 regulator-max-microvolt = <1800000>;
120 };
121
f592edd9
PT
122 vccadc_ref: vccadc-ref {
123 compatible = "regulator-fixed";
124 regulator-name = "vcc1v8_sys";
3c2bbd58
PT
125 regulator-always-on;
126 regulator-boot-on;
f592edd9
PT
127 regulator-min-microvolt = <1800000>;
128 regulator-max-microvolt = <1800000>;
3c2bbd58
PT
129 };
130
131 vcc3v3_sys: vcc3v3-sys {
132 compatible = "regulator-fixed";
133 regulator-name = "vcc3v3_sys";
134 regulator-always-on;
135 regulator-boot-on;
136 regulator-min-microvolt = <3300000>;
137 regulator-max-microvolt = <3300000>;
138 };
139
f592edd9 140 vcc5v0_otg: vcc5v0-otg-regulator {
3c2bbd58 141 compatible = "regulator-fixed";
f592edd9 142 enable-active-high;
366812fa 143 gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
f592edd9
PT
144 pinctrl-names = "default";
145 pinctrl-0 = <&otg_vbus_drv>;
146 regulator-name = "vcc5v0_otg";
3c2bbd58 147 regulator-always-on;
3c2bbd58
PT
148 };
149
f592edd9 150 vcc5v0_host: vcc5v0-host-regulator {
3c2bbd58 151 compatible = "regulator-fixed";
f592edd9 152 enable-active-low;
366812fa 153 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
f592edd9
PT
154 pinctrl-names = "default";
155 pinctrl-0 = <&host_vbus_drv>;
3c2bbd58 156 regulator-name = "vcc5v0_host";
f592edd9 157 regulator-always-on;
3c2bbd58
PT
158 };
159
f592edd9
PT
160 vcc5v0_sys: vcc5v0-sys {
161 compatible = "regulator-fixed";
162 regulator-name = "vcc5v0_sys";
163 regulator-always-on;
164 regulator-boot-on;
165 regulator-min-microvolt = <5000000>;
166 regulator-max-microvolt = <5000000>;
3c2bbd58
PT
167 };
168
169 vcc_phy: vcc-phy-regulator {
170 compatible = "regulator-fixed";
171 regulator-name = "vcc_phy";
172 regulator-always-on;
173 regulator-boot-on;
174 };
f592edd9
PT
175
176 vdd_log: vdd-log {
177 compatible = "pwm-regulator";
178 pwms = <&pwm2 0 25000 1>;
179 regulator-name = "vdd_log";
180 regulator-min-microvolt = <800000>;
181 regulator-max-microvolt = <1400000>;
182 regulator-always-on;
183 regulator-boot-on;
184
185 /* for rockchip boot on */
186 rockchip,pwm_id= <2>;
187 rockchip,pwm_voltage = <1000000>;
188 };
3c2bbd58
PT
189};
190
191&emmc_phy {
192 status = "okay";
193};
194
f592edd9
PT
195&gmac {
196 phy-supply = <&vcc_phy>;
197 phy-mode = "rgmii";
198 clock_in_out = "input";
366812fa 199 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
f592edd9
PT
200 snps,reset-active-low;
201 snps,reset-delays-us = <2 10000 50000>;
202 assigned-clocks = <&cru SCLK_RMII_SRC>;
203 assigned-clock-parents = <&clkin_gmac>;
204 pinctrl-names = "default";
205 pinctrl-0 = <&rgmii_pins>;
206 tx_delay = <0x10>;
207 rx_delay = <0x10>;
3c2bbd58
PT
208 status = "okay";
209};
210
f592edd9
PT
211&hdmi {
212 #address-cells = <1>;
213 #size-cells = <0>;
214 #sound-dai-cells = <0>;
3c2bbd58
PT
215 status = "okay";
216};
217
f592edd9 218&i2c0 {
3c2bbd58 219 status = "okay";
f592edd9
PT
220 i2c-scl-rising-time-ns = <168>;
221 i2c-scl-falling-time-ns = <4>;
222 clock-frequency = <400000>;
223
224 vdd_gpu: fan535555@60 {
225 compatible = "fcs,fan53555";
226 reg = <0x60>;
366812fa 227 vsel-gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>;
f592edd9
PT
228 vin-supply = <&vcc5v0_sys>;
229 regulator-compatible = "fan53555-reg";
230 regulator-name = "vdd_gpu";
231 regulator-min-microvolt = <600000>;
232 regulator-max-microvolt = <1230000>;
233 regulator-ramp-delay = <1000>;
234 fcs,suspend-voltage-selector = <1>;
235 regulator-always-on;
236 regulator-boot-on;
237 regulator-initial-state = <3>;
238 regulator-state-mem {
239 regulator-off-in-suspend;
240 };
241 };
242
243 rk808: pmic@1b {
244 compatible = "rockchip,rk808";
245 reg = <0x1b>;
246 interrupt-parent = <&gpio1>;
247 interrupts = <22 IRQ_TYPE_LEVEL_LOW>; // TODO check interrupt?
248 pinctrl-names = "default";
249 pinctrl-0 = <&pmic_int_l>;
250 rockchip,system-power-controller;
251 wakeup-source;
252 #clock-cells = <1>;
253 clock-output-names = "xin32k", "rk808-clkout2";
254
255 vcc1-supply = <&vcc5v0_sys>;
256 vcc2-supply = <&vcc5v0_sys>;
257 vcc3-supply = <&vcc5v0_sys>;
258 vcc4-supply = <&vcc5v0_sys>;
259 vcc6-supply = <&vcc5v0_sys>;
260 vcc7-supply = <&vcc5v0_sys>;
261 vcc8-supply = <&vcc3v3_sys>;
262 vcc9-supply = <&vcc5v0_sys>;
263 vcc10-supply = <&vcc5v0_sys>;
264 vcc11-supply = <&vcc5v0_sys>;
265 vcc12-supply = <&vcc3v3_sys>;
266 vddio-supply = <&vcc1v8_pmu>;
267
268 regulators {
269 vdd_center: DCDC_REG1 {
270 regulator-always-on;
271 regulator-boot-on;
272 regulator-min-microvolt = <750000>;
273 regulator-max-microvolt = <1350000>;
274 regulator-ramp-delay = <6001>;
275 regulator-name = "vdd_center";
276 regulator-state-mem {
277 regulator-off-in-suspend;
278 };
279 };
280
281 vdd_cpu_l: DCDC_REG2 {
282 regulator-always-on;
283 regulator-boot-on;
284 regulator-min-microvolt = <750000>;
285 regulator-max-microvolt = <1350000>;
286 regulator-ramp-delay = <6001>;
287 regulator-name = "vdd_cpu_l";
288 regulator-state-mem {
289 regulator-off-in-suspend;
290 };
291 };
292
293 vcc_ddr: DCDC_REG3 {
294 regulator-always-on;
295 regulator-boot-on;
296 regulator-name = "vcc_ddr";
297 regulator-state-mem {
298 regulator-on-in-suspend;
299 };
300 };
301
302 vcc_1v8: DCDC_REG4 {
303 regulator-always-on;
304 regulator-boot-on;
305 regulator-min-microvolt = <1800000>;
306 regulator-max-microvolt = <1800000>;
307 regulator-name = "vcc_1v8";
308 regulator-state-mem {
309 regulator-on-in-suspend;
310 regulator-suspend-microvolt = <1800000>;
311 };
312 };
313
314 vcc_ldo1: LDO_REG1 {
315 regulator-boot-on;
316 regulator-min-microvolt = <1800000>;
317 regulator-max-microvolt = <1800000>;
318 regulator-name = "vcc_ldo1";
319 regulator-state-mem {
320 regulator-off-in-suspend;
321 };
322 };
323
324 vcc1v8_hdmi: LDO_REG2 {
325 regulator-always-on;
326 regulator-boot-on;
327 regulator-min-microvolt = <1800000>;
328 regulator-max-microvolt = <1800000>;
329 regulator-name = "vcc1v8_hdmi";
330 regulator-state-mem {
331 regulator-off-in-suspend;
332 };
333 };
334
335 vcc1v8_pmu: LDO_REG3 {
336 regulator-always-on;
337 regulator-boot-on;
338 regulator-min-microvolt = <1800000>;
339 regulator-max-microvolt = <1800000>;
340 regulator-name = "vcc1v8_pmu";
341 regulator-state-mem {
342 regulator-on-in-suspend;
343 regulator-suspend-microvolt = <1800000>;
344 };
345 };
346
347 vcc_sd: LDO_REG4 {
348 regulator-always-on;
349 regulator-boot-on;
350 regulator-min-microvolt = <1800000>;
4f70039b 351 regulator-max-microvolt = <3000000>;
f592edd9
PT
352 regulator-name = "vcc_sd";
353 regulator-state-mem {
354 regulator-on-in-suspend;
4f70039b 355 regulator-suspend-microvolt = <3000000>;
f592edd9
PT
356 };
357 };
358
359 vcc_ldo5: LDO_REG5 {
360 regulator-boot-on;
361 regulator-min-microvolt = <3000000>;
362 regulator-max-microvolt = <3000000>;
363 regulator-name = "vcc_ldo5";
364 regulator-state-mem {
365 regulator-off-in-suspend;
366 };
367 };
368
369 vcc_ldo6: LDO_REG6 {
370 regulator-boot-on;
371 regulator-min-microvolt = <1500000>;
372 regulator-max-microvolt = <1500000>;
373 regulator-name = "vcc_ldo6";
374 regulator-state-mem {
375 regulator-off-in-suspend;
376 };
377 };
378
379 vcc0v9_hdmi: LDO_REG7 {
380 regulator-always-on;
381 regulator-boot-on;
382 regulator-min-microvolt = <900000>;
383 regulator-max-microvolt = <900000>;
384 regulator-name = "vcc0v9_hdmi";
385 regulator-state-mem {
386 regulator-off-in-suspend;
387 };
388 };
389
390 vcc_efuse: LDO_REG8 {
391 regulator-always-on;
392 regulator-boot-on;
393 regulator-min-microvolt = <1800000>;
394 regulator-max-microvolt = <1800000>;
395 regulator-name = "vcc_efuse";
396 regulator-state-mem {
397 regulator-off-in-suspend;
398 };
399 };
400
401 vcc3v3_s3: SWITCH_REG1 {
402 regulator-always-on;
403 regulator-boot-on;
404 regulator-name = "vcc3v3_s3";
405 regulator-state-mem {
406 regulator-off-in-suspend;
407 };
408 };
409
410 vcc3v3_s0: SWITCH_REG2 {
411 regulator-always-on;
412 regulator-boot-on;
413 regulator-name = "vcc3v3_s0";
414 regulator-state-mem {
415 regulator-off-in-suspend;
416 };
417 };
418 };
419 };
3c2bbd58
PT
420};
421
f592edd9
PT
422&i2c8 {
423 status = "okay";
424 clock-frequency = <400000>;
425
426 vdd_cpu_b: fan53555@60 {
427 compatible = "fcs,fan53555";
428 reg = <0x60>;
366812fa 429 vsel-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
f592edd9
PT
430 vin-supply = <&vcc5v0_sys>;
431 regulator-compatible = "fan53555-reg";
432 regulator-name = "vdd_cpu_b";
433 regulator-min-microvolt = <600000>;
434 regulator-max-microvolt = <1230000>;
435 regulator-ramp-delay = <1000>;
436 fcs,suspend-voltage-selector = <1>;
437 regulator-always-on;
438 regulator-boot-on;
439 regulator-initial-state = <3>;
440 regulator-state-mem {
441 regulator-off-in-suspend;
442 };
443 };
444};
445
446&i2s0 {
447 status = "okay";
448 rockchip,i2s-broken-burst-len;
449 rockchip,playback-channels = <8>;
450 rockchip,capture-channels = <8>;
451 #sound-dai-cells = <0>;
452};
453
454&i2s2 {
455 #sound-dai-cells = <0>;
456 status = "okay";
457};
458
459&io_domains {
460 status = "okay";
461
462 bt656-supply = <&vcc_1v8>; /* bt656_gpio2ab_ms */
463 audio-supply = <&vcc_1v8>; /* audio_gpio3d4a_ms */
464 sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
465 gpio1830-supply = <&vcc_1v8>; /* gpio1833_gpio4cd_ms */
466};
467
468&pcie0 {
469 assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
470 assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
471 assigned-clock-rates = <100000000>;
366812fa 472 ep-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
f592edd9
PT
473 num-lanes = <4>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&pcie_clkreqn>;
476 status = "okay";
477};
478
479&pcie_phy {
482cf223 480 status = "okay";
f592edd9
PT
481};
482
483&pmu_io_domains {
484 status = "okay";
485 pmu1830-supply = <&vcc_1v8>;
486};
487
488&pwm0 {
489 status = "okay";
490};
491
492&pwm2 {
3c2bbd58
PT
493 status = "okay";
494};
495
496&sdhci {
497 bus-width = <8>;
498 mmc-hs400-1_8v;
f592edd9 499 supports-emmc;
3c2bbd58 500 non-removable;
f592edd9
PT
501 keep-power-in-suspend;
502 mmc-hs400-enhanced-strobe;
3c2bbd58
PT
503 status = "okay";
504};
505
f592edd9 506&sdmmc {
482cf223 507 u-boot,dm-pre-reloc;
f592edd9
PT
508 clock-frequency = <150000000>;
509 clock-freq-min-max = <100000 150000000>;
510 supports-sd;
511 bus-width = <4>;
512 cap-mmc-highspeed;
513 cap-sd-highspeed;
514 disable-wp;
515 num-slots = <1>;
516 vqmmc-supply = <&vcc_sd>;
517 pinctrl-names = "default";
518 pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
3c2bbd58
PT
519 status = "okay";
520};
521
522&uart2 {
523 status = "okay";
524};
525
526&usb_host0_ehci {
b1e1ce2c 527 status = "disabled";
3c2bbd58
PT
528};
529
530&usb_host0_ohci {
b1e1ce2c 531 status = "disabled";
3c2bbd58
PT
532};
533
534&dwc3_typec0 {
b1e1ce2c 535 status = "okay";
3c2bbd58
PT
536};
537
538&usb_host1_ehci {
b1e1ce2c 539 status = "disabled";
3c2bbd58
PT
540};
541
542&usb_host1_ohci {
b1e1ce2c 543 status = "disabled";
3c2bbd58
PT
544};
545
546&dwc3_typec1 {
547 status = "okay";
884ad05d 548 tsd,usb-port-power = "usbhub_enable";
3c2bbd58
PT
549};
550
f592edd9
PT
551&vopb {
552 status = "okay";
553};
554
5f104178
PT
555&gpio1 {
556 u-boot,dm-pre-reloc;
557};
558
482cf223
PT
559&gpio3 {
560 u-boot,dm-pre-reloc;
561};
562
3c2bbd58 563&pinctrl {
f592edd9
PT
564 /* Pins that are not explicitely used by any devices */
565 pinctrl-names = "default";
566 pinctrl-0 = <&puma_pin_hog>;
482cf223 567
f592edd9
PT
568 hog {
569 puma_pin_hog: puma_pin_hog {
570 rockchip,pins =
571 /* We need pull-ups on Q7 buttons */
366812fa
KG
572 <RK_GPIO0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, /* LID_BTN# */
573 <RK_GPIO0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, /* BATLOW# */
574 <RK_GPIO0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, /* SLP_BTN# */
575 <RK_GPIO0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; /* BIOS_DISABLE# */
f592edd9
PT
576 };
577 };
578
3c2bbd58
PT
579 pmic {
580 pmic_int_l: pmic-int-l {
581 rockchip,pins =
366812fa 582 <RK_GPIO1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
3c2bbd58 583 };
f592edd9
PT
584 };
585
586 leds_pins_puma: led_pins@0 {
587 rockchip,pins =
366812fa
KG
588 <RK_GPIO2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
589 <RK_GPIO1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
f592edd9 590 };
3c2bbd58 591
f592edd9
PT
592 usb2 {
593 otg_vbus_drv: otg-vbus-drv {
3c2bbd58 594 rockchip,pins =
366812fa 595 <RK_GPIO0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
f592edd9
PT
596 };
597
598 host_vbus_drv: host-vbus-drv {
599 rockchip,pins =
366812fa 600 <RK_GPIO4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
f592edd9
PT
601 };
602 };
603
604 i2c8 {
605 i2c8_xfer_a: i2c8-xfer {
366812fa
KG
606 rockchip,pins =
607 <RK_GPIO1 RK_PC5 RK_FUNC_1 &pcfg_pull_up>,
608 <RK_GPIO1 RK_PC4 RK_FUNC_1 &pcfg_pull_up>;
3c2bbd58
PT
609 };
610 };
611};
612
f592edd9
PT
613&i2c1 {
614 status = "okay";
615 clock-frequency = <400000>;
616};
617&i2c2 {
618 status = "okay";
619 clock-frequency = <400000>;
620};
621&i2c4 {
622 status = "okay";
623 clock-frequency = <400000>;
624};
625&i2c6 {
626 status = "okay";
627 clock-frequency = <400000>;
628};
629
630&i2c6_xfer {
631 /* Enable pull-ups, the pins would float otherwise. */
632 rockchip,pins =
366812fa
KG
633 <RK_GPIO2 RK_PB2 RK_FUNC_2 &pcfg_pull_up>,
634 <RK_GPIO2 RK_PB1 RK_FUNC_2 &pcfg_pull_up>;
f592edd9
PT
635};
636
637&i2c7 {
638 status = "okay";
639 clock-frequency = <400000>;
640
641 rtc_twi: rtc@6f {
642 compatible = "isil,isl1208";
643 reg = <0x6f>;
644 };
645 fan: fan@18 {
646 compatible = "ti,amc6821";
647 reg = <0x18>;
648 cooling-min-state = <0>;
649 cooling-max-state = <9>;
650 #cooling-cells = <2>;
651 };
652};
653
654&uart0 {
655 u-boot,dm-pre-reloc;
3c2bbd58 656 pinctrl-names = "default";
f592edd9 657 pinctrl-0 = <&uart0_xfer &uart0_cts>;
3c2bbd58
PT
658 status = "okay";
659};
660
f592edd9 661
3c2bbd58
PT
662&spi1 {
663 u-boot,dm-pre-reloc;
664
665 status = "okay";
666
667 #address-cells = <1>;
668 #size-cells = <0>;
669
670 spiflash: w25q32dw@0 {
671 u-boot,dm-pre-reloc;
672
673 compatible = "spi-flash";
674 reg = <0>;
2dd2c011 675 spi-max-frequency = <49500000>;
3c2bbd58
PT
676 spi-cpol;
677 spi-cpha;
678 };
679};
680
681&spi5 {
682 status = "okay";
683};