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ARM: tegra: fix ULPI PHY on Ventana and Seaboard
[people/ms/u-boot.git] / arch / arm / dts / tegra20-seaboard.dts
CommitLineData
6710b5b5
SG		 1/dts-v1/;
2
ce02a71c 3#include <dt-bindings/input/input.h>
6c5be646 4#include "tegra20.dtsi"
6710b5b5
SG		 5
6/ {
7 model = "NVIDIA Seaboard";
8 compatible = "nvidia,seaboard", "nvidia,tegra20";
9
1920172e 10 aliases {
126685ad 11 /* This defines the order of our ports */
002ddbff
SW		 12 usb0 = "/usb@c5000000";
13 usb1 = "/usb@c5004000";
14 usb2 = "/usb@c5008000";
3682cc3d
SG		 15 i2c0 = "/i2c@7000d000";
16 i2c1 = "/i2c@7000c000";
17 i2c2 = "/i2c@7000c400";
18 i2c3 = "/i2c@7000c500";
ce02a71c
SG		 19 rtc0 = "/i2c@7000d000/tps6586x@34";
20 rtc1 = "/rtc@7000e000";
21 serial0 = &uartd;
67748a73
SW		 22 mmc0 = "/sdhci@c8000600";
23 mmc1 = "/sdhci@c8000400";
1920172e
SG		 24 };
25
ce02a71c
SG		 26 chosen {
27 bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
28 };
29
30 chosen {
31 stdout-path = &uartd;
32 };
33
6710b5b5 34 memory {
ce02a71c 35 reg = <0x00000000 0x40000000>;
6710b5b5
SG		 36 };
37
ee7d755a 38 host1x@50000000 {
36068ae7
AM		 39 status = "okay";
40 dc@54200000 {
41 status = "okay";
42 rgb {
43 status = "okay";
ce02a71c
SG		 44
45 nvidia,panel = <&panel>;
ec550770
SG		 46
47 display-timings {
48 timing@0 {
49 /* Seaboard has 1366x768 */
50 clock-frequency = <70600000>;
51 hactive = <1366>;
52 vactive = <768>;
53 hback-porch = <58>;
54 hfront-porch = <58>;
55 hsync-len = <58>;
56 vback-porch = <4>;
57 vfront-porch = <4>;
58 vsync-len = <4>;
59 hsync-active = <1>;
60 };
61 };
36068ae7
AM		 62 };
63 };
ce02a71c
SG		 64
65 hdmi@54280000 {
66 status = "okay";
67
68 vdd-supply = <&hdmi_vdd_reg>;
69 pll-supply = <&hdmi_pll_reg>;
70 hdmi-supply = <&vdd_hdmi>;
71
72 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
73 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
74 GPIO_ACTIVE_HIGH>;
75 };
36068ae7
AM		 76 };
77
ce02a71c
SG		 78 pinmux@70000014 {
79 pinctrl-names = "default";
80 pinctrl-0 = <&state_default>;
81
82 state_default: pinmux {
83 ata {
84 nvidia,pins = "ata";
85 nvidia,function = "ide";
86 };
87 atb {
88 nvidia,pins = "atb", "gma", "gme";
89 nvidia,function = "sdio4";
90 };
91 atc {
92 nvidia,pins = "atc";
93 nvidia,function = "nand";
94 };
95 atd {
96 nvidia,pins = "atd", "ate", "gmb", "spia",
97 "spib", "spic";
98 nvidia,function = "gmi";
99 };
100 cdev1 {
101 nvidia,pins = "cdev1";
102 nvidia,function = "plla_out";
103 };
104 cdev2 {
105 nvidia,pins = "cdev2";
106 nvidia,function = "pllp_out4";
107 };
108 crtp {
109 nvidia,pins = "crtp", "lm1";
110 nvidia,function = "crt";
111 };
112 csus {
113 nvidia,pins = "csus";
114 nvidia,function = "vi_sensor_clk";
115 };
116 dap1 {
117 nvidia,pins = "dap1";
118 nvidia,function = "dap1";
119 };
120 dap2 {
121 nvidia,pins = "dap2";
122 nvidia,function = "dap2";
123 };
124 dap3 {
125 nvidia,pins = "dap3";
126 nvidia,function = "dap3";
127 };
128 dap4 {
129 nvidia,pins = "dap4";
130 nvidia,function = "dap4";
131 };
132 dta {
133 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
134 nvidia,function = "vi";
135 };
136 dtf {
137 nvidia,pins = "dtf";
138 nvidia,function = "i2c3";
139 };
140 gmc {
141 nvidia,pins = "gmc";
142 nvidia,function = "uartd";
143 };
144 gmd {
145 nvidia,pins = "gmd";
146 nvidia,function = "sflash";
147 };
148 gpu {
149 nvidia,pins = "gpu";
150 nvidia,function = "pwm";
151 };
152 gpu7 {
153 nvidia,pins = "gpu7";
154 nvidia,function = "rtck";
155 };
156 gpv {
157 nvidia,pins = "gpv", "slxa", "slxk";
158 nvidia,function = "pcie";
159 };
160 hdint {
161 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
162 "lsck", "lsda";
163 nvidia,function = "hdmi";
164 };
165 i2cp {
166 nvidia,pins = "i2cp";
167 nvidia,function = "i2cp";
168 };
169 irrx {
170 nvidia,pins = "irrx", "irtx";
171 nvidia,function = "uartb";
172 };
173 kbca {
174 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
175 "kbce", "kbcf";
176 nvidia,function = "kbc";
177 };
178 lcsn {
179 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
180 "lsdi", "lvp0";
181 nvidia,function = "rsvd4";
182 };
183 ld0 {
184 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
185 "ld5", "ld6", "ld7", "ld8", "ld9",
186 "ld10", "ld11", "ld12", "ld13", "ld14",
187 "ld15", "ld16", "ld17", "ldi", "lhp0",
188 "lhp1", "lhp2", "lhs", "lpp", "lsc0",
189 "lspi", "lvp1", "lvs";
190 nvidia,function = "displaya";
191 };
192 owc {
193 nvidia,pins = "owc", "spdi", "spdo", "uac";
194 nvidia,function = "rsvd2";
195 };
196 pmc {
197 nvidia,pins = "pmc";
198 nvidia,function = "pwr_on";
199 };
200 rm {
201 nvidia,pins = "rm";
202 nvidia,function = "i2c1";
203 };
204 sdb {
205 nvidia,pins = "sdb", "sdc", "sdd";
206 nvidia,function = "sdio3";
207 };
208 sdio1 {
209 nvidia,pins = "sdio1";
210 nvidia,function = "sdio1";
211 };
212 slxc {
213 nvidia,pins = "slxc", "slxd";
214 nvidia,function = "spdif";
215 };
216 spid {
217 nvidia,pins = "spid", "spie", "spif";
218 nvidia,function = "spi1";
219 };
220 spig {
221 nvidia,pins = "spig", "spih";
222 nvidia,function = "spi2_alt";
223 };
224 uaa {
225 nvidia,pins = "uaa", "uab", "uda";
226 nvidia,function = "ulpi";
227 };
228 uad {
229 nvidia,pins = "uad";
230 nvidia,function = "irda";
231 };
232 uca {
233 nvidia,pins = "uca", "ucb";
234 nvidia,function = "uartc";
235 };
236 conf_ata {
237 nvidia,pins = "ata", "atb", "atc", "atd",
238 "cdev1", "cdev2", "dap1", "dap2",
239 "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
240 "gme", "gpu", "gpu7", "i2cp", "irrx",
241 "irtx", "pta", "rm", "sdc", "sdd",
242 "slxd", "slxk", "spdi", "spdo", "uac",
243 "uad", "uca", "ucb", "uda";
244 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
245 nvidia,tristate = <TEGRA_PIN_DISABLE>;
246 };
247 conf_ate {
248 nvidia,pins = "ate", "csus", "dap3",
249 "gpv", "owc", "slxc", "spib", "spid",
250 "spie";
251 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
252 nvidia,tristate = <TEGRA_PIN_ENABLE>;
253 };
254 conf_ck32 {
255 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
256 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
257 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
258 };
259 conf_crtp {
260 nvidia,pins = "crtp", "gmb", "slxa", "spia",
261 "spig", "spih";
262 nvidia,pull = <TEGRA_PIN_PULL_UP>;
263 nvidia,tristate = <TEGRA_PIN_ENABLE>;
264 };
265 conf_dta {
266 nvidia,pins = "dta", "dtb", "dtc", "dtd";
267 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
268 nvidia,tristate = <TEGRA_PIN_DISABLE>;
269 };
270 conf_dte {
271 nvidia,pins = "dte", "spif";
272 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
273 nvidia,tristate = <TEGRA_PIN_ENABLE>;
274 };
275 conf_hdint {
276 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
277 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
278 "lvp0";
279 nvidia,tristate = <TEGRA_PIN_ENABLE>;
280 };
281 conf_kbca {
282 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
283 "kbce", "kbcf", "sdio1", "spic", "uaa",
284 "uab";
285 nvidia,pull = <TEGRA_PIN_PULL_UP>;
286 nvidia,tristate = <TEGRA_PIN_DISABLE>;
287 };
288 conf_lc {
289 nvidia,pins = "lc", "ls";
290 nvidia,pull = <TEGRA_PIN_PULL_UP>;
291 };
292 conf_ld0 {
293 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
294 "ld5", "ld6", "ld7", "ld8", "ld9",
295 "ld10", "ld11", "ld12", "ld13", "ld14",
296 "ld15", "ld16", "ld17", "ldi", "lhp0",
297 "lhp1", "lhp2", "lhs", "lm0", "lpp",
298 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
299 "lvs", "pmc", "sdb";
300 nvidia,tristate = <TEGRA_PIN_DISABLE>;
301 };
302 conf_ld17_0 {
303 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
304 "ld23_22";
305 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
306 };
307 drive_sdio1 {
308 nvidia,pins = "drive_sdio1";
309 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
310 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
311 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
312 nvidia,pull-down-strength = <31>;
313 nvidia,pull-up-strength = <31>;
314 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
315 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
316 };
317 };
318
319 state_i2cmux_ddc: pinmux_i2cmux_ddc {
320 ddc {
321 nvidia,pins = "ddc";
322 nvidia,function = "i2c2";
323 };
324 pta {
325 nvidia,pins = "pta";
326 nvidia,function = "rsvd4";
327 };
328 };
cd474cba 329
ce02a71c
SG		 330 state_i2cmux_pta: pinmux_i2cmux_pta {
331 ddc {
332 nvidia,pins = "ddc";
333 nvidia,function = "rsvd4";
334 };
335 pta {
336 nvidia,pins = "pta";
337 nvidia,function = "i2c2";
338 };
339 };
340
341 state_i2cmux_idle: pinmux_i2cmux_idle {
342 ddc {
343 nvidia,pins = "ddc";
344 nvidia,function = "rsvd4";
345 };
346 pta {
347 nvidia,pins = "pta";
348 nvidia,function = "rsvd4";
cd474cba
SG		 349 };
350 };
351 };
352
ce02a71c
SG		 353 i2s@70002800 {
354 status = "okay";
355 };
356
6710b5b5 357 serial@70006300 {
ce02a71c 358 status = "okay";
6710b5b5
SG		 359 clock-frequency = < 216000000 >;
360 };
361
b7723f3f 362 nand-controller@70008000 {
2b2b50bc 363 nvidia,wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
b7723f3f
AM		 364 nvidia,width = <8>;
365 nvidia,timing = <26 100 20 80 20 10 12 10 70>;
366 nand@0 {
367 reg = <0>;
368 compatible = "hynix,hy27uf4g2b", "nand-flash";
369 };
6710b5b5 370 };
3682cc3d 371
ce02a71c
SG		 372 pwm: pwm@7000a000 {
373 status = "okay";
374 };
375
3682cc3d 376 i2c@7000c000 {
ee7d755a 377 status = "okay";
ce02a71c
SG		 378 clock-frequency = <400000>;
379
380 wm8903: wm8903@1a {
381 compatible = "wlf,wm8903";
382 reg = <0x1a>;
383 interrupt-parent = <&gpio>;
384 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
385
386 gpio-controller;
387 #gpio-cells = <2>;
388
389 micdet-cfg = <0>;
390 micdet-delay = <100>;
391 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
392 };
393
394 /* ALS and proximity sensor */
395 isl29018@44 {
396 compatible = "isil,isl29018";
397 reg = <0x44>;
398 interrupt-parent = <&gpio>;
399 interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
400 };
401
402 gyrometer@68 {
403 compatible = "invn,mpu3050";
404 reg = <0x68>;
405 interrupt-parent = <&gpio>;
406 interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
407 };
3682cc3d
SG		 408 };
409
410 i2c@7000c400 {
ee7d755a 411 status = "okay";
ce02a71c
SG		 412 clock-frequency = <100000>;
413 };
414
415 i2cmux {
416 compatible = "i2c-mux-pinctrl";
417 #address-cells = <1>;
418 #size-cells = <0>;
419
420 i2c-parent = <&{/i2c@7000c400}>;
421
422 pinctrl-names = "ddc", "pta", "idle";
423 pinctrl-0 = <&state_i2cmux_ddc>;
424 pinctrl-1 = <&state_i2cmux_pta>;
425 pinctrl-2 = <&state_i2cmux_idle>;
426
427 hdmi_ddc: i2c@0 {
428 reg = <0>;
429 #address-cells = <1>;
430 #size-cells = <0>;
431 };
432
433 lvds_ddc: i2c@1 {
434 reg = <1>;
435 #address-cells = <1>;
436 #size-cells = <0>;
437
438 smart-battery@b {
439 compatible = "ti,bq20z75", "smart-battery-1.1";
440 reg = <0xb>;
441 ti,i2c-retry-count = <2>;
442 ti,poll-retry-count = <10>;
443 };
444 };
3682cc3d
SG		 445 };
446
447 i2c@7000c500 {
ee7d755a 448 status = "okay";
ce02a71c
SG		 449 clock-frequency = <400000>;
450 };
451
452 i2c@7000d000 {
453 status = "okay";
454 clock-frequency = <400000>;
455
456 magnetometer@c {
457 compatible = "asahi-kasei,ak8975";
458 reg = <0xc>;
459 interrupt-parent = <&gpio>;
460 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
461 };
462
463 pmic: tps6586x@34 {
464 compatible = "ti,tps6586x";
465 reg = <0x34>;
466 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
467
468 ti,system-power-controller;
469
470 #gpio-cells = <2>;
471 gpio-controller;
472
473 sys-supply = <&vdd_5v0_reg>;
474 vin-sm0-supply = <&sys_reg>;
475 vin-sm1-supply = <&sys_reg>;
476 vin-sm2-supply = <&sys_reg>;
477 vinldo01-supply = <&sm2_reg>;
478 vinldo23-supply = <&sm2_reg>;
479 vinldo4-supply = <&sm2_reg>;
480 vinldo678-supply = <&sm2_reg>;
481 vinldo9-supply = <&sm2_reg>;
482
483 regulators {
484 sys_reg: sys {
485 regulator-name = "vdd_sys";
486 regulator-always-on;
487 };
488
489 sm0 {
490 regulator-name = "vdd_sm0,vdd_core";
491 regulator-min-microvolt = <1300000>;
492 regulator-max-microvolt = <1300000>;
493 regulator-always-on;
494 };
495
496 sm1 {
497 regulator-name = "vdd_sm1,vdd_cpu";
498 regulator-min-microvolt = <1125000>;
499 regulator-max-microvolt = <1125000>;
500 regulator-always-on;
501 };
502
503 sm2_reg: sm2 {
504 regulator-name = "vdd_sm2,vin_ldo*";
505 regulator-min-microvolt = <3700000>;
506 regulator-max-microvolt = <3700000>;
507 regulator-always-on;
508 };
509
510 /* LDO0 is not connected to anything */
511
512 ldo1 {
513 regulator-name = "vdd_ldo1,avdd_pll*";
514 regulator-min-microvolt = <1100000>;
515 regulator-max-microvolt = <1100000>;
516 regulator-always-on;
517 };
518
519 ldo2 {
520 regulator-name = "vdd_ldo2,vdd_rtc";
521 regulator-min-microvolt = <1200000>;
522 regulator-max-microvolt = <1200000>;
523 };
524
525 ldo3 {
526 regulator-name = "vdd_ldo3,avdd_usb*";
527 regulator-min-microvolt = <3300000>;
528 regulator-max-microvolt = <3300000>;
529 regulator-always-on;
530 };
531
532 ldo4 {
533 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
534 regulator-min-microvolt = <1800000>;
535 regulator-max-microvolt = <1800000>;
536 regulator-always-on;
537 };
538
539 ldo5 {
540 regulator-name = "vdd_ldo5,vcore_mmc";
541 regulator-min-microvolt = <2850000>;
542 regulator-max-microvolt = <2850000>;
543 regulator-always-on;
544 };
545
546 ldo6 {
547 regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
548 regulator-min-microvolt = <1800000>;
549 regulator-max-microvolt = <1800000>;
550 };
551
552 hdmi_vdd_reg: ldo7 {
553 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
554 regulator-min-microvolt = <3300000>;
555 regulator-max-microvolt = <3300000>;
556 };
557
558 hdmi_pll_reg: ldo8 {
559 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
560 regulator-min-microvolt = <1800000>;
561 regulator-max-microvolt = <1800000>;
562 };
563
564 ldo9 {
565 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
566 regulator-min-microvolt = <2850000>;
567 regulator-max-microvolt = <2850000>;
568 regulator-always-on;
569 };
570
571 ldo_rtc {
572 regulator-name = "vdd_rtc_out,vdd_cell";
573 regulator-min-microvolt = <3300000>;
574 regulator-max-microvolt = <3300000>;
575 regulator-always-on;
576 };
577 };
578 };
579
580 temperature-sensor@4c {
581 compatible = "onnn,nct1008";
582 reg = <0x4c>;
583 };
3682cc3d 584 };
d376e8d2 585
b7723f3f 586 kbc@7000e200 {
ee7d755a 587 status = "okay";
ce02a71c
SG		 588 nvidia,debounce-delay-ms = <32>;
589 nvidia,repeat-delay-ms = <160>;
590 nvidia,ghost-filter;
591 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
592 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
593 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
594 MATRIX_KEY(0x00, 0x03, KEY_S)
595 MATRIX_KEY(0x00, 0x04, KEY_A)
596 MATRIX_KEY(0x00, 0x05, KEY_Z)
597 MATRIX_KEY(0x00, 0x07, KEY_FN)
598
599 MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA)
600 MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT)
601 MATRIX_KEY(0x02, 0x07, KEY_LEFTALT)
602
603 MATRIX_KEY(0x03, 0x00, KEY_5)
604 MATRIX_KEY(0x03, 0x01, KEY_4)
605 MATRIX_KEY(0x03, 0x02, KEY_R)
606 MATRIX_KEY(0x03, 0x03, KEY_E)
607 MATRIX_KEY(0x03, 0x04, KEY_F)
608 MATRIX_KEY(0x03, 0x05, KEY_D)
609 MATRIX_KEY(0x03, 0x06, KEY_X)
610
611 MATRIX_KEY(0x04, 0x00, KEY_7)
612 MATRIX_KEY(0x04, 0x01, KEY_6)
613 MATRIX_KEY(0x04, 0x02, KEY_T)
614 MATRIX_KEY(0x04, 0x03, KEY_H)
615 MATRIX_KEY(0x04, 0x04, KEY_G)
616 MATRIX_KEY(0x04, 0x05, KEY_V)
617 MATRIX_KEY(0x04, 0x06, KEY_C)
618 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
619
620 MATRIX_KEY(0x05, 0x00, KEY_9)
621 MATRIX_KEY(0x05, 0x01, KEY_8)
622 MATRIX_KEY(0x05, 0x02, KEY_U)
623 MATRIX_KEY(0x05, 0x03, KEY_Y)
624 MATRIX_KEY(0x05, 0x04, KEY_J)
625 MATRIX_KEY(0x05, 0x05, KEY_N)
626 MATRIX_KEY(0x05, 0x06, KEY_B)
627 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
628
629 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
630 MATRIX_KEY(0x06, 0x01, KEY_0)
631 MATRIX_KEY(0x06, 0x02, KEY_O)
632 MATRIX_KEY(0x06, 0x03, KEY_I)
633 MATRIX_KEY(0x06, 0x04, KEY_L)
634 MATRIX_KEY(0x06, 0x05, KEY_K)
635 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
636 MATRIX_KEY(0x06, 0x07, KEY_M)
637
638 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
639 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
640 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
641 MATRIX_KEY(0x07, 0x07, KEY_MENU)
642
643 MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
644 MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
645
646 MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL)
647 MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL)
648
649 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
650 MATRIX_KEY(0x0B, 0x01, KEY_P)
651 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
652 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
653 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
654 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
655
656 MATRIX_KEY(0x0C, 0x00, KEY_F10)
657 MATRIX_KEY(0x0C, 0x01, KEY_F9)
658 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
659 MATRIX_KEY(0x0C, 0x03, KEY_3)
660 MATRIX_KEY(0x0C, 0x04, KEY_2)
661 MATRIX_KEY(0x0C, 0x05, KEY_UP)
662 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
663 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
664
665 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
666 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
667 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
668 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
669 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
670 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
671 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
672
673 MATRIX_KEY(0x0E, 0x00, KEY_F11)
674 MATRIX_KEY(0x0E, 0x01, KEY_F12)
675 MATRIX_KEY(0x0E, 0x02, KEY_F8)
676 MATRIX_KEY(0x0E, 0x03, KEY_Q)
677 MATRIX_KEY(0x0E, 0x04, KEY_F4)
678 MATRIX_KEY(0x0E, 0x05, KEY_F3)
679 MATRIX_KEY(0x0E, 0x06, KEY_1)
680 MATRIX_KEY(0x0E, 0x07, KEY_F7)
681
682 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
683 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
684 MATRIX_KEY(0x0F, 0x02, KEY_F5)
685 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
686 MATRIX_KEY(0x0F, 0x04, KEY_F1)
687 MATRIX_KEY(0x0F, 0x05, KEY_F2)
688 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
689 MATRIX_KEY(0x0F, 0x07, KEY_F6)
690
691 /* Software Handled Function Keys */
692 MATRIX_KEY(0x14, 0x00, KEY_KP7)
693
694 MATRIX_KEY(0x15, 0x00, KEY_KP9)
695 MATRIX_KEY(0x15, 0x01, KEY_KP8)
696 MATRIX_KEY(0x15, 0x02, KEY_KP4)
697 MATRIX_KEY(0x15, 0x04, KEY_KP1)
698
699 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
700 MATRIX_KEY(0x16, 0x02, KEY_KP6)
701 MATRIX_KEY(0x16, 0x03, KEY_KP5)
702 MATRIX_KEY(0x16, 0x04, KEY_KP3)
703 MATRIX_KEY(0x16, 0x05, KEY_KP2)
704 MATRIX_KEY(0x16, 0x07, KEY_KP0)
705
706 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
707 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
708 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
709 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
710
711 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
712
713 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
714 MATRIX_KEY(0x1D, 0x04, KEY_END)
715 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN)
716 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
717 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP)
718
719 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
720 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
721 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
722
723 MATRIX_KEY(0x1F, 0x04, KEY_HELP)>;
724 };
725
726 pmc@7000e400 {
727 nvidia,invert-interrupt;
728 nvidia,suspend-mode = <1>;
729 nvidia,cpu-pwr-good-time = <5000>;
730 nvidia,cpu-pwr-off-time = <5000>;
731 nvidia,core-pwr-good-time = <3845 3845>;
732 nvidia,core-pwr-off-time = <3875>;
733 nvidia,sys-clock-req-active-high;
734 };
735
736 memory-controller@7000f400 {
d376e8d2 737 emc-table@190000 {
ce02a71c 738 reg = <190000>;
d376e8d2 739 compatible = "nvidia,tegra20-emc-table";
ce02a71c
SG		 740 clock-frequency = <190000>;
741 nvidia,emc-registers = <0x0000000c 0x00000026
d376e8d2
SG		 742 0x00000009 0x00000003 0x00000004 0x00000004
743 0x00000002 0x0000000c 0x00000003 0x00000003
744 0x00000002 0x00000001 0x00000004 0x00000005
745 0x00000004 0x00000009 0x0000000d 0x0000059f
746 0x00000000 0x00000003 0x00000003 0x00000003
747 0x00000003 0x00000001 0x0000000b 0x000000c8
748 0x00000003 0x00000007 0x00000004 0x0000000f
749 0x00000002 0x00000000 0x00000000 0x00000002
750 0x00000000 0x00000000 0x00000083 0xa06204ae
751 0x007dc010 0x00000000 0x00000000 0x00000000
ce02a71c 752 0x00000000 0x00000000 0x00000000 0x00000000>;
d376e8d2 753 };
ce02a71c 754
d376e8d2 755 emc-table@380000 {
ce02a71c 756 reg = <380000>;
d376e8d2 757 compatible = "nvidia,tegra20-emc-table";
ce02a71c
SG		 758 clock-frequency = <380000>;
759 nvidia,emc-registers = <0x00000017 0x0000004b
d376e8d2
SG		 760 0x00000012 0x00000006 0x00000004 0x00000005
761 0x00000003 0x0000000c 0x00000006 0x00000006
762 0x00000003 0x00000001 0x00000004 0x00000005
763 0x00000004 0x00000009 0x0000000d 0x00000b5f
764 0x00000000 0x00000003 0x00000003 0x00000006
765 0x00000006 0x00000001 0x00000011 0x000000c8
766 0x00000003 0x0000000e 0x00000007 0x0000000f
767 0x00000002 0x00000000 0x00000000 0x00000002
768 0x00000000 0x00000000 0x00000083 0xe044048b
769 0x007d8010 0x00000000 0x00000000 0x00000000
ce02a71c 770 0x00000000 0x00000000 0x00000000 0x00000000>;
d376e8d2
SG		 771 };
772 };
c3ab91f0 773
b7723f3f 774 usb@c5000000 {
ee7d755a 775 status = "okay";
2b2b50bc 776 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
b7723f3f 777 dr_mode = "otg";
c3ab91f0 778 };
7cedd181 779
ce02a71c
SG		 780 usb-phy@c5000000 {
781 status = "okay";
782 vbus-supply = <&vbus_reg>;
783 dr_mode = "otg";
784 };
785
b7723f3f 786 usb@c5004000 {
6dca554f 787 status = "okay";
ce02a71c
SG		 788 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
789 GPIO_ACTIVE_LOW>;
790 };
791
792 usb-phy@c5004000 {
793 status = "okay";
794 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
795 GPIO_ACTIVE_LOW>;
7cedd181 796 };
77139f51 797
ee7d755a
SG		 798 usb@c5008000 {
799 status = "okay";
800 };
801
ce02a71c
SG		 802 usb-phy@c5008000 {
803 status = "okay";
804 };
805
806 sdhci@c8000000 {
807 status = "okay";
808 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
809 bus-width = <4>;
810 keep-power-in-suspend;
811 };
812
b7723f3f 813 sdhci@c8000400 {
126685ad 814 status = "okay";
2b2b50bc
SG		 815 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
816 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
817 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
126685ad 818 bus-width = <4>;
b7723f3f
AM		 819 };
820
821 sdhci@c8000600 {
126685ad
TW		 822 status = "okay";
823 bus-width = <8>;
ce02a71c
SG		 824 non-removable;
825 };
826
827 backlight: backlight {
828 compatible = "pwm-backlight";
829
830 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
831 power-supply = <&vdd_bl_reg>;
832 pwms = <&pwm 2 5000000>;
833
834 brightness-levels = <0 4 8 16 32 64 128 255>;
835 default-brightness-level = <6>;
77139f51
SG		 836 };
837
ee7d755a
SG		 838 clocks {
839 compatible = "simple-bus";
840 #address-cells = <1>;
841 #size-cells = <0>;
842
843 clk32k_in: clock@0 {
844 compatible = "fixed-clock";
845 reg=<0>;
846 #clock-cells = <0>;
847 clock-frequency = <32768>;
848 };
849 };
850
ce02a71c
SG		 851 gpio-keys {
852 compatible = "gpio-keys";
853
854 power {
855 label = "Power";
856 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
857 linux,code = <KEY_POWER>;
858 gpio-key,wakeup;
859 };
860
861 lid {
862 label = "Lid";
863 gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
864 linux,input-type = <5>; /* EV_SW */
865 linux,code = <0>; /* SW_LID */
866 debounce-interval = <1>;
867 gpio-key,wakeup;
868 };
91c08afe
SG		 869 };
870
ce02a71c 871 panel: panel {
ec550770
SG		 872 compatible = "chunghwa,claa101wa01a", "simple-panel";
873
874 power-supply = <&vdd_pnl_reg>;
875 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
876
877 backlight = <&backlight>;
878 ddc-i2c-bus = <&lvds_ddc>;
77139f51 879 };
ce02a71c
SG		 880
881 regulators {
882 compatible = "simple-bus";
883 #address-cells = <1>;
884 #size-cells = <0>;
885
886 vdd_5v0_reg: regulator@0 {
887 compatible = "regulator-fixed";
888 reg = <0>;
889 regulator-name = "vdd_5v0";
890 regulator-min-microvolt = <5000000>;
891 regulator-max-microvolt = <5000000>;
892 regulator-always-on;
893 };
894
895 regulator@1 {
896 compatible = "regulator-fixed";
897 reg = <1>;
898 regulator-name = "vdd_1v5";
899 regulator-min-microvolt = <1500000>;
900 regulator-max-microvolt = <1500000>;
901 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
902 };
903
904 regulator@2 {
905 compatible = "regulator-fixed";
906 reg = <2>;
907 regulator-name = "vdd_1v2";
908 regulator-min-microvolt = <1200000>;
909 regulator-max-microvolt = <1200000>;
910 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
911 enable-active-high;
912 };
913
914 vbus_reg: regulator@3 {
915 compatible = "regulator-fixed";
916 reg = <3>;
917 regulator-name = "vdd_vbus_wup1";
918 regulator-min-microvolt = <5000000>;
919 regulator-max-microvolt = <5000000>;
920 enable-active-high;
921 gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
922 regulator-always-on;
923 regulator-boot-on;
924 };
925
926 vdd_pnl_reg: regulator@4 {
927 compatible = "regulator-fixed";
928 reg = <4>;
929 regulator-name = "vdd_pnl";
930 regulator-min-microvolt = <2800000>;
931 regulator-max-microvolt = <2800000>;
932 gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
933 enable-active-high;
934 };
935
936 vdd_bl_reg: regulator@5 {
937 compatible = "regulator-fixed";
938 reg = <5>;
939 regulator-name = "vdd_bl";
940 regulator-min-microvolt = <2800000>;
941 regulator-max-microvolt = <2800000>;
942 gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
943 enable-active-high;
944 };
945
946 vdd_hdmi: regulator@6 {
947 compatible = "regulator-fixed";
948 reg = <6>;
949 regulator-name = "VDDIO_HDMI";
950 regulator-min-microvolt = <5000000>;
951 regulator-max-microvolt = <5000000>;
952 gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
953 enable-active-high;
954 vin-supply = <&vdd_5v0_reg>;
955 };
956 };
957
958 sound {
959 compatible = "nvidia,tegra-audio-wm8903-seaboard",
960 "nvidia,tegra-audio-wm8903";
961 nvidia,model = "NVIDIA Tegra Seaboard";
962
963 nvidia,audio-routing =
964 "Headphone Jack", "HPOUTR",
965 "Headphone Jack", "HPOUTL",
966 "Int Spk", "ROP",
967 "Int Spk", "RON",
968 "Int Spk", "LOP",
969 "Int Spk", "LON",
970 "Mic Jack", "MICBIAS",
971 "IN1R", "Mic Jack";
972
973 nvidia,i2s-controller = <&tegra_i2s1>;
974 nvidia,audio-codec = <&wm8903>;
975
976 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
977 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
978
979 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
980 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
981 <&tegra_car TEGRA20_CLK_CDEV1>;
982 clock-names = "pll_a", "pll_a_out0", "mclk";
983 };
6710b5b5 984};
"Das U-Boot" Source Tree