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Commit | Line | Data |
---|---|---|
dd84058d MY |
1 | menu "mpc85xx CPU" |
2 | depends on MPC85xx | |
3 | ||
4 | config SYS_CPU | |
dd84058d MY |
5 | default "mpc85xx" |
6 | ||
7 | choice | |
8 | prompt "Target select" | |
a26cd049 | 9 | optional |
dd84058d MY |
10 | |
11 | config TARGET_SBC8548 | |
12 | bool "Support sbc8548" | |
281ed4c7 | 13 | select ARCH_MPC8548 |
dd84058d MY |
14 | |
15 | config TARGET_SOCRATES | |
16 | bool "Support socrates" | |
25cb74b3 | 17 | select ARCH_MPC8544 |
dd84058d | 18 | |
45a8d117 YS |
19 | config TARGET_B4420QDS |
20 | bool "Support B4420QDS" | |
b41f192b | 21 | select ARCH_B4420 |
45a8d117 YS |
22 | select SUPPORT_SPL |
23 | select PHYS_64BIT | |
24 | ||
dd84058d MY |
25 | config TARGET_B4860QDS |
26 | bool "Support B4860QDS" | |
3006ebc3 | 27 | select ARCH_B4860 |
02627356 | 28 | select SUPPORT_SPL |
bb6b142f | 29 | select PHYS_64BIT |
dd84058d MY |
30 | |
31 | config TARGET_BSC9131RDB | |
32 | bool "Support BSC9131RDB" | |
115d60c0 | 33 | select ARCH_BSC9131 |
02627356 | 34 | select SUPPORT_SPL |
dd84058d MY |
35 | |
36 | config TARGET_BSC9132QDS | |
37 | bool "Support BSC9132QDS" | |
115d60c0 | 38 | select ARCH_BSC9132 |
02627356 | 39 | select SUPPORT_SPL |
dd84058d MY |
40 | |
41 | config TARGET_C29XPCIE | |
42 | bool "Support C29XPCIE" | |
4fd64746 | 43 | select ARCH_C29X |
02627356 | 44 | select SUPPORT_SPL |
cf6bbe4c | 45 | select SUPPORT_TPL |
bb6b142f | 46 | select PHYS_64BIT |
dd84058d MY |
47 | |
48 | config TARGET_P3041DS | |
49 | bool "Support P3041DS" | |
bb6b142f | 50 | select PHYS_64BIT |
5e5fdd2d | 51 | select ARCH_P3041 |
dd84058d MY |
52 | |
53 | config TARGET_P4080DS | |
54 | bool "Support P4080DS" | |
bb6b142f | 55 | select PHYS_64BIT |
e71372cb | 56 | select ARCH_P4080 |
dd84058d MY |
57 | |
58 | config TARGET_P5020DS | |
59 | bool "Support P5020DS" | |
bb6b142f | 60 | select PHYS_64BIT |
cefe11cd | 61 | select ARCH_P5020 |
dd84058d MY |
62 | |
63 | config TARGET_P5040DS | |
64 | bool "Support P5040DS" | |
bb6b142f | 65 | select PHYS_64BIT |
95390360 | 66 | select ARCH_P5040 |
dd84058d MY |
67 | |
68 | config TARGET_MPC8536DS | |
69 | bool "Support MPC8536DS" | |
24ad75ae | 70 | select ARCH_MPC8536 |
d26e34c4 YS |
71 | # Use DDR3 controller with DDR2 DIMMs on this board |
72 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
73 | |
74 | config TARGET_MPC8540ADS | |
75 | bool "Support MPC8540ADS" | |
7f825218 | 76 | select ARCH_MPC8540 |
dd84058d MY |
77 | |
78 | config TARGET_MPC8541CDS | |
79 | bool "Support MPC8541CDS" | |
3aff3082 | 80 | select ARCH_MPC8541 |
dd84058d MY |
81 | |
82 | config TARGET_MPC8544DS | |
83 | bool "Support MPC8544DS" | |
25cb74b3 | 84 | select ARCH_MPC8544 |
dd84058d MY |
85 | |
86 | config TARGET_MPC8548CDS | |
87 | bool "Support MPC8548CDS" | |
281ed4c7 | 88 | select ARCH_MPC8548 |
dd84058d MY |
89 | |
90 | config TARGET_MPC8555CDS | |
91 | bool "Support MPC8555CDS" | |
3c3d8ab5 | 92 | select ARCH_MPC8555 |
dd84058d MY |
93 | |
94 | config TARGET_MPC8560ADS | |
95 | bool "Support MPC8560ADS" | |
99d0a312 | 96 | select ARCH_MPC8560 |
dd84058d MY |
97 | |
98 | config TARGET_MPC8568MDS | |
99 | bool "Support MPC8568MDS" | |
d07c3843 | 100 | select ARCH_MPC8568 |
dd84058d MY |
101 | |
102 | config TARGET_MPC8569MDS | |
103 | bool "Support MPC8569MDS" | |
23b36a7d | 104 | select ARCH_MPC8569 |
dd84058d MY |
105 | |
106 | config TARGET_MPC8572DS | |
107 | bool "Support MPC8572DS" | |
c8f48474 | 108 | select ARCH_MPC8572 |
d26e34c4 YS |
109 | # Use DDR3 controller with DDR2 DIMMs on this board |
110 | select SYS_FSL_DDRC_GEN3 | |
dd84058d | 111 | |
7601686c YS |
112 | config TARGET_P1010RDB_PA |
113 | bool "Support P1010RDB_PA" | |
114 | select ARCH_P1010 | |
115 | select SUPPORT_SPL | |
116 | select SUPPORT_TPL | |
117 | ||
118 | config TARGET_P1010RDB_PB | |
119 | bool "Support P1010RDB_PB" | |
7d5f9f84 | 120 | select ARCH_P1010 |
02627356 | 121 | select SUPPORT_SPL |
cf6bbe4c | 122 | select SUPPORT_TPL |
dd84058d MY |
123 | |
124 | config TARGET_P1022DS | |
125 | bool "Support P1022DS" | |
feb9e25b | 126 | select ARCH_P1022 |
02627356 | 127 | select SUPPORT_SPL |
cf6bbe4c | 128 | select SUPPORT_TPL |
dd84058d MY |
129 | |
130 | config TARGET_P1023RDB | |
131 | bool "Support P1023RDB" | |
9bb1d6bc | 132 | select ARCH_P1023 |
dd84058d | 133 | |
fedae6eb YS |
134 | config TARGET_P1020MBG |
135 | bool "Support P1020MBG-PC" | |
136 | select SUPPORT_SPL | |
137 | select SUPPORT_TPL | |
484fff64 YS |
138 | select ARCH_P1020 |
139 | ||
aa14620c YS |
140 | config TARGET_P1020RDB_PC |
141 | bool "Support P1020RDB-PC" | |
142 | select SUPPORT_SPL | |
143 | select SUPPORT_TPL | |
484fff64 | 144 | select ARCH_P1020 |
aa14620c | 145 | |
f404b66c YS |
146 | config TARGET_P1020RDB_PD |
147 | bool "Support P1020RDB-PD" | |
148 | select SUPPORT_SPL | |
149 | select SUPPORT_TPL | |
484fff64 | 150 | select ARCH_P1020 |
f404b66c | 151 | |
e9bc8a8f YS |
152 | config TARGET_P1020UTM |
153 | bool "Support P1020UTM" | |
154 | select SUPPORT_SPL | |
155 | select SUPPORT_TPL | |
484fff64 | 156 | select ARCH_P1020 |
fedae6eb | 157 | |
da439db3 YS |
158 | config TARGET_P1021RDB |
159 | bool "Support P1021RDB" | |
160 | select SUPPORT_SPL | |
161 | select SUPPORT_TPL | |
a990799d | 162 | select ARCH_P1021 |
da439db3 | 163 | |
4eedabfe YS |
164 | config TARGET_P1024RDB |
165 | bool "Support P1024RDB" | |
166 | select SUPPORT_SPL | |
167 | select SUPPORT_TPL | |
52b6f13d | 168 | select ARCH_P1024 |
4eedabfe | 169 | |
b0c98b4b YS |
170 | config TARGET_P1025RDB |
171 | bool "Support P1025RDB" | |
172 | select SUPPORT_SPL | |
173 | select SUPPORT_TPL | |
4167a67d | 174 | select ARCH_P1025 |
b0c98b4b | 175 | |
8435aa77 YS |
176 | config TARGET_P2020RDB |
177 | bool "Support P2020RDB-PC" | |
178 | select SUPPORT_SPL | |
179 | select SUPPORT_TPL | |
4593637b | 180 | select ARCH_P2020 |
8435aa77 | 181 | |
dd84058d MY |
182 | config TARGET_P1_TWR |
183 | bool "Support p1_twr" | |
4167a67d | 184 | select ARCH_P1025 |
dd84058d | 185 | |
dd84058d MY |
186 | config TARGET_P2041RDB |
187 | bool "Support P2041RDB" | |
ce040c83 | 188 | select ARCH_P2041 |
bb6b142f | 189 | select PHYS_64BIT |
dd84058d MY |
190 | |
191 | config TARGET_QEMU_PPCE500 | |
192 | bool "Support qemu-ppce500" | |
10343403 | 193 | select ARCH_QEMU_E500 |
bb6b142f | 194 | select PHYS_64BIT |
dd84058d | 195 | |
6f53bd47 YS |
196 | config TARGET_T1024QDS |
197 | bool "Support T1024QDS" | |
e5d5f5a8 | 198 | select ARCH_T1024 |
aba80048 | 199 | select SUPPORT_SPL |
bb6b142f | 200 | select PHYS_64BIT |
aba80048 | 201 | |
08c75292 YS |
202 | config TARGET_T1023RDB |
203 | bool "Support T1023RDB" | |
5ff3f41d | 204 | select ARCH_T1023 |
08c75292 YS |
205 | select SUPPORT_SPL |
206 | select PHYS_64BIT | |
207 | ||
208 | config TARGET_T1024RDB | |
209 | bool "Support T1024RDB" | |
e5d5f5a8 | 210 | select ARCH_T1024 |
48c6f328 | 211 | select SUPPORT_SPL |
bb6b142f | 212 | select PHYS_64BIT |
48c6f328 | 213 | |
dd84058d MY |
214 | config TARGET_T1040QDS |
215 | bool "Support T1040QDS" | |
5d737010 | 216 | select ARCH_T1040 |
bb6b142f | 217 | select PHYS_64BIT |
dd84058d | 218 | |
95a809b9 YS |
219 | config TARGET_T1040RDB |
220 | bool "Support T1040RDB" | |
5d737010 | 221 | select ARCH_T1040 |
95a809b9 YS |
222 | select SUPPORT_SPL |
223 | select PHYS_64BIT | |
224 | ||
a016735c YS |
225 | config TARGET_T1040D4RDB |
226 | bool "Support T1040D4RDB" | |
227 | select ARCH_T1040 | |
228 | select SUPPORT_SPL | |
229 | select PHYS_64BIT | |
230 | ||
95a809b9 YS |
231 | config TARGET_T1042RDB |
232 | bool "Support T1042RDB" | |
5449c98a | 233 | select ARCH_T1042 |
02627356 | 234 | select SUPPORT_SPL |
bb6b142f | 235 | select PHYS_64BIT |
dd84058d | 236 | |
319ed24a YS |
237 | config TARGET_T1042D4RDB |
238 | bool "Support T1042D4RDB" | |
239 | select ARCH_T1042 | |
240 | select SUPPORT_SPL | |
241 | select PHYS_64BIT | |
242 | ||
55ed8ae3 YS |
243 | config TARGET_T1042RDB_PI |
244 | bool "Support T1042RDB_PI" | |
245 | select ARCH_T1042 | |
246 | select SUPPORT_SPL | |
247 | select PHYS_64BIT | |
248 | ||
638d5be0 YS |
249 | config TARGET_T2080QDS |
250 | bool "Support T2080QDS" | |
0f3d80e9 | 251 | select ARCH_T2080 |
02627356 | 252 | select SUPPORT_SPL |
bb6b142f | 253 | select PHYS_64BIT |
dd84058d | 254 | |
01671e66 YS |
255 | config TARGET_T2080RDB |
256 | bool "Support T2080RDB" | |
0f3d80e9 | 257 | select ARCH_T2080 |
02627356 | 258 | select SUPPORT_SPL |
bb6b142f | 259 | select PHYS_64BIT |
dd84058d | 260 | |
638d5be0 YS |
261 | config TARGET_T2081QDS |
262 | bool "Support T2081QDS" | |
0f3d80e9 | 263 | select ARCH_T2081 |
638d5be0 YS |
264 | select SUPPORT_SPL |
265 | select PHYS_64BIT | |
266 | ||
9c21d06c YS |
267 | config TARGET_T4160QDS |
268 | bool "Support T4160QDS" | |
652a7bbd | 269 | select ARCH_T4160 |
9c21d06c YS |
270 | select SUPPORT_SPL |
271 | select PHYS_64BIT | |
272 | ||
12ffdb3b YS |
273 | config TARGET_T4160RDB |
274 | bool "Support T4160RDB" | |
652a7bbd | 275 | select ARCH_T4160 |
12ffdb3b YS |
276 | select SUPPORT_SPL |
277 | select PHYS_64BIT | |
278 | ||
dd84058d MY |
279 | config TARGET_T4240QDS |
280 | bool "Support T4240QDS" | |
26bc57da | 281 | select ARCH_T4240 |
02627356 | 282 | select SUPPORT_SPL |
bb6b142f | 283 | select PHYS_64BIT |
dd84058d MY |
284 | |
285 | config TARGET_T4240RDB | |
286 | bool "Support T4240RDB" | |
26bc57da | 287 | select ARCH_T4240 |
373762c3 | 288 | select SUPPORT_SPL |
bb6b142f | 289 | select PHYS_64BIT |
dd84058d MY |
290 | |
291 | config TARGET_CONTROLCENTERD | |
292 | bool "Support controlcenterd" | |
feb9e25b | 293 | select ARCH_P1022 |
dd84058d MY |
294 | |
295 | config TARGET_KMP204X | |
296 | bool "Support kmp204x" | |
ce040c83 | 297 | select ARCH_P2041 |
bb6b142f | 298 | select PHYS_64BIT |
dd84058d | 299 | |
dd84058d MY |
300 | config TARGET_XPEDITE520X |
301 | bool "Support xpedite520x" | |
281ed4c7 | 302 | select ARCH_MPC8548 |
dd84058d MY |
303 | |
304 | config TARGET_XPEDITE537X | |
305 | bool "Support xpedite537x" | |
c8f48474 | 306 | select ARCH_MPC8572 |
d26e34c4 YS |
307 | # Use DDR3 controller with DDR2 DIMMs on this board |
308 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
309 | |
310 | config TARGET_XPEDITE550X | |
311 | bool "Support xpedite550x" | |
4593637b | 312 | select ARCH_P2020 |
dd84058d | 313 | |
8b0044ff OZ |
314 | config TARGET_UCP1020 |
315 | bool "Support uCP1020" | |
484fff64 | 316 | select ARCH_P1020 |
8b0044ff | 317 | |
22a1b99a YS |
318 | config TARGET_CYRUS_P5020 |
319 | bool "Support Varisys Cyrus P5020" | |
320 | select ARCH_P5020 | |
321 | select PHYS_64BIT | |
322 | ||
323 | config TARGET_CYRUS_P5040 | |
324 | bool "Support Varisys Cyrus P5040" | |
325 | select ARCH_P5040 | |
bb6b142f | 326 | select PHYS_64BIT |
87e29878 | 327 | |
dd84058d MY |
328 | endchoice |
329 | ||
b41f192b YS |
330 | config ARCH_B4420 |
331 | bool | |
f8dee360 | 332 | select E500MC |
05cb79a7 | 333 | select FSL_LAW |
d26e34c4 | 334 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 335 | select SYS_FSL_HAS_SEC |
90b80386 | 336 | select SYS_FSL_SEC_BE |
2c2e2c9e | 337 | select SYS_FSL_SEC_COMPAT_4 |
b41f192b | 338 | |
3006ebc3 YS |
339 | config ARCH_B4860 |
340 | bool | |
f8dee360 | 341 | select E500MC |
05cb79a7 | 342 | select FSL_LAW |
d26e34c4 | 343 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 344 | select SYS_FSL_HAS_SEC |
90b80386 | 345 | select SYS_FSL_SEC_BE |
2c2e2c9e | 346 | select SYS_FSL_SEC_COMPAT_4 |
3006ebc3 | 347 | |
115d60c0 YS |
348 | config ARCH_BSC9131 |
349 | bool | |
05cb79a7 | 350 | select FSL_LAW |
d26e34c4 | 351 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 352 | select SYS_FSL_HAS_SEC |
90b80386 | 353 | select SYS_FSL_SEC_BE |
2c2e2c9e | 354 | select SYS_FSL_SEC_COMPAT_4 |
115d60c0 YS |
355 | |
356 | config ARCH_BSC9132 | |
357 | bool | |
05cb79a7 | 358 | select FSL_LAW |
d26e34c4 | 359 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 360 | select SYS_FSL_HAS_SEC |
90b80386 | 361 | select SYS_FSL_SEC_BE |
2c2e2c9e | 362 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 363 | select SYS_PPC_E500_USE_DEBUG_TLB |
115d60c0 | 364 | |
4fd64746 YS |
365 | config ARCH_C29X |
366 | bool | |
05cb79a7 | 367 | select FSL_LAW |
d26e34c4 | 368 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 369 | select SYS_FSL_HAS_SEC |
90b80386 | 370 | select SYS_FSL_SEC_BE |
2c2e2c9e | 371 | select SYS_FSL_SEC_COMPAT_6 |
53c95384 | 372 | select SYS_PPC_E500_USE_DEBUG_TLB |
4fd64746 | 373 | |
24ad75ae YS |
374 | config ARCH_MPC8536 |
375 | bool | |
05cb79a7 | 376 | select FSL_LAW |
d26e34c4 YS |
377 | select SYS_FSL_HAS_DDR2 |
378 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 379 | select SYS_FSL_HAS_SEC |
90b80386 | 380 | select SYS_FSL_SEC_BE |
2c2e2c9e | 381 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 382 | select SYS_PPC_E500_USE_DEBUG_TLB |
24ad75ae | 383 | |
7f825218 YS |
384 | config ARCH_MPC8540 |
385 | bool | |
05cb79a7 | 386 | select FSL_LAW |
d26e34c4 | 387 | select SYS_FSL_HAS_DDR1 |
7f825218 | 388 | |
3aff3082 YS |
389 | config ARCH_MPC8541 |
390 | bool | |
05cb79a7 | 391 | select FSL_LAW |
d26e34c4 | 392 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 393 | select SYS_FSL_HAS_SEC |
90b80386 | 394 | select SYS_FSL_SEC_BE |
2c2e2c9e | 395 | select SYS_FSL_SEC_COMPAT_2 |
3aff3082 | 396 | |
25cb74b3 YS |
397 | config ARCH_MPC8544 |
398 | bool | |
05cb79a7 | 399 | select FSL_LAW |
d26e34c4 | 400 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 401 | select SYS_FSL_HAS_SEC |
90b80386 | 402 | select SYS_FSL_SEC_BE |
2c2e2c9e | 403 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 404 | select SYS_PPC_E500_USE_DEBUG_TLB |
25cb74b3 | 405 | |
281ed4c7 YS |
406 | config ARCH_MPC8548 |
407 | bool | |
05cb79a7 | 408 | select FSL_LAW |
d26e34c4 YS |
409 | select SYS_FSL_HAS_DDR2 |
410 | select SYS_FSL_HAS_DDR1 | |
2c2e2c9e | 411 | select SYS_FSL_HAS_SEC |
90b80386 | 412 | select SYS_FSL_SEC_BE |
2c2e2c9e | 413 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 414 | select SYS_PPC_E500_USE_DEBUG_TLB |
281ed4c7 | 415 | |
3c3d8ab5 YS |
416 | config ARCH_MPC8555 |
417 | bool | |
05cb79a7 | 418 | select FSL_LAW |
d26e34c4 | 419 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 420 | select SYS_FSL_HAS_SEC |
90b80386 | 421 | select SYS_FSL_SEC_BE |
2c2e2c9e | 422 | select SYS_FSL_SEC_COMPAT_2 |
3c3d8ab5 | 423 | |
99d0a312 YS |
424 | config ARCH_MPC8560 |
425 | bool | |
05cb79a7 | 426 | select FSL_LAW |
d26e34c4 | 427 | select SYS_FSL_HAS_DDR1 |
99d0a312 | 428 | |
d07c3843 YS |
429 | config ARCH_MPC8568 |
430 | bool | |
05cb79a7 | 431 | select FSL_LAW |
d26e34c4 | 432 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 433 | select SYS_FSL_HAS_SEC |
90b80386 | 434 | select SYS_FSL_SEC_BE |
2c2e2c9e | 435 | select SYS_FSL_SEC_COMPAT_2 |
d07c3843 | 436 | |
23b36a7d YS |
437 | config ARCH_MPC8569 |
438 | bool | |
05cb79a7 | 439 | select FSL_LAW |
d26e34c4 | 440 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 441 | select SYS_FSL_HAS_SEC |
90b80386 | 442 | select SYS_FSL_SEC_BE |
2c2e2c9e | 443 | select SYS_FSL_SEC_COMPAT_2 |
23b36a7d | 444 | |
c8f48474 YS |
445 | config ARCH_MPC8572 |
446 | bool | |
05cb79a7 | 447 | select FSL_LAW |
d26e34c4 YS |
448 | select SYS_FSL_HAS_DDR2 |
449 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 450 | select SYS_FSL_HAS_SEC |
90b80386 | 451 | select SYS_FSL_SEC_BE |
2c2e2c9e | 452 | select SYS_FSL_SEC_COMPAT_2 |
d26e34c4 | 453 | select SYS_PPC_E500_USE_DEBUG_TLB |
c8f48474 | 454 | |
7d5f9f84 YS |
455 | config ARCH_P1010 |
456 | bool | |
05cb79a7 | 457 | select FSL_LAW |
d26e34c4 | 458 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 459 | select SYS_FSL_HAS_SEC |
90b80386 | 460 | select SYS_FSL_SEC_BE |
2c2e2c9e | 461 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 462 | select SYS_PPC_E500_USE_DEBUG_TLB |
7d5f9f84 | 463 | |
1cdd96f3 YS |
464 | config ARCH_P1011 |
465 | bool | |
05cb79a7 | 466 | select FSL_LAW |
d26e34c4 | 467 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 468 | select SYS_FSL_HAS_SEC |
90b80386 | 469 | select SYS_FSL_SEC_BE |
2c2e2c9e | 470 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 471 | select SYS_PPC_E500_USE_DEBUG_TLB |
1cdd96f3 | 472 | |
484fff64 YS |
473 | config ARCH_P1020 |
474 | bool | |
05cb79a7 | 475 | select FSL_LAW |
d26e34c4 | 476 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 477 | select SYS_FSL_HAS_SEC |
90b80386 | 478 | select SYS_FSL_SEC_BE |
2c2e2c9e | 479 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 480 | select SYS_PPC_E500_USE_DEBUG_TLB |
484fff64 | 481 | |
a990799d YS |
482 | config ARCH_P1021 |
483 | bool | |
05cb79a7 | 484 | select FSL_LAW |
d26e34c4 | 485 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 486 | select SYS_FSL_HAS_SEC |
90b80386 | 487 | select SYS_FSL_SEC_BE |
2c2e2c9e | 488 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 489 | select SYS_PPC_E500_USE_DEBUG_TLB |
a990799d | 490 | |
feb9e25b YS |
491 | config ARCH_P1022 |
492 | bool | |
05cb79a7 | 493 | select FSL_LAW |
d26e34c4 | 494 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 495 | select SYS_FSL_HAS_SEC |
90b80386 | 496 | select SYS_FSL_SEC_BE |
2c2e2c9e | 497 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 498 | select SYS_PPC_E500_USE_DEBUG_TLB |
feb9e25b | 499 | |
9bb1d6bc YS |
500 | config ARCH_P1023 |
501 | bool | |
05cb79a7 | 502 | select FSL_LAW |
d26e34c4 | 503 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 504 | select SYS_FSL_HAS_SEC |
90b80386 | 505 | select SYS_FSL_SEC_BE |
2c2e2c9e | 506 | select SYS_FSL_SEC_COMPAT_4 |
9bb1d6bc | 507 | |
52b6f13d YS |
508 | config ARCH_P1024 |
509 | bool | |
05cb79a7 | 510 | select FSL_LAW |
d26e34c4 | 511 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 512 | select SYS_FSL_HAS_SEC |
90b80386 | 513 | select SYS_FSL_SEC_BE |
2c2e2c9e | 514 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 515 | select SYS_PPC_E500_USE_DEBUG_TLB |
52b6f13d | 516 | |
4167a67d YS |
517 | config ARCH_P1025 |
518 | bool | |
05cb79a7 | 519 | select FSL_LAW |
d26e34c4 | 520 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 521 | select SYS_FSL_HAS_SEC |
90b80386 | 522 | select SYS_FSL_SEC_BE |
2c2e2c9e | 523 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 524 | select SYS_PPC_E500_USE_DEBUG_TLB |
4167a67d | 525 | |
4593637b YS |
526 | config ARCH_P2020 |
527 | bool | |
05cb79a7 | 528 | select FSL_LAW |
d26e34c4 | 529 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 530 | select SYS_FSL_HAS_SEC |
90b80386 | 531 | select SYS_FSL_SEC_BE |
2c2e2c9e | 532 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 533 | select SYS_PPC_E500_USE_DEBUG_TLB |
4593637b | 534 | |
ce040c83 YS |
535 | config ARCH_P2041 |
536 | bool | |
f8dee360 | 537 | select E500MC |
05cb79a7 | 538 | select FSL_LAW |
d26e34c4 | 539 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 540 | select SYS_FSL_HAS_SEC |
90b80386 | 541 | select SYS_FSL_SEC_BE |
2c2e2c9e | 542 | select SYS_FSL_SEC_COMPAT_4 |
ce040c83 | 543 | |
5e5fdd2d YS |
544 | config ARCH_P3041 |
545 | bool | |
f8dee360 | 546 | select E500MC |
05cb79a7 | 547 | select FSL_LAW |
d26e34c4 | 548 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 549 | select SYS_FSL_HAS_SEC |
90b80386 | 550 | select SYS_FSL_SEC_BE |
2c2e2c9e | 551 | select SYS_FSL_SEC_COMPAT_4 |
5e5fdd2d | 552 | |
e71372cb YS |
553 | config ARCH_P4080 |
554 | bool | |
f8dee360 | 555 | select E500MC |
05cb79a7 | 556 | select FSL_LAW |
d26e34c4 | 557 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 558 | select SYS_FSL_HAS_SEC |
90b80386 | 559 | select SYS_FSL_SEC_BE |
2c2e2c9e | 560 | select SYS_FSL_SEC_COMPAT_4 |
e71372cb | 561 | |
cefe11cd YS |
562 | config ARCH_P5020 |
563 | bool | |
f8dee360 | 564 | select E500MC |
05cb79a7 | 565 | select FSL_LAW |
d26e34c4 | 566 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 567 | select SYS_FSL_HAS_SEC |
90b80386 | 568 | select SYS_FSL_SEC_BE |
2c2e2c9e | 569 | select SYS_FSL_SEC_COMPAT_4 |
cefe11cd | 570 | |
95390360 YS |
571 | config ARCH_P5040 |
572 | bool | |
f8dee360 | 573 | select E500MC |
05cb79a7 | 574 | select FSL_LAW |
d26e34c4 | 575 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 576 | select SYS_FSL_HAS_SEC |
90b80386 | 577 | select SYS_FSL_SEC_BE |
2c2e2c9e | 578 | select SYS_FSL_SEC_COMPAT_4 |
95390360 | 579 | |
10343403 YS |
580 | config ARCH_QEMU_E500 |
581 | bool | |
582 | ||
5ff3f41d YS |
583 | config ARCH_T1023 |
584 | bool | |
f8dee360 | 585 | select E500MC |
05cb79a7 | 586 | select FSL_LAW |
d26e34c4 YS |
587 | select SYS_FSL_HAS_DDR3 |
588 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 589 | select SYS_FSL_HAS_SEC |
90b80386 | 590 | select SYS_FSL_SEC_BE |
2c2e2c9e | 591 | select SYS_FSL_SEC_COMPAT_5 |
5ff3f41d | 592 | |
e5d5f5a8 YS |
593 | config ARCH_T1024 |
594 | bool | |
f8dee360 | 595 | select E500MC |
05cb79a7 | 596 | select FSL_LAW |
d26e34c4 YS |
597 | select SYS_FSL_HAS_DDR3 |
598 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 599 | select SYS_FSL_HAS_SEC |
90b80386 | 600 | select SYS_FSL_SEC_BE |
2c2e2c9e | 601 | select SYS_FSL_SEC_COMPAT_5 |
e5d5f5a8 | 602 | |
5d737010 YS |
603 | config ARCH_T1040 |
604 | bool | |
f8dee360 | 605 | select E500MC |
05cb79a7 | 606 | select FSL_LAW |
d26e34c4 YS |
607 | select SYS_FSL_HAS_DDR3 |
608 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 609 | select SYS_FSL_HAS_SEC |
90b80386 | 610 | select SYS_FSL_SEC_BE |
2c2e2c9e | 611 | select SYS_FSL_SEC_COMPAT_5 |
5d737010 | 612 | |
5449c98a YS |
613 | config ARCH_T1042 |
614 | bool | |
f8dee360 | 615 | select E500MC |
05cb79a7 | 616 | select FSL_LAW |
d26e34c4 YS |
617 | select SYS_FSL_HAS_DDR3 |
618 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 619 | select SYS_FSL_HAS_SEC |
90b80386 | 620 | select SYS_FSL_SEC_BE |
2c2e2c9e | 621 | select SYS_FSL_SEC_COMPAT_5 |
5449c98a | 622 | |
0f3d80e9 YS |
623 | config ARCH_T2080 |
624 | bool | |
f8dee360 | 625 | select E500MC |
05cb79a7 | 626 | select FSL_LAW |
d26e34c4 | 627 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 628 | select SYS_FSL_HAS_SEC |
90b80386 | 629 | select SYS_FSL_SEC_BE |
2c2e2c9e | 630 | select SYS_FSL_SEC_COMPAT_4 |
0f3d80e9 YS |
631 | |
632 | config ARCH_T2081 | |
633 | bool | |
f8dee360 | 634 | select E500MC |
05cb79a7 | 635 | select FSL_LAW |
d26e34c4 | 636 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 637 | select SYS_FSL_HAS_SEC |
90b80386 | 638 | select SYS_FSL_SEC_BE |
2c2e2c9e | 639 | select SYS_FSL_SEC_COMPAT_4 |
0f3d80e9 | 640 | |
652a7bbd YS |
641 | config ARCH_T4160 |
642 | bool | |
f8dee360 | 643 | select E500MC |
05cb79a7 | 644 | select FSL_LAW |
d26e34c4 | 645 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 646 | select SYS_FSL_HAS_SEC |
90b80386 | 647 | select SYS_FSL_SEC_BE |
2c2e2c9e | 648 | select SYS_FSL_SEC_COMPAT_4 |
652a7bbd | 649 | |
26bc57da YS |
650 | config ARCH_T4240 |
651 | bool | |
f8dee360 | 652 | select E500MC |
05cb79a7 | 653 | select FSL_LAW |
d26e34c4 | 654 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 655 | select SYS_FSL_HAS_SEC |
90b80386 | 656 | select SYS_FSL_SEC_BE |
2c2e2c9e | 657 | select SYS_FSL_SEC_COMPAT_4 |
05cb79a7 | 658 | |
f8dee360 YS |
659 | config BOOKE |
660 | bool | |
661 | default y | |
662 | ||
663 | config E500 | |
664 | bool | |
665 | default y | |
666 | help | |
667 | Enable PowerPC E500 cores, including e500v1, e500v2, e500mc | |
668 | ||
669 | config E500MC | |
670 | bool | |
671 | help | |
672 | Enble PowerPC E500MC core | |
673 | ||
05cb79a7 YS |
674 | config FSL_LAW |
675 | bool | |
676 | help | |
677 | Use Freescale common code for Local Access Window | |
26bc57da | 678 | |
c6e6bda3 YS |
679 | config SECURE_BOOT |
680 | bool "Secure Boot" | |
681 | help | |
682 | Enable Freescale Secure Boot feature. Normally selected | |
683 | by defconfig. If unsure, do not change. | |
684 | ||
3f82b56d YS |
685 | config MAX_CPUS |
686 | int "Maximum number of CPUs permitted for MPC85xx" | |
687 | default 12 if ARCH_T4240 | |
688 | default 8 if ARCH_P4080 || \ | |
689 | ARCH_T4160 | |
690 | default 4 if ARCH_B4860 || \ | |
691 | ARCH_P2041 || \ | |
692 | ARCH_P3041 || \ | |
693 | ARCH_P5040 || \ | |
694 | ARCH_T1040 || \ | |
695 | ARCH_T1042 || \ | |
696 | ARCH_T2080 || \ | |
697 | ARCH_T2081 | |
698 | default 2 if ARCH_B4420 || \ | |
699 | ARCH_BSC9132 || \ | |
700 | ARCH_MPC8572 || \ | |
701 | ARCH_P1020 || \ | |
702 | ARCH_P1021 || \ | |
703 | ARCH_P1022 || \ | |
704 | ARCH_P1023 || \ | |
705 | ARCH_P1024 || \ | |
706 | ARCH_P1025 || \ | |
707 | ARCH_P2020 || \ | |
708 | ARCH_P5020 || \ | |
3f82b56d YS |
709 | ARCH_T1023 || \ |
710 | ARCH_T1024 | |
711 | default 1 | |
712 | help | |
713 | Set this number to the maximum number of possible CPUs in the SoC. | |
714 | SoCs may have multiple clusters with each cluster may have multiple | |
715 | ports. If some ports are reserved but higher ports are used for | |
716 | cores, count the reserved ports. This will allocate enough memory | |
717 | in spin table to properly handle all cores. | |
718 | ||
830fc1bf YS |
719 | config SYS_CCSRBAR_DEFAULT |
720 | hex "Default CCSRBAR address" | |
721 | default 0xff700000 if ARCH_BSC9131 || \ | |
722 | ARCH_BSC9132 || \ | |
723 | ARCH_C29X || \ | |
724 | ARCH_MPC8536 || \ | |
725 | ARCH_MPC8540 || \ | |
726 | ARCH_MPC8541 || \ | |
727 | ARCH_MPC8544 || \ | |
728 | ARCH_MPC8548 || \ | |
729 | ARCH_MPC8555 || \ | |
730 | ARCH_MPC8560 || \ | |
731 | ARCH_MPC8568 || \ | |
732 | ARCH_MPC8569 || \ | |
733 | ARCH_MPC8572 || \ | |
734 | ARCH_P1010 || \ | |
735 | ARCH_P1011 || \ | |
736 | ARCH_P1020 || \ | |
737 | ARCH_P1021 || \ | |
738 | ARCH_P1022 || \ | |
739 | ARCH_P1024 || \ | |
740 | ARCH_P1025 || \ | |
741 | ARCH_P2020 | |
742 | default 0xff600000 if ARCH_P1023 | |
743 | default 0xfe000000 if ARCH_B4420 || \ | |
744 | ARCH_B4860 || \ | |
745 | ARCH_P2041 || \ | |
746 | ARCH_P3041 || \ | |
747 | ARCH_P4080 || \ | |
748 | ARCH_P5020 || \ | |
749 | ARCH_P5040 || \ | |
830fc1bf YS |
750 | ARCH_T1023 || \ |
751 | ARCH_T1024 || \ | |
752 | ARCH_T1040 || \ | |
753 | ARCH_T1042 || \ | |
754 | ARCH_T2080 || \ | |
755 | ARCH_T2081 || \ | |
756 | ARCH_T4160 || \ | |
757 | ARCH_T4240 | |
758 | default 0xe0000000 if ARCH_QEMU_E500 | |
759 | help | |
760 | Default value of CCSRBAR comes from power-on-reset. It | |
761 | is fixed on each SoC. Some SoCs can have different value | |
762 | if changed by pre-boot regime. The value here must match | |
763 | the current value in SoC. If not sure, do not change. | |
764 | ||
8303acbc YS |
765 | config SYS_FSL_NUM_LAWS |
766 | int "Number of local access windows" | |
767 | depends on FSL_LAW | |
768 | default 32 if ARCH_B4420 || \ | |
769 | ARCH_B4860 || \ | |
770 | ARCH_P2041 || \ | |
771 | ARCH_P3041 || \ | |
772 | ARCH_P4080 || \ | |
773 | ARCH_P5020 || \ | |
774 | ARCH_P5040 || \ | |
775 | ARCH_T2080 || \ | |
776 | ARCH_T2081 || \ | |
777 | ARCH_T4160 || \ | |
778 | ARCH_T4240 | |
08a37fd1 | 779 | default 16 if ARCH_T1023 || \ |
8303acbc YS |
780 | ARCH_T1024 || \ |
781 | ARCH_T1040 || \ | |
782 | ARCH_T1042 | |
783 | default 12 if ARCH_BSC9131 || \ | |
784 | ARCH_BSC9132 || \ | |
785 | ARCH_C29X || \ | |
786 | ARCH_MPC8536 || \ | |
787 | ARCH_MPC8572 || \ | |
788 | ARCH_P1010 || \ | |
789 | ARCH_P1011 || \ | |
790 | ARCH_P1020 || \ | |
791 | ARCH_P1021 || \ | |
792 | ARCH_P1022 || \ | |
793 | ARCH_P1023 || \ | |
794 | ARCH_P1024 || \ | |
795 | ARCH_P1025 || \ | |
796 | ARCH_P2020 | |
797 | default 10 if ARCH_MPC8544 || \ | |
798 | ARCH_MPC8548 || \ | |
799 | ARCH_MPC8568 || \ | |
800 | ARCH_MPC8569 | |
801 | default 8 if ARCH_MPC8540 || \ | |
802 | ARCH_MPC8541 || \ | |
803 | ARCH_MPC8555 || \ | |
804 | ARCH_MPC8560 | |
805 | help | |
806 | Number of local access windows. This is fixed per SoC. | |
807 | If not sure, do not change. | |
808 | ||
26e79b65 YS |
809 | config SYS_NUM_TLBCAMS |
810 | int "Number of TLB CAM entries" | |
811 | default 64 if E500MC | |
812 | default 16 | |
813 | help | |
814 | Number of TLB CAM entries for Book-E chips. 64 for E500MC, | |
815 | 16 for other E500 SoCs. | |
816 | ||
53c95384 YS |
817 | config SYS_PPC_E500_USE_DEBUG_TLB |
818 | bool | |
819 | ||
820 | config SYS_PPC_E500_DEBUG_TLB | |
821 | int "Temporary TLB entry for external debugger" | |
822 | depends on SYS_PPC_E500_USE_DEBUG_TLB | |
823 | default 0 if ARCH_MPC8544 || ARCH_MPC8548 | |
824 | default 1 if ARCH_MPC8536 | |
825 | default 2 if ARCH_MPC8572 || \ | |
826 | ARCH_P1011 || \ | |
827 | ARCH_P1020 || \ | |
828 | ARCH_P1021 || \ | |
829 | ARCH_P1022 || \ | |
830 | ARCH_P1024 || \ | |
831 | ARCH_P1025 || \ | |
832 | ARCH_P2020 | |
833 | default 3 if ARCH_P1010 || \ | |
834 | ARCH_BSC9132 || \ | |
835 | ARCH_C29X | |
836 | help | |
837 | Select a temporary TLB entry to be used during boot to work | |
838 | around limitations in e500v1 and e500v2 external debugger | |
839 | support. This reduces the portions of the boot code where | |
840 | breakpoints and single stepping do not work. The value of this | |
841 | symbol should be set to the TLB1 entry to be used for this | |
842 | purpose. If unsure, do not change. | |
843 | ||
dd84058d MY |
844 | source "board/freescale/b4860qds/Kconfig" |
845 | source "board/freescale/bsc9131rdb/Kconfig" | |
846 | source "board/freescale/bsc9132qds/Kconfig" | |
847 | source "board/freescale/c29xpcie/Kconfig" | |
848 | source "board/freescale/corenet_ds/Kconfig" | |
849 | source "board/freescale/mpc8536ds/Kconfig" | |
850 | source "board/freescale/mpc8540ads/Kconfig" | |
851 | source "board/freescale/mpc8541cds/Kconfig" | |
852 | source "board/freescale/mpc8544ds/Kconfig" | |
853 | source "board/freescale/mpc8548cds/Kconfig" | |
854 | source "board/freescale/mpc8555cds/Kconfig" | |
855 | source "board/freescale/mpc8560ads/Kconfig" | |
856 | source "board/freescale/mpc8568mds/Kconfig" | |
857 | source "board/freescale/mpc8569mds/Kconfig" | |
858 | source "board/freescale/mpc8572ds/Kconfig" | |
859 | source "board/freescale/p1010rdb/Kconfig" | |
860 | source "board/freescale/p1022ds/Kconfig" | |
861 | source "board/freescale/p1023rdb/Kconfig" | |
dd84058d MY |
862 | source "board/freescale/p1_p2_rdb_pc/Kconfig" |
863 | source "board/freescale/p1_twr/Kconfig" | |
dd84058d MY |
864 | source "board/freescale/p2041rdb/Kconfig" |
865 | source "board/freescale/qemu-ppce500/Kconfig" | |
aba80048 | 866 | source "board/freescale/t102xqds/Kconfig" |
48c6f328 | 867 | source "board/freescale/t102xrdb/Kconfig" |
dd84058d MY |
868 | source "board/freescale/t1040qds/Kconfig" |
869 | source "board/freescale/t104xrdb/Kconfig" | |
870 | source "board/freescale/t208xqds/Kconfig" | |
871 | source "board/freescale/t208xrdb/Kconfig" | |
872 | source "board/freescale/t4qds/Kconfig" | |
873 | source "board/freescale/t4rdb/Kconfig" | |
874 | source "board/gdsys/p1022/Kconfig" | |
875 | source "board/keymile/kmp204x/Kconfig" | |
876 | source "board/sbc8548/Kconfig" | |
877 | source "board/socrates/Kconfig" | |
87e29878 | 878 | source "board/varisys/cyrus/Kconfig" |
dd84058d MY |
879 | source "board/xes/xpedite520x/Kconfig" |
880 | source "board/xes/xpedite537x/Kconfig" | |
881 | source "board/xes/xpedite550x/Kconfig" | |
8b0044ff | 882 | source "board/Arcturus/ucp1020/Kconfig" |
dd84058d MY |
883 | |
884 | endmenu |