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Commit | Line | Data |
---|---|---|
dd84058d MY |
1 | menu "mpc85xx CPU" |
2 | depends on MPC85xx | |
3 | ||
4 | config SYS_CPU | |
dd84058d MY |
5 | default "mpc85xx" |
6 | ||
7 | choice | |
8 | prompt "Target select" | |
a26cd049 | 9 | optional |
dd84058d MY |
10 | |
11 | config TARGET_SBC8548 | |
12 | bool "Support sbc8548" | |
281ed4c7 | 13 | select ARCH_MPC8548 |
dd84058d MY |
14 | |
15 | config TARGET_SOCRATES | |
16 | bool "Support socrates" | |
25cb74b3 | 17 | select ARCH_MPC8544 |
dd84058d | 18 | |
45a8d117 YS |
19 | config TARGET_B4420QDS |
20 | bool "Support B4420QDS" | |
b41f192b | 21 | select ARCH_B4420 |
45a8d117 YS |
22 | select SUPPORT_SPL |
23 | select PHYS_64BIT | |
24 | ||
dd84058d MY |
25 | config TARGET_B4860QDS |
26 | bool "Support B4860QDS" | |
3006ebc3 | 27 | select ARCH_B4860 |
02627356 | 28 | select SUPPORT_SPL |
bb6b142f | 29 | select PHYS_64BIT |
dd84058d MY |
30 | |
31 | config TARGET_BSC9131RDB | |
32 | bool "Support BSC9131RDB" | |
115d60c0 | 33 | select ARCH_BSC9131 |
02627356 | 34 | select SUPPORT_SPL |
dd84058d MY |
35 | |
36 | config TARGET_BSC9132QDS | |
37 | bool "Support BSC9132QDS" | |
115d60c0 | 38 | select ARCH_BSC9132 |
02627356 | 39 | select SUPPORT_SPL |
dd84058d MY |
40 | |
41 | config TARGET_C29XPCIE | |
42 | bool "Support C29XPCIE" | |
4fd64746 | 43 | select ARCH_C29X |
02627356 | 44 | select SUPPORT_SPL |
cf6bbe4c | 45 | select SUPPORT_TPL |
bb6b142f | 46 | select PHYS_64BIT |
dd84058d MY |
47 | |
48 | config TARGET_P3041DS | |
49 | bool "Support P3041DS" | |
bb6b142f | 50 | select PHYS_64BIT |
5e5fdd2d | 51 | select ARCH_P3041 |
dd84058d MY |
52 | |
53 | config TARGET_P4080DS | |
54 | bool "Support P4080DS" | |
bb6b142f | 55 | select PHYS_64BIT |
e71372cb | 56 | select ARCH_P4080 |
dd84058d MY |
57 | |
58 | config TARGET_P5020DS | |
59 | bool "Support P5020DS" | |
bb6b142f | 60 | select PHYS_64BIT |
cefe11cd | 61 | select ARCH_P5020 |
dd84058d MY |
62 | |
63 | config TARGET_P5040DS | |
64 | bool "Support P5040DS" | |
bb6b142f | 65 | select PHYS_64BIT |
95390360 | 66 | select ARCH_P5040 |
dd84058d MY |
67 | |
68 | config TARGET_MPC8536DS | |
69 | bool "Support MPC8536DS" | |
24ad75ae | 70 | select ARCH_MPC8536 |
d26e34c4 YS |
71 | # Use DDR3 controller with DDR2 DIMMs on this board |
72 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
73 | |
74 | config TARGET_MPC8540ADS | |
75 | bool "Support MPC8540ADS" | |
7f825218 | 76 | select ARCH_MPC8540 |
dd84058d MY |
77 | |
78 | config TARGET_MPC8541CDS | |
79 | bool "Support MPC8541CDS" | |
3aff3082 | 80 | select ARCH_MPC8541 |
dd84058d MY |
81 | |
82 | config TARGET_MPC8544DS | |
83 | bool "Support MPC8544DS" | |
25cb74b3 | 84 | select ARCH_MPC8544 |
dd84058d MY |
85 | |
86 | config TARGET_MPC8548CDS | |
87 | bool "Support MPC8548CDS" | |
281ed4c7 | 88 | select ARCH_MPC8548 |
dd84058d MY |
89 | |
90 | config TARGET_MPC8555CDS | |
91 | bool "Support MPC8555CDS" | |
3c3d8ab5 | 92 | select ARCH_MPC8555 |
dd84058d MY |
93 | |
94 | config TARGET_MPC8560ADS | |
95 | bool "Support MPC8560ADS" | |
99d0a312 | 96 | select ARCH_MPC8560 |
dd84058d MY |
97 | |
98 | config TARGET_MPC8568MDS | |
99 | bool "Support MPC8568MDS" | |
d07c3843 | 100 | select ARCH_MPC8568 |
dd84058d MY |
101 | |
102 | config TARGET_MPC8569MDS | |
103 | bool "Support MPC8569MDS" | |
23b36a7d | 104 | select ARCH_MPC8569 |
dd84058d MY |
105 | |
106 | config TARGET_MPC8572DS | |
107 | bool "Support MPC8572DS" | |
c8f48474 | 108 | select ARCH_MPC8572 |
d26e34c4 YS |
109 | # Use DDR3 controller with DDR2 DIMMs on this board |
110 | select SYS_FSL_DDRC_GEN3 | |
dd84058d | 111 | |
7601686c YS |
112 | config TARGET_P1010RDB_PA |
113 | bool "Support P1010RDB_PA" | |
114 | select ARCH_P1010 | |
115 | select SUPPORT_SPL | |
116 | select SUPPORT_TPL | |
117 | ||
118 | config TARGET_P1010RDB_PB | |
119 | bool "Support P1010RDB_PB" | |
7d5f9f84 | 120 | select ARCH_P1010 |
02627356 | 121 | select SUPPORT_SPL |
cf6bbe4c | 122 | select SUPPORT_TPL |
dd84058d MY |
123 | |
124 | config TARGET_P1022DS | |
125 | bool "Support P1022DS" | |
feb9e25b | 126 | select ARCH_P1022 |
02627356 | 127 | select SUPPORT_SPL |
cf6bbe4c | 128 | select SUPPORT_TPL |
dd84058d MY |
129 | |
130 | config TARGET_P1023RDB | |
131 | bool "Support P1023RDB" | |
9bb1d6bc | 132 | select ARCH_P1023 |
dd84058d | 133 | |
fedae6eb YS |
134 | config TARGET_P1020MBG |
135 | bool "Support P1020MBG-PC" | |
136 | select SUPPORT_SPL | |
137 | select SUPPORT_TPL | |
484fff64 YS |
138 | select ARCH_P1020 |
139 | ||
aa14620c YS |
140 | config TARGET_P1020RDB_PC |
141 | bool "Support P1020RDB-PC" | |
142 | select SUPPORT_SPL | |
143 | select SUPPORT_TPL | |
484fff64 | 144 | select ARCH_P1020 |
aa14620c | 145 | |
f404b66c YS |
146 | config TARGET_P1020RDB_PD |
147 | bool "Support P1020RDB-PD" | |
148 | select SUPPORT_SPL | |
149 | select SUPPORT_TPL | |
484fff64 | 150 | select ARCH_P1020 |
f404b66c | 151 | |
e9bc8a8f YS |
152 | config TARGET_P1020UTM |
153 | bool "Support P1020UTM" | |
154 | select SUPPORT_SPL | |
155 | select SUPPORT_TPL | |
484fff64 | 156 | select ARCH_P1020 |
fedae6eb | 157 | |
da439db3 YS |
158 | config TARGET_P1021RDB |
159 | bool "Support P1021RDB" | |
160 | select SUPPORT_SPL | |
161 | select SUPPORT_TPL | |
a990799d | 162 | select ARCH_P1021 |
da439db3 | 163 | |
4eedabfe YS |
164 | config TARGET_P1024RDB |
165 | bool "Support P1024RDB" | |
166 | select SUPPORT_SPL | |
167 | select SUPPORT_TPL | |
52b6f13d | 168 | select ARCH_P1024 |
4eedabfe | 169 | |
b0c98b4b YS |
170 | config TARGET_P1025RDB |
171 | bool "Support P1025RDB" | |
172 | select SUPPORT_SPL | |
173 | select SUPPORT_TPL | |
4167a67d | 174 | select ARCH_P1025 |
b0c98b4b | 175 | |
8435aa77 YS |
176 | config TARGET_P2020RDB |
177 | bool "Support P2020RDB-PC" | |
178 | select SUPPORT_SPL | |
179 | select SUPPORT_TPL | |
4593637b | 180 | select ARCH_P2020 |
8435aa77 | 181 | |
dd84058d MY |
182 | config TARGET_P1_TWR |
183 | bool "Support p1_twr" | |
4167a67d | 184 | select ARCH_P1025 |
dd84058d | 185 | |
dd84058d MY |
186 | config TARGET_P2041RDB |
187 | bool "Support P2041RDB" | |
ce040c83 | 188 | select ARCH_P2041 |
bb6b142f | 189 | select PHYS_64BIT |
dd84058d MY |
190 | |
191 | config TARGET_QEMU_PPCE500 | |
192 | bool "Support qemu-ppce500" | |
10343403 | 193 | select ARCH_QEMU_E500 |
bb6b142f | 194 | select PHYS_64BIT |
dd84058d | 195 | |
6f53bd47 YS |
196 | config TARGET_T1024QDS |
197 | bool "Support T1024QDS" | |
e5d5f5a8 | 198 | select ARCH_T1024 |
aba80048 | 199 | select SUPPORT_SPL |
bb6b142f | 200 | select PHYS_64BIT |
aba80048 | 201 | |
08c75292 YS |
202 | config TARGET_T1023RDB |
203 | bool "Support T1023RDB" | |
5ff3f41d | 204 | select ARCH_T1023 |
08c75292 YS |
205 | select SUPPORT_SPL |
206 | select PHYS_64BIT | |
207 | ||
208 | config TARGET_T1024RDB | |
209 | bool "Support T1024RDB" | |
e5d5f5a8 | 210 | select ARCH_T1024 |
48c6f328 | 211 | select SUPPORT_SPL |
bb6b142f | 212 | select PHYS_64BIT |
48c6f328 | 213 | |
dd84058d MY |
214 | config TARGET_T1040QDS |
215 | bool "Support T1040QDS" | |
5d737010 | 216 | select ARCH_T1040 |
bb6b142f | 217 | select PHYS_64BIT |
dd84058d | 218 | |
95a809b9 YS |
219 | config TARGET_T1040RDB |
220 | bool "Support T1040RDB" | |
5d737010 | 221 | select ARCH_T1040 |
95a809b9 YS |
222 | select SUPPORT_SPL |
223 | select PHYS_64BIT | |
224 | ||
a016735c YS |
225 | config TARGET_T1040D4RDB |
226 | bool "Support T1040D4RDB" | |
227 | select ARCH_T1040 | |
228 | select SUPPORT_SPL | |
229 | select PHYS_64BIT | |
230 | ||
95a809b9 YS |
231 | config TARGET_T1042RDB |
232 | bool "Support T1042RDB" | |
5449c98a | 233 | select ARCH_T1042 |
02627356 | 234 | select SUPPORT_SPL |
bb6b142f | 235 | select PHYS_64BIT |
dd84058d | 236 | |
319ed24a YS |
237 | config TARGET_T1042D4RDB |
238 | bool "Support T1042D4RDB" | |
239 | select ARCH_T1042 | |
240 | select SUPPORT_SPL | |
241 | select PHYS_64BIT | |
242 | ||
55ed8ae3 YS |
243 | config TARGET_T1042RDB_PI |
244 | bool "Support T1042RDB_PI" | |
245 | select ARCH_T1042 | |
246 | select SUPPORT_SPL | |
247 | select PHYS_64BIT | |
248 | ||
638d5be0 YS |
249 | config TARGET_T2080QDS |
250 | bool "Support T2080QDS" | |
0f3d80e9 | 251 | select ARCH_T2080 |
02627356 | 252 | select SUPPORT_SPL |
bb6b142f | 253 | select PHYS_64BIT |
dd84058d | 254 | |
01671e66 YS |
255 | config TARGET_T2080RDB |
256 | bool "Support T2080RDB" | |
0f3d80e9 | 257 | select ARCH_T2080 |
02627356 | 258 | select SUPPORT_SPL |
bb6b142f | 259 | select PHYS_64BIT |
dd84058d | 260 | |
638d5be0 YS |
261 | config TARGET_T2081QDS |
262 | bool "Support T2081QDS" | |
0f3d80e9 | 263 | select ARCH_T2081 |
638d5be0 YS |
264 | select SUPPORT_SPL |
265 | select PHYS_64BIT | |
266 | ||
9c21d06c YS |
267 | config TARGET_T4160QDS |
268 | bool "Support T4160QDS" | |
652a7bbd | 269 | select ARCH_T4160 |
9c21d06c YS |
270 | select SUPPORT_SPL |
271 | select PHYS_64BIT | |
272 | ||
12ffdb3b YS |
273 | config TARGET_T4160RDB |
274 | bool "Support T4160RDB" | |
652a7bbd | 275 | select ARCH_T4160 |
12ffdb3b YS |
276 | select SUPPORT_SPL |
277 | select PHYS_64BIT | |
278 | ||
dd84058d MY |
279 | config TARGET_T4240QDS |
280 | bool "Support T4240QDS" | |
26bc57da | 281 | select ARCH_T4240 |
02627356 | 282 | select SUPPORT_SPL |
bb6b142f | 283 | select PHYS_64BIT |
dd84058d MY |
284 | |
285 | config TARGET_T4240RDB | |
286 | bool "Support T4240RDB" | |
26bc57da | 287 | select ARCH_T4240 |
373762c3 | 288 | select SUPPORT_SPL |
bb6b142f | 289 | select PHYS_64BIT |
dd84058d MY |
290 | |
291 | config TARGET_CONTROLCENTERD | |
292 | bool "Support controlcenterd" | |
feb9e25b | 293 | select ARCH_P1022 |
dd84058d MY |
294 | |
295 | config TARGET_KMP204X | |
296 | bool "Support kmp204x" | |
ce040c83 | 297 | select ARCH_P2041 |
bb6b142f | 298 | select PHYS_64BIT |
dd84058d | 299 | |
dd84058d MY |
300 | config TARGET_XPEDITE520X |
301 | bool "Support xpedite520x" | |
281ed4c7 | 302 | select ARCH_MPC8548 |
dd84058d MY |
303 | |
304 | config TARGET_XPEDITE537X | |
305 | bool "Support xpedite537x" | |
c8f48474 | 306 | select ARCH_MPC8572 |
d26e34c4 YS |
307 | # Use DDR3 controller with DDR2 DIMMs on this board |
308 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
309 | |
310 | config TARGET_XPEDITE550X | |
311 | bool "Support xpedite550x" | |
4593637b | 312 | select ARCH_P2020 |
dd84058d | 313 | |
8b0044ff OZ |
314 | config TARGET_UCP1020 |
315 | bool "Support uCP1020" | |
484fff64 | 316 | select ARCH_P1020 |
8b0044ff | 317 | |
22a1b99a YS |
318 | config TARGET_CYRUS_P5020 |
319 | bool "Support Varisys Cyrus P5020" | |
320 | select ARCH_P5020 | |
321 | select PHYS_64BIT | |
322 | ||
323 | config TARGET_CYRUS_P5040 | |
324 | bool "Support Varisys Cyrus P5040" | |
325 | select ARCH_P5040 | |
bb6b142f | 326 | select PHYS_64BIT |
87e29878 | 327 | |
dd84058d MY |
328 | endchoice |
329 | ||
b41f192b YS |
330 | config ARCH_B4420 |
331 | bool | |
f8dee360 | 332 | select E500MC |
05cb79a7 | 333 | select FSL_LAW |
22120f11 | 334 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
335 | select SYS_FSL_ERRATUM_A004477 |
336 | select SYS_FSL_ERRATUM_A005871 | |
337 | select SYS_FSL_ERRATUM_A006379 | |
338 | select SYS_FSL_ERRATUM_A006384 | |
339 | select SYS_FSL_ERRATUM_A006475 | |
340 | select SYS_FSL_ERRATUM_A006593 | |
341 | select SYS_FSL_ERRATUM_A007075 | |
342 | select SYS_FSL_ERRATUM_A007186 | |
343 | select SYS_FSL_ERRATUM_A007212 | |
344 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 345 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 346 | select SYS_FSL_HAS_SEC |
90b80386 | 347 | select SYS_FSL_SEC_BE |
2c2e2c9e | 348 | select SYS_FSL_SEC_COMPAT_4 |
b41f192b | 349 | |
3006ebc3 YS |
350 | config ARCH_B4860 |
351 | bool | |
f8dee360 | 352 | select E500MC |
05cb79a7 | 353 | select FSL_LAW |
22120f11 | 354 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
355 | select SYS_FSL_ERRATUM_A004477 |
356 | select SYS_FSL_ERRATUM_A005871 | |
357 | select SYS_FSL_ERRATUM_A006379 | |
358 | select SYS_FSL_ERRATUM_A006384 | |
359 | select SYS_FSL_ERRATUM_A006475 | |
360 | select SYS_FSL_ERRATUM_A006593 | |
361 | select SYS_FSL_ERRATUM_A007075 | |
362 | select SYS_FSL_ERRATUM_A007186 | |
363 | select SYS_FSL_ERRATUM_A007212 | |
364 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 365 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 366 | select SYS_FSL_HAS_SEC |
90b80386 | 367 | select SYS_FSL_SEC_BE |
2c2e2c9e | 368 | select SYS_FSL_SEC_COMPAT_4 |
3006ebc3 | 369 | |
115d60c0 YS |
370 | config ARCH_BSC9131 |
371 | bool | |
05cb79a7 | 372 | select FSL_LAW |
22120f11 | 373 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
374 | select SYS_FSL_ERRATUM_A004477 |
375 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a | 376 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 377 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 378 | select SYS_FSL_HAS_SEC |
90b80386 | 379 | select SYS_FSL_SEC_BE |
2c2e2c9e | 380 | select SYS_FSL_SEC_COMPAT_4 |
115d60c0 YS |
381 | |
382 | config ARCH_BSC9132 | |
383 | bool | |
05cb79a7 | 384 | select FSL_LAW |
22120f11 | 385 | select SYS_FSL_DDR_VER_46 |
63659ff3 YS |
386 | select SYS_FSL_ERRATUM_A004477 |
387 | select SYS_FSL_ERRATUM_A005125 | |
388 | select SYS_FSL_ERRATUM_A005434 | |
c01e4a1a | 389 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
390 | select SYS_FSL_ERRATUM_I2C_A004447 |
391 | select SYS_FSL_ERRATUM_IFC_A002769 | |
d26e34c4 | 392 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 393 | select SYS_FSL_HAS_SEC |
90b80386 | 394 | select SYS_FSL_SEC_BE |
2c2e2c9e | 395 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 396 | select SYS_PPC_E500_USE_DEBUG_TLB |
115d60c0 | 397 | |
4fd64746 YS |
398 | config ARCH_C29X |
399 | bool | |
05cb79a7 | 400 | select FSL_LAW |
22120f11 | 401 | select SYS_FSL_DDR_VER_46 |
63659ff3 | 402 | select SYS_FSL_ERRATUM_A005125 |
c01e4a1a | 403 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 404 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 405 | select SYS_FSL_HAS_SEC |
90b80386 | 406 | select SYS_FSL_SEC_BE |
2c2e2c9e | 407 | select SYS_FSL_SEC_COMPAT_6 |
53c95384 | 408 | select SYS_PPC_E500_USE_DEBUG_TLB |
4fd64746 | 409 | |
24ad75ae YS |
410 | config ARCH_MPC8536 |
411 | bool | |
05cb79a7 | 412 | select FSL_LAW |
63659ff3 YS |
413 | select SYS_FSL_ERRATUM_A004508 |
414 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 YS |
415 | select SYS_FSL_HAS_DDR2 |
416 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 417 | select SYS_FSL_HAS_SEC |
90b80386 | 418 | select SYS_FSL_SEC_BE |
2c2e2c9e | 419 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 420 | select SYS_PPC_E500_USE_DEBUG_TLB |
24ad75ae | 421 | |
7f825218 YS |
422 | config ARCH_MPC8540 |
423 | bool | |
05cb79a7 | 424 | select FSL_LAW |
d26e34c4 | 425 | select SYS_FSL_HAS_DDR1 |
7f825218 | 426 | |
3aff3082 YS |
427 | config ARCH_MPC8541 |
428 | bool | |
05cb79a7 | 429 | select FSL_LAW |
d26e34c4 | 430 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 431 | select SYS_FSL_HAS_SEC |
90b80386 | 432 | select SYS_FSL_SEC_BE |
2c2e2c9e | 433 | select SYS_FSL_SEC_COMPAT_2 |
3aff3082 | 434 | |
25cb74b3 YS |
435 | config ARCH_MPC8544 |
436 | bool | |
05cb79a7 | 437 | select FSL_LAW |
63659ff3 | 438 | select SYS_FSL_ERRATUM_A005125 |
d26e34c4 | 439 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 440 | select SYS_FSL_HAS_SEC |
90b80386 | 441 | select SYS_FSL_SEC_BE |
2c2e2c9e | 442 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 443 | select SYS_PPC_E500_USE_DEBUG_TLB |
25cb74b3 | 444 | |
281ed4c7 YS |
445 | config ARCH_MPC8548 |
446 | bool | |
05cb79a7 | 447 | select FSL_LAW |
63659ff3 YS |
448 | select SYS_FSL_ERRATUM_A005125 |
449 | select SYS_FSL_ERRATUM_NMG_DDR120 | |
450 | select SYS_FSL_ERRATUM_NMG_LBC103 | |
451 | select SYS_FSL_ERRATUM_NMG_ETSEC129 | |
452 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 YS |
453 | select SYS_FSL_HAS_DDR2 |
454 | select SYS_FSL_HAS_DDR1 | |
2c2e2c9e | 455 | select SYS_FSL_HAS_SEC |
90b80386 | 456 | select SYS_FSL_SEC_BE |
2c2e2c9e | 457 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 458 | select SYS_PPC_E500_USE_DEBUG_TLB |
281ed4c7 | 459 | |
3c3d8ab5 YS |
460 | config ARCH_MPC8555 |
461 | bool | |
05cb79a7 | 462 | select FSL_LAW |
d26e34c4 | 463 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 464 | select SYS_FSL_HAS_SEC |
90b80386 | 465 | select SYS_FSL_SEC_BE |
2c2e2c9e | 466 | select SYS_FSL_SEC_COMPAT_2 |
3c3d8ab5 | 467 | |
99d0a312 YS |
468 | config ARCH_MPC8560 |
469 | bool | |
05cb79a7 | 470 | select FSL_LAW |
d26e34c4 | 471 | select SYS_FSL_HAS_DDR1 |
99d0a312 | 472 | |
d07c3843 YS |
473 | config ARCH_MPC8568 |
474 | bool | |
05cb79a7 | 475 | select FSL_LAW |
d26e34c4 | 476 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 477 | select SYS_FSL_HAS_SEC |
90b80386 | 478 | select SYS_FSL_SEC_BE |
2c2e2c9e | 479 | select SYS_FSL_SEC_COMPAT_2 |
d07c3843 | 480 | |
23b36a7d YS |
481 | config ARCH_MPC8569 |
482 | bool | |
05cb79a7 | 483 | select FSL_LAW |
63659ff3 YS |
484 | select SYS_FSL_ERRATUM_A004508 |
485 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 | 486 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 487 | select SYS_FSL_HAS_SEC |
90b80386 | 488 | select SYS_FSL_SEC_BE |
2c2e2c9e | 489 | select SYS_FSL_SEC_COMPAT_2 |
23b36a7d | 490 | |
c8f48474 YS |
491 | config ARCH_MPC8572 |
492 | bool | |
05cb79a7 | 493 | select FSL_LAW |
63659ff3 YS |
494 | select SYS_FSL_ERRATUM_A004508 |
495 | select SYS_FSL_ERRATUM_A005125 | |
496 | select SYS_FSL_ERRATUM_DDR_115 | |
497 | select SYS_FSL_ERRATUM_DDR111_DDR134 | |
d26e34c4 YS |
498 | select SYS_FSL_HAS_DDR2 |
499 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 500 | select SYS_FSL_HAS_SEC |
90b80386 | 501 | select SYS_FSL_SEC_BE |
2c2e2c9e | 502 | select SYS_FSL_SEC_COMPAT_2 |
d26e34c4 | 503 | select SYS_PPC_E500_USE_DEBUG_TLB |
c8f48474 | 504 | |
7d5f9f84 YS |
505 | config ARCH_P1010 |
506 | bool | |
05cb79a7 | 507 | select FSL_LAW |
63659ff3 YS |
508 | select SYS_FSL_ERRATUM_A004477 |
509 | select SYS_FSL_ERRATUM_A004508 | |
510 | select SYS_FSL_ERRATUM_A005125 | |
511 | select SYS_FSL_ERRATUM_A006261 | |
512 | select SYS_FSL_ERRATUM_A007075 | |
c01e4a1a | 513 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
514 | select SYS_FSL_ERRATUM_I2C_A004447 |
515 | select SYS_FSL_ERRATUM_IFC_A002769 | |
516 | select SYS_FSL_ERRATUM_P1010_A003549 | |
517 | select SYS_FSL_ERRATUM_SEC_A003571 | |
518 | select SYS_FSL_ERRATUM_IFC_A003399 | |
d26e34c4 | 519 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 520 | select SYS_FSL_HAS_SEC |
90b80386 | 521 | select SYS_FSL_SEC_BE |
2c2e2c9e | 522 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 523 | select SYS_PPC_E500_USE_DEBUG_TLB |
7d5f9f84 | 524 | |
1cdd96f3 YS |
525 | config ARCH_P1011 |
526 | bool | |
05cb79a7 | 527 | select FSL_LAW |
63659ff3 YS |
528 | select SYS_FSL_ERRATUM_A004508 |
529 | select SYS_FSL_ERRATUM_A005125 | |
530 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 531 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 532 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 533 | select SYS_FSL_HAS_SEC |
90b80386 | 534 | select SYS_FSL_SEC_BE |
2c2e2c9e | 535 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 536 | select SYS_PPC_E500_USE_DEBUG_TLB |
1cdd96f3 | 537 | |
484fff64 YS |
538 | config ARCH_P1020 |
539 | bool | |
05cb79a7 | 540 | select FSL_LAW |
63659ff3 YS |
541 | select SYS_FSL_ERRATUM_A004508 |
542 | select SYS_FSL_ERRATUM_A005125 | |
543 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 544 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 545 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 546 | select SYS_FSL_HAS_SEC |
90b80386 | 547 | select SYS_FSL_SEC_BE |
2c2e2c9e | 548 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 549 | select SYS_PPC_E500_USE_DEBUG_TLB |
484fff64 | 550 | |
a990799d YS |
551 | config ARCH_P1021 |
552 | bool | |
05cb79a7 | 553 | select FSL_LAW |
63659ff3 YS |
554 | select SYS_FSL_ERRATUM_A004508 |
555 | select SYS_FSL_ERRATUM_A005125 | |
556 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 557 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 558 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 559 | select SYS_FSL_HAS_SEC |
90b80386 | 560 | select SYS_FSL_SEC_BE |
2c2e2c9e | 561 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 562 | select SYS_PPC_E500_USE_DEBUG_TLB |
a990799d | 563 | |
feb9e25b YS |
564 | config ARCH_P1022 |
565 | bool | |
05cb79a7 | 566 | select FSL_LAW |
63659ff3 YS |
567 | select SYS_FSL_ERRATUM_A004477 |
568 | select SYS_FSL_ERRATUM_A004508 | |
569 | select SYS_FSL_ERRATUM_A005125 | |
570 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 571 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 572 | select SYS_FSL_ERRATUM_SATA_A001 |
d26e34c4 | 573 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 574 | select SYS_FSL_HAS_SEC |
90b80386 | 575 | select SYS_FSL_SEC_BE |
2c2e2c9e | 576 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 577 | select SYS_PPC_E500_USE_DEBUG_TLB |
feb9e25b | 578 | |
9bb1d6bc YS |
579 | config ARCH_P1023 |
580 | bool | |
05cb79a7 | 581 | select FSL_LAW |
63659ff3 YS |
582 | select SYS_FSL_ERRATUM_A004508 |
583 | select SYS_FSL_ERRATUM_A005125 | |
584 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 | 585 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 586 | select SYS_FSL_HAS_SEC |
90b80386 | 587 | select SYS_FSL_SEC_BE |
2c2e2c9e | 588 | select SYS_FSL_SEC_COMPAT_4 |
9bb1d6bc | 589 | |
52b6f13d YS |
590 | config ARCH_P1024 |
591 | bool | |
05cb79a7 | 592 | select FSL_LAW |
63659ff3 YS |
593 | select SYS_FSL_ERRATUM_A004508 |
594 | select SYS_FSL_ERRATUM_A005125 | |
595 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 596 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 597 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 598 | select SYS_FSL_HAS_SEC |
90b80386 | 599 | select SYS_FSL_SEC_BE |
2c2e2c9e | 600 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 601 | select SYS_PPC_E500_USE_DEBUG_TLB |
52b6f13d | 602 | |
4167a67d YS |
603 | config ARCH_P1025 |
604 | bool | |
05cb79a7 | 605 | select FSL_LAW |
63659ff3 YS |
606 | select SYS_FSL_ERRATUM_A004508 |
607 | select SYS_FSL_ERRATUM_A005125 | |
608 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 609 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 610 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 611 | select SYS_FSL_HAS_SEC |
90b80386 | 612 | select SYS_FSL_SEC_BE |
2c2e2c9e | 613 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 614 | select SYS_PPC_E500_USE_DEBUG_TLB |
4167a67d | 615 | |
4593637b YS |
616 | config ARCH_P2020 |
617 | bool | |
05cb79a7 | 618 | select FSL_LAW |
63659ff3 YS |
619 | select SYS_FSL_ERRATUM_A004477 |
620 | select SYS_FSL_ERRATUM_A004508 | |
621 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a YS |
622 | select SYS_FSL_ERRATUM_ESDHC111 |
623 | select SYS_FSL_ERRATUM_ESDHC_A001 | |
d26e34c4 | 624 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 625 | select SYS_FSL_HAS_SEC |
90b80386 | 626 | select SYS_FSL_SEC_BE |
2c2e2c9e | 627 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 628 | select SYS_PPC_E500_USE_DEBUG_TLB |
4593637b | 629 | |
ce040c83 YS |
630 | config ARCH_P2041 |
631 | bool | |
f8dee360 | 632 | select E500MC |
05cb79a7 | 633 | select FSL_LAW |
63659ff3 YS |
634 | select SYS_FSL_ERRATUM_A004510 |
635 | select SYS_FSL_ERRATUM_A004849 | |
636 | select SYS_FSL_ERRATUM_A006261 | |
637 | select SYS_FSL_ERRATUM_CPU_A003999 | |
638 | select SYS_FSL_ERRATUM_DDR_A003 | |
639 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 640 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
641 | select SYS_FSL_ERRATUM_I2C_A004447 |
642 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
643 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
644 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 645 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 646 | select SYS_FSL_HAS_SEC |
90b80386 | 647 | select SYS_FSL_SEC_BE |
2c2e2c9e | 648 | select SYS_FSL_SEC_COMPAT_4 |
ce040c83 | 649 | |
5e5fdd2d YS |
650 | config ARCH_P3041 |
651 | bool | |
f8dee360 | 652 | select E500MC |
05cb79a7 | 653 | select FSL_LAW |
22120f11 | 654 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
655 | select SYS_FSL_ERRATUM_A004510 |
656 | select SYS_FSL_ERRATUM_A004849 | |
657 | select SYS_FSL_ERRATUM_A005812 | |
658 | select SYS_FSL_ERRATUM_A006261 | |
659 | select SYS_FSL_ERRATUM_CPU_A003999 | |
660 | select SYS_FSL_ERRATUM_DDR_A003 | |
661 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 662 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
663 | select SYS_FSL_ERRATUM_I2C_A004447 |
664 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
665 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
666 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 667 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 668 | select SYS_FSL_HAS_SEC |
90b80386 | 669 | select SYS_FSL_SEC_BE |
2c2e2c9e | 670 | select SYS_FSL_SEC_COMPAT_4 |
5e5fdd2d | 671 | |
e71372cb YS |
672 | config ARCH_P4080 |
673 | bool | |
f8dee360 | 674 | select E500MC |
05cb79a7 | 675 | select FSL_LAW |
22120f11 | 676 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
677 | select SYS_FSL_ERRATUM_A004510 |
678 | select SYS_FSL_ERRATUM_A004580 | |
679 | select SYS_FSL_ERRATUM_A004849 | |
680 | select SYS_FSL_ERRATUM_A005812 | |
681 | select SYS_FSL_ERRATUM_A007075 | |
682 | select SYS_FSL_ERRATUM_CPC_A002 | |
683 | select SYS_FSL_ERRATUM_CPC_A003 | |
684 | select SYS_FSL_ERRATUM_CPU_A003999 | |
685 | select SYS_FSL_ERRATUM_DDR_A003 | |
686 | select SYS_FSL_ERRATUM_DDR_A003474 | |
687 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a YS |
688 | select SYS_FSL_ERRATUM_ESDHC111 |
689 | select SYS_FSL_ERRATUM_ESDHC13 | |
690 | select SYS_FSL_ERRATUM_ESDHC135 | |
63659ff3 YS |
691 | select SYS_FSL_ERRATUM_I2C_A004447 |
692 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
693 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
694 | select SYS_P4080_ERRATUM_CPU22 | |
695 | select SYS_P4080_ERRATUM_PCIE_A003 | |
696 | select SYS_P4080_ERRATUM_SERDES8 | |
697 | select SYS_P4080_ERRATUM_SERDES9 | |
698 | select SYS_P4080_ERRATUM_SERDES_A001 | |
699 | select SYS_P4080_ERRATUM_SERDES_A005 | |
d26e34c4 | 700 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 701 | select SYS_FSL_HAS_SEC |
90b80386 | 702 | select SYS_FSL_SEC_BE |
2c2e2c9e | 703 | select SYS_FSL_SEC_COMPAT_4 |
e71372cb | 704 | |
cefe11cd YS |
705 | config ARCH_P5020 |
706 | bool | |
f8dee360 | 707 | select E500MC |
05cb79a7 | 708 | select FSL_LAW |
22120f11 | 709 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
710 | select SYS_FSL_ERRATUM_A004510 |
711 | select SYS_FSL_ERRATUM_A006261 | |
712 | select SYS_FSL_ERRATUM_DDR_A003 | |
713 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 714 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
715 | select SYS_FSL_ERRATUM_I2C_A004447 |
716 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
717 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 718 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 719 | select SYS_FSL_HAS_SEC |
90b80386 | 720 | select SYS_FSL_SEC_BE |
2c2e2c9e | 721 | select SYS_FSL_SEC_COMPAT_4 |
cefe11cd | 722 | |
95390360 YS |
723 | config ARCH_P5040 |
724 | bool | |
f8dee360 | 725 | select E500MC |
05cb79a7 | 726 | select FSL_LAW |
22120f11 | 727 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
728 | select SYS_FSL_ERRATUM_A004510 |
729 | select SYS_FSL_ERRATUM_A004699 | |
730 | select SYS_FSL_ERRATUM_A005812 | |
731 | select SYS_FSL_ERRATUM_A006261 | |
732 | select SYS_FSL_ERRATUM_DDR_A003 | |
733 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 734 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 735 | select SYS_FSL_ERRATUM_USB14 |
d26e34c4 | 736 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 737 | select SYS_FSL_HAS_SEC |
90b80386 | 738 | select SYS_FSL_SEC_BE |
2c2e2c9e | 739 | select SYS_FSL_SEC_COMPAT_4 |
95390360 | 740 | |
10343403 YS |
741 | config ARCH_QEMU_E500 |
742 | bool | |
743 | ||
5ff3f41d YS |
744 | config ARCH_T1023 |
745 | bool | |
f8dee360 | 746 | select E500MC |
05cb79a7 | 747 | select FSL_LAW |
22120f11 | 748 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
749 | select SYS_FSL_ERRATUM_A008378 |
750 | select SYS_FSL_ERRATUM_A009663 | |
751 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 752 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
753 | select SYS_FSL_HAS_DDR3 |
754 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 755 | select SYS_FSL_HAS_SEC |
90b80386 | 756 | select SYS_FSL_SEC_BE |
2c2e2c9e | 757 | select SYS_FSL_SEC_COMPAT_5 |
5ff3f41d | 758 | |
e5d5f5a8 YS |
759 | config ARCH_T1024 |
760 | bool | |
f8dee360 | 761 | select E500MC |
05cb79a7 | 762 | select FSL_LAW |
22120f11 | 763 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
764 | select SYS_FSL_ERRATUM_A008378 |
765 | select SYS_FSL_ERRATUM_A009663 | |
766 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 767 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
768 | select SYS_FSL_HAS_DDR3 |
769 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 770 | select SYS_FSL_HAS_SEC |
90b80386 | 771 | select SYS_FSL_SEC_BE |
2c2e2c9e | 772 | select SYS_FSL_SEC_COMPAT_5 |
e5d5f5a8 | 773 | |
5d737010 YS |
774 | config ARCH_T1040 |
775 | bool | |
f8dee360 | 776 | select E500MC |
05cb79a7 | 777 | select FSL_LAW |
22120f11 | 778 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
779 | select SYS_FSL_ERRATUM_A008044 |
780 | select SYS_FSL_ERRATUM_A008378 | |
781 | select SYS_FSL_ERRATUM_A009663 | |
782 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 783 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
784 | select SYS_FSL_HAS_DDR3 |
785 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 786 | select SYS_FSL_HAS_SEC |
90b80386 | 787 | select SYS_FSL_SEC_BE |
2c2e2c9e | 788 | select SYS_FSL_SEC_COMPAT_5 |
5d737010 | 789 | |
5449c98a YS |
790 | config ARCH_T1042 |
791 | bool | |
f8dee360 | 792 | select E500MC |
05cb79a7 | 793 | select FSL_LAW |
22120f11 | 794 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
795 | select SYS_FSL_ERRATUM_A008044 |
796 | select SYS_FSL_ERRATUM_A008378 | |
797 | select SYS_FSL_ERRATUM_A009663 | |
798 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 799 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
800 | select SYS_FSL_HAS_DDR3 |
801 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 802 | select SYS_FSL_HAS_SEC |
90b80386 | 803 | select SYS_FSL_SEC_BE |
2c2e2c9e | 804 | select SYS_FSL_SEC_COMPAT_5 |
5449c98a | 805 | |
0f3d80e9 YS |
806 | config ARCH_T2080 |
807 | bool | |
f8dee360 | 808 | select E500MC |
05cb79a7 | 809 | select FSL_LAW |
22120f11 | 810 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
811 | select SYS_FSL_ERRATUM_A006379 |
812 | select SYS_FSL_ERRATUM_A006593 | |
813 | select SYS_FSL_ERRATUM_A007186 | |
814 | select SYS_FSL_ERRATUM_A007212 | |
815 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 816 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 817 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 818 | select SYS_FSL_HAS_SEC |
90b80386 | 819 | select SYS_FSL_SEC_BE |
2c2e2c9e | 820 | select SYS_FSL_SEC_COMPAT_4 |
0f3d80e9 YS |
821 | |
822 | config ARCH_T2081 | |
823 | bool | |
f8dee360 | 824 | select E500MC |
05cb79a7 | 825 | select FSL_LAW |
22120f11 | 826 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
827 | select SYS_FSL_ERRATUM_A006379 |
828 | select SYS_FSL_ERRATUM_A006593 | |
829 | select SYS_FSL_ERRATUM_A007186 | |
830 | select SYS_FSL_ERRATUM_A007212 | |
831 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 832 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 833 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 834 | select SYS_FSL_HAS_SEC |
90b80386 | 835 | select SYS_FSL_SEC_BE |
2c2e2c9e | 836 | select SYS_FSL_SEC_COMPAT_4 |
0f3d80e9 | 837 | |
652a7bbd YS |
838 | config ARCH_T4160 |
839 | bool | |
f8dee360 | 840 | select E500MC |
05cb79a7 | 841 | select FSL_LAW |
22120f11 | 842 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
843 | select SYS_FSL_ERRATUM_A004468 |
844 | select SYS_FSL_ERRATUM_A005871 | |
845 | select SYS_FSL_ERRATUM_A006379 | |
846 | select SYS_FSL_ERRATUM_A006593 | |
847 | select SYS_FSL_ERRATUM_A007186 | |
848 | select SYS_FSL_ERRATUM_A007798 | |
849 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 850 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 851 | select SYS_FSL_HAS_SEC |
90b80386 | 852 | select SYS_FSL_SEC_BE |
2c2e2c9e | 853 | select SYS_FSL_SEC_COMPAT_4 |
652a7bbd | 854 | |
26bc57da YS |
855 | config ARCH_T4240 |
856 | bool | |
f8dee360 | 857 | select E500MC |
05cb79a7 | 858 | select FSL_LAW |
22120f11 | 859 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
860 | select SYS_FSL_ERRATUM_A004468 |
861 | select SYS_FSL_ERRATUM_A005871 | |
862 | select SYS_FSL_ERRATUM_A006261 | |
863 | select SYS_FSL_ERRATUM_A006379 | |
864 | select SYS_FSL_ERRATUM_A006593 | |
865 | select SYS_FSL_ERRATUM_A007186 | |
866 | select SYS_FSL_ERRATUM_A007798 | |
867 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 868 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 869 | select SYS_FSL_HAS_SEC |
90b80386 | 870 | select SYS_FSL_SEC_BE |
2c2e2c9e | 871 | select SYS_FSL_SEC_COMPAT_4 |
05cb79a7 | 872 | |
f8dee360 YS |
873 | config BOOKE |
874 | bool | |
875 | default y | |
876 | ||
877 | config E500 | |
878 | bool | |
879 | default y | |
880 | help | |
881 | Enable PowerPC E500 cores, including e500v1, e500v2, e500mc | |
882 | ||
883 | config E500MC | |
884 | bool | |
885 | help | |
886 | Enble PowerPC E500MC core | |
887 | ||
05cb79a7 YS |
888 | config FSL_LAW |
889 | bool | |
890 | help | |
891 | Use Freescale common code for Local Access Window | |
26bc57da | 892 | |
c6e6bda3 YS |
893 | config SECURE_BOOT |
894 | bool "Secure Boot" | |
895 | help | |
896 | Enable Freescale Secure Boot feature. Normally selected | |
897 | by defconfig. If unsure, do not change. | |
898 | ||
3f82b56d YS |
899 | config MAX_CPUS |
900 | int "Maximum number of CPUs permitted for MPC85xx" | |
901 | default 12 if ARCH_T4240 | |
902 | default 8 if ARCH_P4080 || \ | |
903 | ARCH_T4160 | |
904 | default 4 if ARCH_B4860 || \ | |
905 | ARCH_P2041 || \ | |
906 | ARCH_P3041 || \ | |
907 | ARCH_P5040 || \ | |
908 | ARCH_T1040 || \ | |
909 | ARCH_T1042 || \ | |
910 | ARCH_T2080 || \ | |
911 | ARCH_T2081 | |
912 | default 2 if ARCH_B4420 || \ | |
913 | ARCH_BSC9132 || \ | |
914 | ARCH_MPC8572 || \ | |
915 | ARCH_P1020 || \ | |
916 | ARCH_P1021 || \ | |
917 | ARCH_P1022 || \ | |
918 | ARCH_P1023 || \ | |
919 | ARCH_P1024 || \ | |
920 | ARCH_P1025 || \ | |
921 | ARCH_P2020 || \ | |
922 | ARCH_P5020 || \ | |
3f82b56d YS |
923 | ARCH_T1023 || \ |
924 | ARCH_T1024 | |
925 | default 1 | |
926 | help | |
927 | Set this number to the maximum number of possible CPUs in the SoC. | |
928 | SoCs may have multiple clusters with each cluster may have multiple | |
929 | ports. If some ports are reserved but higher ports are used for | |
930 | cores, count the reserved ports. This will allocate enough memory | |
931 | in spin table to properly handle all cores. | |
932 | ||
830fc1bf YS |
933 | config SYS_CCSRBAR_DEFAULT |
934 | hex "Default CCSRBAR address" | |
935 | default 0xff700000 if ARCH_BSC9131 || \ | |
936 | ARCH_BSC9132 || \ | |
937 | ARCH_C29X || \ | |
938 | ARCH_MPC8536 || \ | |
939 | ARCH_MPC8540 || \ | |
940 | ARCH_MPC8541 || \ | |
941 | ARCH_MPC8544 || \ | |
942 | ARCH_MPC8548 || \ | |
943 | ARCH_MPC8555 || \ | |
944 | ARCH_MPC8560 || \ | |
945 | ARCH_MPC8568 || \ | |
946 | ARCH_MPC8569 || \ | |
947 | ARCH_MPC8572 || \ | |
948 | ARCH_P1010 || \ | |
949 | ARCH_P1011 || \ | |
950 | ARCH_P1020 || \ | |
951 | ARCH_P1021 || \ | |
952 | ARCH_P1022 || \ | |
953 | ARCH_P1024 || \ | |
954 | ARCH_P1025 || \ | |
955 | ARCH_P2020 | |
956 | default 0xff600000 if ARCH_P1023 | |
957 | default 0xfe000000 if ARCH_B4420 || \ | |
958 | ARCH_B4860 || \ | |
959 | ARCH_P2041 || \ | |
960 | ARCH_P3041 || \ | |
961 | ARCH_P4080 || \ | |
962 | ARCH_P5020 || \ | |
963 | ARCH_P5040 || \ | |
830fc1bf YS |
964 | ARCH_T1023 || \ |
965 | ARCH_T1024 || \ | |
966 | ARCH_T1040 || \ | |
967 | ARCH_T1042 || \ | |
968 | ARCH_T2080 || \ | |
969 | ARCH_T2081 || \ | |
970 | ARCH_T4160 || \ | |
971 | ARCH_T4240 | |
972 | default 0xe0000000 if ARCH_QEMU_E500 | |
973 | help | |
974 | Default value of CCSRBAR comes from power-on-reset. It | |
975 | is fixed on each SoC. Some SoCs can have different value | |
976 | if changed by pre-boot regime. The value here must match | |
977 | the current value in SoC. If not sure, do not change. | |
978 | ||
63659ff3 YS |
979 | config SYS_FSL_ERRATUM_A004468 |
980 | bool | |
981 | ||
982 | config SYS_FSL_ERRATUM_A004477 | |
983 | bool | |
984 | ||
985 | config SYS_FSL_ERRATUM_A004508 | |
986 | bool | |
987 | ||
988 | config SYS_FSL_ERRATUM_A004580 | |
989 | bool | |
990 | ||
991 | config SYS_FSL_ERRATUM_A004699 | |
992 | bool | |
993 | ||
994 | config SYS_FSL_ERRATUM_A004849 | |
995 | bool | |
996 | ||
997 | config SYS_FSL_ERRATUM_A004510 | |
998 | bool | |
999 | ||
1000 | config SYS_FSL_ERRATUM_A004510_SVR_REV | |
1001 | hex | |
1002 | depends on SYS_FSL_ERRATUM_A004510 | |
1003 | default 0x20 if ARCH_P4080 | |
1004 | default 0x10 | |
1005 | ||
1006 | config SYS_FSL_ERRATUM_A004510_SVR_REV2 | |
1007 | hex | |
1008 | depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041)) | |
1009 | default 0x11 | |
1010 | ||
1011 | config SYS_FSL_ERRATUM_A005125 | |
1012 | bool | |
1013 | ||
1014 | config SYS_FSL_ERRATUM_A005434 | |
1015 | bool | |
1016 | ||
1017 | config SYS_FSL_ERRATUM_A005812 | |
1018 | bool | |
1019 | ||
1020 | config SYS_FSL_ERRATUM_A005871 | |
1021 | bool | |
1022 | ||
1023 | config SYS_FSL_ERRATUM_A006261 | |
1024 | bool | |
1025 | ||
1026 | config SYS_FSL_ERRATUM_A006379 | |
1027 | bool | |
1028 | ||
1029 | config SYS_FSL_ERRATUM_A006384 | |
1030 | bool | |
1031 | ||
1032 | config SYS_FSL_ERRATUM_A006475 | |
1033 | bool | |
1034 | ||
1035 | config SYS_FSL_ERRATUM_A006593 | |
1036 | bool | |
1037 | ||
1038 | config SYS_FSL_ERRATUM_A007075 | |
1039 | bool | |
1040 | ||
1041 | config SYS_FSL_ERRATUM_A007186 | |
1042 | bool | |
1043 | ||
1044 | config SYS_FSL_ERRATUM_A007212 | |
1045 | bool | |
1046 | ||
1047 | config SYS_FSL_ERRATUM_A007798 | |
1048 | bool | |
1049 | ||
1050 | config SYS_FSL_ERRATUM_A008044 | |
1051 | bool | |
1052 | ||
1053 | config SYS_FSL_ERRATUM_CPC_A002 | |
1054 | bool | |
1055 | ||
1056 | config SYS_FSL_ERRATUM_CPC_A003 | |
1057 | bool | |
1058 | ||
1059 | config SYS_FSL_ERRATUM_CPU_A003999 | |
1060 | bool | |
1061 | ||
1062 | config SYS_FSL_ERRATUM_ELBC_A001 | |
1063 | bool | |
1064 | ||
1065 | config SYS_FSL_ERRATUM_I2C_A004447 | |
1066 | bool | |
1067 | ||
1068 | config SYS_FSL_A004447_SVR_REV | |
1069 | hex | |
1070 | depends on SYS_FSL_ERRATUM_I2C_A004447 | |
1071 | default 0x00 if ARCH_MPC8548 | |
1072 | default 0x10 if ARCH_P1010 | |
1073 | default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132 | |
1074 | default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020 | |
1075 | ||
1076 | config SYS_FSL_ERRATUM_IFC_A002769 | |
1077 | bool | |
1078 | ||
1079 | config SYS_FSL_ERRATUM_IFC_A003399 | |
1080 | bool | |
1081 | ||
1082 | config SYS_FSL_ERRATUM_NMG_CPU_A011 | |
1083 | bool | |
1084 | ||
1085 | config SYS_FSL_ERRATUM_NMG_ETSEC129 | |
1086 | bool | |
1087 | ||
1088 | config SYS_FSL_ERRATUM_NMG_LBC103 | |
1089 | bool | |
1090 | ||
1091 | config SYS_FSL_ERRATUM_P1010_A003549 | |
1092 | bool | |
1093 | ||
1094 | config SYS_FSL_ERRATUM_SATA_A001 | |
1095 | bool | |
1096 | ||
1097 | config SYS_FSL_ERRATUM_SEC_A003571 | |
1098 | bool | |
1099 | ||
1100 | config SYS_FSL_ERRATUM_SRIO_A004034 | |
1101 | bool | |
1102 | ||
1103 | config SYS_FSL_ERRATUM_USB14 | |
1104 | bool | |
1105 | ||
1106 | config SYS_P4080_ERRATUM_CPU22 | |
1107 | bool | |
1108 | ||
1109 | config SYS_P4080_ERRATUM_PCIE_A003 | |
1110 | bool | |
1111 | ||
1112 | config SYS_P4080_ERRATUM_SERDES8 | |
1113 | bool | |
1114 | ||
1115 | config SYS_P4080_ERRATUM_SERDES9 | |
1116 | bool | |
1117 | ||
1118 | config SYS_P4080_ERRATUM_SERDES_A001 | |
1119 | bool | |
1120 | ||
1121 | config SYS_P4080_ERRATUM_SERDES_A005 | |
1122 | bool | |
1123 | ||
8303acbc YS |
1124 | config SYS_FSL_NUM_LAWS |
1125 | int "Number of local access windows" | |
1126 | depends on FSL_LAW | |
1127 | default 32 if ARCH_B4420 || \ | |
1128 | ARCH_B4860 || \ | |
1129 | ARCH_P2041 || \ | |
1130 | ARCH_P3041 || \ | |
1131 | ARCH_P4080 || \ | |
1132 | ARCH_P5020 || \ | |
1133 | ARCH_P5040 || \ | |
1134 | ARCH_T2080 || \ | |
1135 | ARCH_T2081 || \ | |
1136 | ARCH_T4160 || \ | |
1137 | ARCH_T4240 | |
08a37fd1 | 1138 | default 16 if ARCH_T1023 || \ |
8303acbc YS |
1139 | ARCH_T1024 || \ |
1140 | ARCH_T1040 || \ | |
1141 | ARCH_T1042 | |
1142 | default 12 if ARCH_BSC9131 || \ | |
1143 | ARCH_BSC9132 || \ | |
1144 | ARCH_C29X || \ | |
1145 | ARCH_MPC8536 || \ | |
1146 | ARCH_MPC8572 || \ | |
1147 | ARCH_P1010 || \ | |
1148 | ARCH_P1011 || \ | |
1149 | ARCH_P1020 || \ | |
1150 | ARCH_P1021 || \ | |
1151 | ARCH_P1022 || \ | |
1152 | ARCH_P1023 || \ | |
1153 | ARCH_P1024 || \ | |
1154 | ARCH_P1025 || \ | |
1155 | ARCH_P2020 | |
1156 | default 10 if ARCH_MPC8544 || \ | |
1157 | ARCH_MPC8548 || \ | |
1158 | ARCH_MPC8568 || \ | |
1159 | ARCH_MPC8569 | |
1160 | default 8 if ARCH_MPC8540 || \ | |
1161 | ARCH_MPC8541 || \ | |
1162 | ARCH_MPC8555 || \ | |
1163 | ARCH_MPC8560 | |
1164 | help | |
1165 | Number of local access windows. This is fixed per SoC. | |
1166 | If not sure, do not change. | |
1167 | ||
26e79b65 YS |
1168 | config SYS_NUM_TLBCAMS |
1169 | int "Number of TLB CAM entries" | |
1170 | default 64 if E500MC | |
1171 | default 16 | |
1172 | help | |
1173 | Number of TLB CAM entries for Book-E chips. 64 for E500MC, | |
1174 | 16 for other E500 SoCs. | |
1175 | ||
53c95384 YS |
1176 | config SYS_PPC_E500_USE_DEBUG_TLB |
1177 | bool | |
1178 | ||
1179 | config SYS_PPC_E500_DEBUG_TLB | |
1180 | int "Temporary TLB entry for external debugger" | |
1181 | depends on SYS_PPC_E500_USE_DEBUG_TLB | |
1182 | default 0 if ARCH_MPC8544 || ARCH_MPC8548 | |
1183 | default 1 if ARCH_MPC8536 | |
1184 | default 2 if ARCH_MPC8572 || \ | |
1185 | ARCH_P1011 || \ | |
1186 | ARCH_P1020 || \ | |
1187 | ARCH_P1021 || \ | |
1188 | ARCH_P1022 || \ | |
1189 | ARCH_P1024 || \ | |
1190 | ARCH_P1025 || \ | |
1191 | ARCH_P2020 | |
1192 | default 3 if ARCH_P1010 || \ | |
1193 | ARCH_BSC9132 || \ | |
1194 | ARCH_C29X | |
1195 | help | |
1196 | Select a temporary TLB entry to be used during boot to work | |
1197 | around limitations in e500v1 and e500v2 external debugger | |
1198 | support. This reduces the portions of the boot code where | |
1199 | breakpoints and single stepping do not work. The value of this | |
1200 | symbol should be set to the TLB1 entry to be used for this | |
1201 | purpose. If unsure, do not change. | |
1202 | ||
dd84058d MY |
1203 | source "board/freescale/b4860qds/Kconfig" |
1204 | source "board/freescale/bsc9131rdb/Kconfig" | |
1205 | source "board/freescale/bsc9132qds/Kconfig" | |
1206 | source "board/freescale/c29xpcie/Kconfig" | |
1207 | source "board/freescale/corenet_ds/Kconfig" | |
1208 | source "board/freescale/mpc8536ds/Kconfig" | |
1209 | source "board/freescale/mpc8540ads/Kconfig" | |
1210 | source "board/freescale/mpc8541cds/Kconfig" | |
1211 | source "board/freescale/mpc8544ds/Kconfig" | |
1212 | source "board/freescale/mpc8548cds/Kconfig" | |
1213 | source "board/freescale/mpc8555cds/Kconfig" | |
1214 | source "board/freescale/mpc8560ads/Kconfig" | |
1215 | source "board/freescale/mpc8568mds/Kconfig" | |
1216 | source "board/freescale/mpc8569mds/Kconfig" | |
1217 | source "board/freescale/mpc8572ds/Kconfig" | |
1218 | source "board/freescale/p1010rdb/Kconfig" | |
1219 | source "board/freescale/p1022ds/Kconfig" | |
1220 | source "board/freescale/p1023rdb/Kconfig" | |
dd84058d MY |
1221 | source "board/freescale/p1_p2_rdb_pc/Kconfig" |
1222 | source "board/freescale/p1_twr/Kconfig" | |
dd84058d MY |
1223 | source "board/freescale/p2041rdb/Kconfig" |
1224 | source "board/freescale/qemu-ppce500/Kconfig" | |
aba80048 | 1225 | source "board/freescale/t102xqds/Kconfig" |
48c6f328 | 1226 | source "board/freescale/t102xrdb/Kconfig" |
dd84058d MY |
1227 | source "board/freescale/t1040qds/Kconfig" |
1228 | source "board/freescale/t104xrdb/Kconfig" | |
1229 | source "board/freescale/t208xqds/Kconfig" | |
1230 | source "board/freescale/t208xrdb/Kconfig" | |
1231 | source "board/freescale/t4qds/Kconfig" | |
1232 | source "board/freescale/t4rdb/Kconfig" | |
1233 | source "board/gdsys/p1022/Kconfig" | |
1234 | source "board/keymile/kmp204x/Kconfig" | |
1235 | source "board/sbc8548/Kconfig" | |
1236 | source "board/socrates/Kconfig" | |
87e29878 | 1237 | source "board/varisys/cyrus/Kconfig" |
dd84058d MY |
1238 | source "board/xes/xpedite520x/Kconfig" |
1239 | source "board/xes/xpedite537x/Kconfig" | |
1240 | source "board/xes/xpedite550x/Kconfig" | |
8b0044ff | 1241 | source "board/Arcturus/ucp1020/Kconfig" |
dd84058d MY |
1242 | |
1243 | endmenu |