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f8bbb4da KM |
1 | /* |
2 | * Copyright 2009-2010 eXMeritus, A Boeing Company | |
3 | * Copyright 2008-2009 Freescale Semiconductor, Inc. | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or | |
6 | * modify it under the terms of the GNU General Public License | |
7 | * Version 2 as published by the Free Software Foundation. | |
8 | */ | |
9 | ||
10 | #include <common.h> | |
11 | ||
5614e71b YS |
12 | #include <fsl_ddr_sdram.h> |
13 | #include <fsl_ddr_dimm_params.h> | |
f8bbb4da KM |
14 | |
15 | void fsl_ddr_board_options(memctl_options_t *popts, | |
16 | dimm_params_t *pdimm, | |
17 | unsigned int ctrl_num) | |
18 | { | |
19 | /* | |
20 | * We only support one DIMM, so according to the P2020 docs we should | |
21 | * set the options as follows: | |
22 | */ | |
23 | popts->cs_local_opts[0].odt_rd_cfg = 0; | |
24 | popts->cs_local_opts[0].odt_wr_cfg = 4; | |
25 | popts->cs_local_opts[1].odt_rd_cfg = 0; | |
26 | popts->cs_local_opts[1].odt_wr_cfg = 0; | |
27 | popts->half_strength_driver_enable = 0; | |
28 | ||
29 | /* Manually configured for our static clock rate */ | |
30 | popts->clk_adjust = 4; | |
31 | popts->cpo_override = 4; | |
32 | popts->write_data_delay = 2; | |
0dd38a35 | 33 | popts->twot_en = 0; |
f8bbb4da | 34 | } |