]>
Commit | Line | Data |
---|---|---|
affae2bf WD |
1 | /* |
2 | * (C) Copyright 2000, 2001 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * (C) Copyright 2001, Stuart Hughes, Lineo Inc, stuarth@lineo.com | |
6 | * Add support the Sharp chips on the mpc8260ads. | |
7 | * I started with board/ip860/flash.c and made changes I found in | |
8 | * the MTD project by David Schleef. | |
9 | * | |
10 | * See file CREDITS for list of people who contributed to this | |
11 | * project. | |
12 | * | |
13 | * This program is free software; you can redistribute it and/or | |
14 | * modify it under the terms of the GNU General Public License as | |
15 | * published by the Free Software Foundation; either version 2 of | |
16 | * the License, or (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
26 | * MA 02111-1307 USA | |
27 | */ | |
28 | ||
29 | #include <common.h> | |
30 | ||
31 | ||
32 | flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ | |
33 | ||
34 | #if defined(CFG_ENV_IS_IN_FLASH) | |
35 | # ifndef CFG_ENV_ADDR | |
36 | # define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET) | |
37 | # endif | |
38 | # ifndef CFG_ENV_SIZE | |
39 | # define CFG_ENV_SIZE CFG_ENV_SECT_SIZE | |
40 | # endif | |
41 | # ifndef CFG_ENV_SECT_SIZE | |
42 | # define CFG_ENV_SECT_SIZE CFG_ENV_SIZE | |
43 | # endif | |
44 | #endif | |
45 | ||
46 | /*----------------------------------------------------------------------- | |
47 | * Functions | |
48 | */ | |
49 | static ulong flash_get_size (vu_long *addr, flash_info_t *info); | |
50 | static int write_word (flash_info_t *info, ulong dest, ulong data); | |
51 | static int clear_block_lock_bit(vu_long * addr); | |
52 | ||
53 | /*----------------------------------------------------------------------- | |
54 | */ | |
55 | ||
56 | unsigned long flash_init (void) | |
57 | { | |
58 | #ifndef CONFIG_MPC8260ADS | |
59 | volatile immap_t *immap = (immap_t *)CFG_IMMR; | |
60 | volatile memctl8xx_t *memctl = &immap->im_memctl; | |
61 | volatile ip860_bcsr_t *bcsr = (ip860_bcsr_t *)BCSR_BASE; | |
62 | #endif | |
63 | unsigned long size; | |
64 | int i; | |
65 | ||
66 | /* Init: enable write, | |
67 | * or we cannot even write flash commands | |
68 | */ | |
69 | #ifndef CONFIG_MPC8260ADS | |
70 | bcsr->bd_ctrl |= BD_CTRL_FLWE; | |
71 | #endif | |
72 | ||
73 | for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) { | |
74 | flash_info[i].flash_id = FLASH_UNKNOWN; | |
75 | ||
76 | /* set the default sector offset */ | |
77 | } | |
78 | ||
79 | /* Static FLASH Bank configuration here - FIXME XXX */ | |
80 | ||
81 | size = flash_get_size((vu_long *)FLASH_BASE, &flash_info[0]); | |
82 | ||
83 | if (flash_info[0].flash_id == FLASH_UNKNOWN) { | |
84 | printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", | |
85 | size, size<<20); | |
86 | } | |
87 | #ifndef CONFIG_MPC8260ADS | |
88 | /* Remap FLASH according to real size */ | |
89 | memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size & 0xFFFF8000); | |
90 | memctl->memc_br1 = (CFG_FLASH_BASE & BR_BA_MSK) | | |
91 | (memctl->memc_br1 & ~(BR_BA_MSK)); | |
92 | #endif | |
93 | ||
94 | /* Re-do sizing to get full correct info */ | |
95 | size = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]); | |
96 | ||
97 | flash_info[0].size = size; | |
98 | ||
99 | #if CFG_MONITOR_BASE >= CFG_FLASH_BASE | |
100 | /* monitor protection ON by default */ | |
101 | flash_protect(FLAG_PROTECT_SET, | |
102 | CFG_MONITOR_BASE, | |
103 | CFG_MONITOR_BASE+CFG_MONITOR_LEN-1, | |
104 | &flash_info[0]); | |
105 | #endif | |
106 | ||
107 | #ifdef CFG_ENV_IS_IN_FLASH | |
108 | /* ENV protection ON by default */ | |
109 | flash_protect(FLAG_PROTECT_SET, | |
110 | CFG_ENV_ADDR, | |
111 | CFG_ENV_ADDR+CFG_ENV_SECT_SIZE-1, | |
112 | &flash_info[0]); | |
113 | #endif | |
114 | return (size); | |
115 | } | |
116 | ||
117 | /*----------------------------------------------------------------------- | |
118 | */ | |
119 | void flash_print_info (flash_info_t *info) | |
120 | { | |
121 | int i; | |
122 | ||
123 | if (info->flash_id == FLASH_UNKNOWN) { | |
124 | printf ("missing or unknown FLASH type\n"); | |
125 | return; | |
126 | } | |
127 | ||
128 | switch (info->flash_id & FLASH_VENDMASK) { | |
129 | case FLASH_MAN_INTEL: printf ("Intel "); break; | |
130 | case FLASH_MAN_SHARP: printf ("Sharp "); break; | |
131 | default: printf ("Unknown Vendor "); break; | |
132 | } | |
133 | ||
134 | switch (info->flash_id & FLASH_TYPEMASK) { | |
135 | case FLASH_28F016SV: printf ("28F016SV (16 Mbit, 32 x 64k)\n"); | |
136 | break; | |
137 | case FLASH_28F160S3: printf ("28F160S3 (16 Mbit, 32 x 512K)\n"); | |
138 | break; | |
139 | case FLASH_28F320S3: printf ("28F320S3 (32 Mbit, 64 x 512K)\n"); | |
140 | break; | |
141 | case FLASH_LH28F016SCT: printf ("28F016SC (16 Mbit, 32 x 64K)\n"); | |
142 | break; | |
143 | default: printf ("Unknown Chip Type\n"); | |
144 | break; | |
145 | } | |
146 | ||
147 | printf (" Size: %ld MB in %d Sectors\n", | |
148 | info->size >> 20, info->sector_count); | |
149 | ||
150 | printf (" Sector Start Addresses:"); | |
151 | for (i=0; i<info->sector_count; ++i) { | |
152 | if ((i % 5) == 0) | |
153 | printf ("\n "); | |
154 | printf (" %08lX%s", | |
155 | info->start[i], | |
156 | info->protect[i] ? " (RO)" : " " | |
157 | ); | |
158 | } | |
159 | printf ("\n"); | |
160 | } | |
161 | ||
162 | /*----------------------------------------------------------------------- | |
163 | */ | |
164 | ||
165 | ||
166 | /*----------------------------------------------------------------------- | |
167 | */ | |
168 | ||
169 | /* | |
170 | * The following code cannot be run from FLASH! | |
171 | */ | |
172 | ||
173 | static ulong flash_get_size (vu_long *addr, flash_info_t *info) | |
174 | { | |
175 | short i; | |
176 | ulong value; | |
177 | ulong base = (ulong)addr; | |
178 | ulong sector_offset; | |
179 | ||
180 | /* Write "Intelligent Identifier" command: read Manufacturer ID */ | |
181 | *addr = 0x90909090; | |
182 | ||
183 | value = addr[0] & 0x00FF00FF; | |
184 | switch (value) { | |
185 | case MT_MANUFACT: /* SHARP, MT or => Intel */ | |
186 | case INTEL_ALT_MANU: | |
187 | info->flash_id = FLASH_MAN_INTEL; | |
188 | break; | |
189 | default: | |
190 | printf("unknown manufacturer: %x\n", (unsigned int)value); | |
191 | info->flash_id = FLASH_UNKNOWN; | |
192 | info->sector_count = 0; | |
193 | info->size = 0; | |
194 | return (0); /* no or unknown flash */ | |
195 | } | |
196 | ||
197 | value = addr[1]; /* device ID */ | |
198 | ||
199 | switch (value) { | |
200 | case (INTEL_ID_28F016S): | |
201 | info->flash_id += FLASH_28F016SV; | |
202 | info->sector_count = 32; | |
203 | info->size = 0x00400000; | |
204 | sector_offset = 0x20000; | |
205 | break; /* => 2x2 MB */ | |
206 | ||
207 | case (INTEL_ID_28F160S3): | |
208 | info->flash_id += FLASH_28F160S3; | |
209 | info->sector_count = 32; | |
210 | info->size = 0x00400000; | |
211 | sector_offset = 0x20000; | |
212 | break; /* => 2x2 MB */ | |
213 | ||
214 | case (INTEL_ID_28F320S3): | |
215 | info->flash_id += FLASH_28F320S3; | |
216 | info->sector_count = 64; | |
217 | info->size = 0x00800000; | |
218 | sector_offset = 0x20000; | |
219 | break; /* => 2x4 MB */ | |
220 | ||
221 | case SHARP_ID_28F016SCL: | |
222 | case SHARP_ID_28F016SCZ: | |
223 | info->flash_id = FLASH_MAN_SHARP | FLASH_LH28F016SCT; | |
224 | info->sector_count = 32; | |
225 | info->size = 0x00800000; | |
226 | sector_offset = 0x40000; | |
227 | break; /* => 4x2 MB */ | |
228 | ||
229 | ||
230 | default: | |
231 | info->flash_id = FLASH_UNKNOWN; | |
232 | return (0); /* => no or unknown flash */ | |
233 | ||
234 | } | |
235 | ||
236 | /* set up sector start address table */ | |
237 | for (i = 0; i < info->sector_count; i++) { | |
238 | info->start[i] = base; | |
239 | base += sector_offset; | |
240 | /* don't know how to check sector protection */ | |
241 | info->protect[i] = 0; | |
242 | } | |
243 | ||
244 | /* | |
245 | * Prevent writes to uninitialized FLASH. | |
246 | */ | |
247 | if (info->flash_id != FLASH_UNKNOWN) { | |
248 | addr = (vu_long *)info->start[0]; | |
249 | ||
250 | *addr = 0xFFFFFF; /* reset bank to read array mode */ | |
251 | } | |
252 | ||
253 | return (info->size); | |
254 | } | |
255 | ||
256 | ||
257 | /*----------------------------------------------------------------------- | |
258 | */ | |
259 | ||
260 | int flash_erase (flash_info_t *info, int s_first, int s_last) | |
261 | { | |
262 | int flag, prot, sect; | |
263 | ulong start, now, last; | |
264 | ||
265 | if ((s_first < 0) || (s_first > s_last)) { | |
266 | if (info->flash_id == FLASH_UNKNOWN) { | |
267 | printf ("- missing\n"); | |
268 | } else { | |
269 | printf ("- no sectors to erase\n"); | |
270 | } | |
271 | return 1; | |
272 | } | |
273 | ||
274 | if ( ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) | |
275 | && ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_SHARP) ) { | |
276 | printf ("Can't erase unknown flash type %08lx - aborted\n", | |
277 | info->flash_id); | |
278 | return 1; | |
279 | } | |
280 | ||
281 | prot = 0; | |
282 | for (sect=s_first; sect<=s_last; ++sect) { | |
283 | if (info->protect[sect]) { | |
284 | prot++; | |
285 | } | |
286 | } | |
287 | ||
288 | if (prot) { | |
289 | printf ("- Warning: %d protected sectors will not be erased!\n", | |
290 | prot); | |
291 | } else { | |
292 | printf ("\n"); | |
293 | } | |
294 | ||
295 | /* Make Sure Block Lock Bit is not set. */ | |
296 | if(clear_block_lock_bit((vu_long *)(info->start[s_first]))){ | |
297 | return 1; | |
298 | } | |
299 | ||
300 | ||
301 | /* Start erase on unprotected sectors */ | |
302 | for (sect = s_first; sect<=s_last; sect++) { | |
303 | if (info->protect[sect] == 0) { /* not protected */ | |
304 | vu_long *addr = (vu_long *)(info->start[sect]); | |
305 | ||
306 | last = start = get_timer (0); | |
307 | ||
308 | /* Disable interrupts which might cause a timeout here */ | |
309 | flag = disable_interrupts(); | |
310 | ||
311 | /* Reset Array */ | |
312 | *addr = 0xffffffff; | |
313 | /* Clear Status Register */ | |
314 | *addr = 0x50505050; | |
315 | /* Single Block Erase Command */ | |
316 | *addr = 0x20202020; | |
317 | /* Confirm */ | |
318 | *addr = 0xD0D0D0D0; | |
319 | ||
320 | if((info->flash_id & FLASH_TYPEMASK) != FLASH_LH28F016SCT) { | |
321 | /* Resume Command, as per errata update */ | |
322 | *addr = 0xD0D0D0D0; | |
323 | } | |
324 | ||
325 | /* re-enable interrupts if necessary */ | |
326 | if (flag) | |
327 | enable_interrupts(); | |
328 | ||
329 | /* wait at least 80us - let's wait 1 ms */ | |
330 | udelay (1000); | |
331 | while ((*addr & 0x80808080) != 0x80808080) { | |
332 | if(*addr & 0x20202020){ | |
333 | printf("Error in Block Erase - Lock Bit may be set!\n"); | |
334 | printf("Status Register = 0x%X\n", (uint)*addr); | |
335 | *addr = 0xFFFFFFFF; /* reset bank */ | |
336 | return 1; | |
337 | } | |
338 | if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) { | |
339 | printf ("Timeout\n"); | |
340 | *addr = 0xFFFFFFFF; /* reset bank */ | |
341 | return 1; | |
342 | } | |
343 | /* show that we're waiting */ | |
344 | if ((now - last) > 1000) { /* every second */ | |
345 | putc ('.'); | |
346 | last = now; | |
347 | } | |
348 | } | |
349 | ||
350 | /* reset to read mode */ | |
351 | *addr = 0xFFFFFFFF; | |
352 | } | |
353 | } | |
354 | ||
355 | printf (" done\n"); | |
356 | return 0; | |
357 | } | |
358 | ||
359 | /*----------------------------------------------------------------------- | |
360 | * Copy memory to flash, returns: | |
361 | * 0 - OK | |
362 | * 1 - write timeout | |
363 | * 2 - Flash not erased | |
364 | */ | |
365 | ||
366 | int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) | |
367 | { | |
368 | ulong cp, wp, data; | |
369 | int i, l, rc; | |
370 | ||
371 | wp = (addr & ~3); /* get lower word aligned address */ | |
372 | ||
373 | /* | |
374 | * handle unaligned start bytes | |
375 | */ | |
376 | if ((l = addr - wp) != 0) { | |
377 | data = 0; | |
378 | for (i=0, cp=wp; i<l; ++i, ++cp) { | |
379 | data = (data << 8) | (*(uchar *)cp); | |
380 | } | |
381 | for (; i<4 && cnt>0; ++i) { | |
382 | data = (data << 8) | *src++; | |
383 | --cnt; | |
384 | ++cp; | |
385 | } | |
386 | for (; cnt==0 && i<4; ++i, ++cp) { | |
387 | data = (data << 8) | (*(uchar *)cp); | |
388 | } | |
389 | ||
390 | if ((rc = write_word(info, wp, data)) != 0) { | |
391 | return (rc); | |
392 | } | |
393 | wp += 4; | |
394 | } | |
395 | ||
396 | /* | |
397 | * handle word aligned part | |
398 | */ | |
399 | while (cnt >= 4) { | |
400 | data = 0; | |
401 | for (i=0; i<4; ++i) { | |
402 | data = (data << 8) | *src++; | |
403 | } | |
404 | if ((rc = write_word(info, wp, data)) != 0) { | |
405 | return (rc); | |
406 | } | |
407 | wp += 4; | |
408 | cnt -= 4; | |
409 | } | |
410 | ||
411 | if (cnt == 0) { | |
412 | return (0); | |
413 | } | |
414 | ||
415 | /* | |
416 | * handle unaligned tail bytes | |
417 | */ | |
418 | data = 0; | |
419 | for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { | |
420 | data = (data << 8) | *src++; | |
421 | --cnt; | |
422 | } | |
423 | for (; i<4; ++i, ++cp) { | |
424 | data = (data << 8) | (*(uchar *)cp); | |
425 | } | |
426 | ||
427 | return (write_word(info, wp, data)); | |
428 | } | |
429 | ||
430 | /*----------------------------------------------------------------------- | |
431 | * Write a word to Flash, returns: | |
432 | * 0 - OK | |
433 | * 1 - write timeout | |
434 | * 2 - Flash not erased | |
435 | */ | |
436 | static int write_word (flash_info_t *info, ulong dest, ulong data) | |
437 | { | |
438 | vu_long *addr = (vu_long *)dest; | |
439 | ulong start, csr; | |
440 | int flag; | |
441 | ||
442 | /* Check if Flash is (sufficiently) erased */ | |
443 | if ((*addr & data) != data) { | |
444 | return (2); | |
445 | } | |
446 | /* Disable interrupts which might cause a timeout here */ | |
447 | flag = disable_interrupts(); | |
448 | ||
449 | /* Write Command */ | |
450 | *addr = 0x10101010; | |
451 | ||
452 | /* Write Data */ | |
453 | *addr = data; | |
454 | ||
455 | /* re-enable interrupts if necessary */ | |
456 | if (flag) | |
457 | enable_interrupts(); | |
458 | ||
459 | /* data polling for D7 */ | |
460 | start = get_timer (0); | |
461 | flag = 0; | |
462 | while (((csr = *addr) & 0x80808080) != 0x80808080) { | |
463 | if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { | |
464 | flag = 1; | |
465 | break; | |
466 | } | |
467 | } | |
468 | if (csr & 0x40404040) { | |
469 | printf ("CSR indicates write error (%08lx) at %08lx\n", csr, (ulong)addr); | |
470 | flag = 1; | |
471 | } | |
472 | ||
473 | /* Clear Status Registers Command */ | |
474 | *addr = 0x50505050; | |
475 | /* Reset to read array mode */ | |
476 | *addr = 0xFFFFFFFF; | |
477 | ||
478 | return (flag); | |
479 | } | |
480 | ||
481 | /*----------------------------------------------------------------------- | |
482 | * Clear Block Lock Bit, returns: | |
483 | * 0 - OK | |
484 | * 1 - Timeout | |
485 | */ | |
486 | ||
487 | static int clear_block_lock_bit(vu_long * addr) | |
488 | { | |
489 | ulong start, now; | |
490 | ||
491 | /* Reset Array */ | |
492 | *addr = 0xffffffff; | |
493 | /* Clear Status Register */ | |
494 | *addr = 0x50505050; | |
495 | ||
496 | *addr = 0x60606060; | |
497 | *addr = 0xd0d0d0d0; | |
498 | ||
499 | start = get_timer (0); | |
500 | while(*addr != 0x80808080){ | |
501 | if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) { | |
502 | printf ("Timeout on clearing Block Lock Bit\n"); | |
503 | *addr = 0xFFFFFFFF; /* reset bank */ | |
504 | return 1; | |
505 | } | |
506 | } | |
507 | return 0; | |
508 | } |