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dm: Drop the block_dev_desc_t typedef
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c609719b 1/*
34c202c7 2 * (C) Copyright 2000-2011
c609719b
WD
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
c609719b
WD
6 */
7
8/*
9 * IDE support
10 */
113bfe48 11
c609719b
WD
12#include <common.h>
13#include <config.h>
14#include <watchdog.h>
15#include <command.h>
16#include <image.h>
17#include <asm/byteorder.h>
f98984cb 18#include <asm/io.h>
735dd97b 19
c609719b
WD
20#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
21# include <pcmcia.h>
22#endif
735dd97b 23
c609719b
WD
24#include <ide.h>
25#include <ata.h>
735dd97b 26
c609719b
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27#ifdef CONFIG_STATUS_LED
28# include <status_led.h>
29#endif
735dd97b 30
5cf91d6b
WD
31#ifdef __PPC__
32# define EIEIO __asm__ volatile ("eieio")
1a344f29 33# define SYNC __asm__ volatile ("sync")
5cf91d6b
WD
34#else
35# define EIEIO /* nothing */
1a344f29 36# define SYNC /* nothing */
c609719b
WD
37#endif
38
c609719b
WD
39/* ------------------------------------------------------------------------- */
40
41/* Current I/O Device */
42static int curr_device = -1;
43
44/* Current offset for IDE0 / IDE1 bus access */
6d0f6bcf
JCPV
45ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
46#if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
47 CONFIG_SYS_ATA_IDE0_OFFSET,
c609719b 48#endif
6d0f6bcf
JCPV
49#if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
50 CONFIG_SYS_ATA_IDE1_OFFSET,
c609719b
WD
51#endif
52};
53
6d0f6bcf 54static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
c609719b 55
4101f687 56struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
c609719b
WD
57/* ------------------------------------------------------------------------- */
58
c609719b
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59#ifdef CONFIG_IDE_RESET
60static void ide_reset (void);
61#else
62#define ide_reset() /* dummy */
63#endif
64
4101f687 65static void ide_ident(struct blk_desc *dev_desc);
c609719b
WD
66static uchar ide_wait (int dev, ulong t);
67
68#define IDE_TIME_OUT 2000 /* 2 sec timeout */
69
70#define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
71
72#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
73
c609719b
WD
74static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
75
6d0f6bcf
JCPV
76#ifndef CONFIG_SYS_ATA_PORT_ADDR
77#define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
566a494f 78#endif
c609719b
WD
79
80#ifdef CONFIG_ATAPI
4101f687
SG
81static void atapi_inquiry(struct blk_desc *dev_desc);
82static ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr,
7c4213f6 83 lbaint_t blkcnt, void *buffer);
c609719b
WD
84#endif
85
86
c609719b
WD
87/* ------------------------------------------------------------------------- */
88
34c202c7 89int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
c609719b 90{
34c202c7
WD
91 int rcode = 0;
92
93 switch (argc) {
94 case 0:
95 case 1:
4c12eeb8 96 return CMD_RET_USAGE;
34c202c7
WD
97 case 2:
98 if (strncmp(argv[1], "res", 3) == 0) {
99 puts("\nReset IDE"
c609719b 100#ifdef CONFIG_IDE_8xx_DIRECT
34c202c7 101 " on PCMCIA " PCMCIA_SLOT_MSG
c609719b 102#endif
34c202c7 103 ": ");
c609719b 104
34c202c7
WD
105 ide_init();
106 return 0;
107 } else if (strncmp(argv[1], "inf", 3) == 0) {
108 int i;
c609719b 109
34c202c7 110 putc('\n');
c609719b 111
34c202c7
WD
112 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
113 if (ide_dev_desc[i].type == DEV_TYPE_UNKNOWN)
114 continue; /* list only known devices */
115 printf("IDE device %d: ", i);
116 dev_print(&ide_dev_desc[i]);
117 }
118 return 0;
c609719b 119
34c202c7
WD
120 } else if (strncmp(argv[1], "dev", 3) == 0) {
121 if ((curr_device < 0)
122 || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
123 puts("\nno IDE devices available\n");
124 return 1;
c609719b 125 }
34c202c7
WD
126 printf("\nIDE device %d: ", curr_device);
127 dev_print(&ide_dev_desc[curr_device]);
128 return 0;
129 } else if (strncmp(argv[1], "part", 4) == 0) {
130 int dev, ok;
131
132 for (ok = 0, dev = 0;
133 dev < CONFIG_SYS_IDE_MAXDEVICE;
134 ++dev) {
135 if (ide_dev_desc[dev].part_type !=
136 PART_TYPE_UNKNOWN) {
137 ++ok;
138 if (dev)
139 putc('\n');
140 print_part(&ide_dev_desc[dev]);
141 }
142 }
143 if (!ok) {
144 puts("\nno IDE devices available\n");
145 rcode++;
146 }
147 return rcode;
c609719b 148 }
4c12eeb8 149 return CMD_RET_USAGE;
34c202c7
WD
150 case 3:
151 if (strncmp(argv[1], "dev", 3) == 0) {
152 int dev = (int) simple_strtoul(argv[2], NULL, 10);
c609719b 153
34c202c7
WD
154 printf("\nIDE device %d: ", dev);
155 if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
156 puts("unknown device\n");
157 return 1;
158 }
159 dev_print(&ide_dev_desc[dev]);
160 /*ide_print (dev); */
c609719b 161
34c202c7
WD
162 if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN)
163 return 1;
c609719b 164
34c202c7 165 curr_device = dev;
c609719b 166
34c202c7
WD
167 puts("... is now current device\n");
168
169 return 0;
170 } else if (strncmp(argv[1], "part", 4) == 0) {
171 int dev = (int) simple_strtoul(argv[2], NULL, 10);
c609719b 172
34c202c7 173 if (ide_dev_desc[dev].part_type != PART_TYPE_UNKNOWN) {
c609719b 174 print_part(&ide_dev_desc[dev]);
34c202c7
WD
175 } else {
176 printf("\nIDE device %d not available\n",
177 dev);
178 rcode = 1;
179 }
180 return rcode;
c609719b 181 }
c609719b 182
4c12eeb8 183 return CMD_RET_USAGE;
34c202c7
WD
184 default:
185 /* at least 4 args */
c609719b 186
34c202c7
WD
187 if (strcmp(argv[1], "read") == 0) {
188 ulong addr = simple_strtoul(argv[2], NULL, 16);
189 ulong cnt = simple_strtoul(argv[4], NULL, 16);
4101f687 190 struct blk_desc *dev_desc;
34c202c7 191 ulong n;
c609719b 192
6d0f6bcf 193#ifdef CONFIG_SYS_64BIT_LBA
34c202c7 194 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 195
34c202c7
WD
196 printf("\nIDE read: device %d block # %lld, count %ld ... ",
197 curr_device, blk, cnt);
42dfe7a1 198#else
34c202c7
WD
199 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
200
201 printf("\nIDE read: device %d block # %ld, count %ld ... ",
202 curr_device, blk, cnt);
203#endif
204
7c4213f6
SW
205 dev_desc = &ide_dev_desc[curr_device];
206 n = dev_desc->block_read(dev_desc, blk, cnt,
207 (ulong *)addr);
34c202c7
WD
208 /* flush cache after read */
209 flush_cache(addr,
210 cnt * ide_dev_desc[curr_device].blksz);
211
212 printf("%ld blocks read: %s\n",
213 n, (n == cnt) ? "OK" : "ERROR");
214 if (n == cnt)
215 return 0;
216 else
217 return 1;
218 } else if (strcmp(argv[1], "write") == 0) {
219 ulong addr = simple_strtoul(argv[2], NULL, 16);
220 ulong cnt = simple_strtoul(argv[4], NULL, 16);
221 ulong n;
c609719b 222
6d0f6bcf 223#ifdef CONFIG_SYS_64BIT_LBA
34c202c7 224 lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
c609719b 225
34c202c7
WD
226 printf("\nIDE write: device %d block # %lld, count %ld ... ",
227 curr_device, blk, cnt);
42dfe7a1 228#else
34c202c7 229 lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
42dfe7a1 230
34c202c7
WD
231 printf("\nIDE write: device %d block # %ld, count %ld ... ",
232 curr_device, blk, cnt);
42dfe7a1 233#endif
7c4213f6
SW
234 n = ide_write(&ide_dev_desc[curr_device], blk, cnt,
235 (ulong *)addr);
c609719b 236
34c202c7
WD
237 printf("%ld blocks written: %s\n",
238 n, (n == cnt) ? "OK" : "ERROR");
239 if (n == cnt)
240 return 0;
241 else
242 return 1;
243 } else {
4c12eeb8 244 return CMD_RET_USAGE;
34c202c7 245 }
c609719b 246
34c202c7 247 return rcode;
c609719b 248 }
c609719b
WD
249}
250
34c202c7 251int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
c609719b 252{
7405a133 253 return common_diskboot(cmdtp, "ide", argc, argv);
c609719b
WD
254}
255
256/* ------------------------------------------------------------------------- */
257
288afdc9 258__weak void ide_led(uchar led, uchar status)
19be2ea2
PH
259{
260#if defined(CONFIG_IDE_LED) && defined(PER8_BASE) /* required by LED_PORT */
261 static uchar led_buffer; /* Buffer for current LED status */
262
263 uchar *led_port = LED_PORT;
264
265 if (status) /* switch LED on */
266 led_buffer |= led;
267 else /* switch LED off */
268 led_buffer &= ~led;
269
270 *led_port = led_buffer;
271#endif
272}
273
19be2ea2
PH
274#ifndef CONFIG_IDE_LED /* define LED macros, they are not used anyways */
275# define DEVICE_LED(x) 0
276# define LED_IDE1 1
277# define LED_IDE2 2
278#endif
279
280/* ------------------------------------------------------------------------- */
281
288afdc9 282__weak void ide_outb(int dev, int port, unsigned char val)
f2302d44 283{
34c202c7
WD
284 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
285 dev, port, val,
286 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
0abddf82
ML
287
288#if defined(CONFIG_IDE_AHB)
289 if (port) {
290 /* write command */
291 ide_write_register(dev, port, val);
292 } else {
293 /* write data */
294 outb(val, (ATA_CURR_BASE(dev)));
295 }
296#else
34c202c7 297 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
0abddf82 298#endif
f2302d44 299}
0abddf82 300
288afdc9 301__weak unsigned char ide_inb(int dev, int port)
f2302d44
SR
302{
303 uchar val;
0abddf82
ML
304
305#if defined(CONFIG_IDE_AHB)
306 val = ide_read_register(dev, port);
307#else
34c202c7 308 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
0abddf82
ML
309#endif
310
34c202c7
WD
311 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
312 dev, port,
313 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
f2302d44
SR
314 return val;
315}
34c202c7 316
34c202c7 317void ide_init(void)
c609719b 318{
c609719b
WD
319 unsigned char c;
320 int i, bus;
34c202c7 321
9fd5e31f 322#ifdef CONFIG_IDE_8xx_PCCARD
34c202c7
WD
323 extern int ide_devices_found; /* Initialized in check_ide_device() */
324#endif /* CONFIG_IDE_8xx_PCCARD */
9fd5e31f
WD
325
326#ifdef CONFIG_IDE_PREINIT
327 WATCHDOG_RESET();
328
34c202c7
WD
329 if (ide_preinit()) {
330 puts("ide_preinit failed\n");
9fd5e31f
WD
331 return;
332 }
34c202c7 333#endif /* CONFIG_IDE_PREINIT */
c609719b 334
c609719b
WD
335 WATCHDOG_RESET();
336
34c202c7
WD
337 /*
338 * Reset the IDE just to be sure.
c609719b
WD
339 * Light LED's to show
340 */
34c202c7
WD
341 ide_led((LED_IDE1 | LED_IDE2), 1); /* LED's on */
342
343 /* ATAPI Drives seems to need a proper IDE Reset */
344 ide_reset();
c609719b 345
8d1165e1
PH
346#ifdef CONFIG_IDE_INIT_POSTRESET
347 WATCHDOG_RESET();
c609719b 348
8d1165e1
PH
349 if (ide_init_postreset()) {
350 puts("ide_preinit_postreset failed\n");
351 return;
352 }
353#endif /* CONFIG_IDE_INIT_POSTRESET */
c609719b
WD
354
355 /*
356 * Wait for IDE to get ready.
357 * According to spec, this can take up to 31 seconds!
358 */
34c202c7
WD
359 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
360 int dev =
361 bus * (CONFIG_SYS_IDE_MAXDEVICE /
362 CONFIG_SYS_IDE_MAXBUS);
c609719b 363
6069ff26
WD
364#ifdef CONFIG_IDE_8xx_PCCARD
365 /* Skip non-ide devices from probing */
366 if ((ide_devices_found & (1 << bus)) == 0) {
34c202c7 367 ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
6069ff26
WD
368 continue;
369 }
370#endif
34c202c7 371 printf("Bus %d: ", bus);
c609719b
WD
372
373 ide_bus_ok[bus] = 0;
374
375 /* Select device
376 */
34c202c7
WD
377 udelay(100000); /* 100 ms */
378 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
379 udelay(100000); /* 100 ms */
c609719b
WD
380 i = 0;
381 do {
34c202c7 382 udelay(10000); /* 10 ms */
c609719b 383
34c202c7 384 c = ide_inb(dev, ATA_STATUS);
c609719b
WD
385 i++;
386 if (i > (ATA_RESET_TIME * 100)) {
34c202c7
WD
387 puts("** Timeout **\n");
388 /* LED's off */
389 ide_led((LED_IDE1 | LED_IDE2), 0);
c609719b
WD
390 return;
391 }
34c202c7
WD
392 if ((i >= 100) && ((i % 100) == 0))
393 putc('.');
394
c609719b
WD
395 } while (c & ATA_STAT_BUSY);
396
397 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
34c202c7
WD
398 puts("not available ");
399 debug("Status = 0x%02X ", c);
400#ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
401 } else if ((c & ATA_STAT_READY) == 0) {
402 puts("not available ");
403 debug("Status = 0x%02X ", c);
c609719b
WD
404#endif
405 } else {
34c202c7 406 puts("OK ");
c609719b
WD
407 ide_bus_ok[bus] = 1;
408 }
409 WATCHDOG_RESET();
410 }
c7de829c 411
34c202c7 412 putc('\n');
c609719b 413
34c202c7 414 ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
c609719b
WD
415
416 curr_device = -1;
34c202c7 417 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
c609719b 418 int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
34c202c7
WD
419 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
420 ide_dev_desc[i].if_type = IF_TYPE_IDE;
421 ide_dev_desc[i].dev = i;
422 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
423 ide_dev_desc[i].blksz = 0;
0472fbfd
EE
424 ide_dev_desc[i].log2blksz =
425 LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
34c202c7
WD
426 ide_dev_desc[i].lba = 0;
427 ide_dev_desc[i].block_read = ide_read;
0abddf82 428 ide_dev_desc[i].block_write = ide_write;
c609719b
WD
429 if (!ide_bus_ok[IDE_BUS(i)])
430 continue;
34c202c7 431 ide_led(led, 1); /* LED on */
c609719b 432 ide_ident(&ide_dev_desc[i]);
34c202c7 433 ide_led(led, 0); /* LED off */
c609719b 434 dev_print(&ide_dev_desc[i]);
34c202c7 435
c609719b 436 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
34c202c7
WD
437 /* initialize partition type */
438 init_part(&ide_dev_desc[i]);
c609719b
WD
439 if (curr_device < 0)
440 curr_device = i;
441 }
442 }
443 WATCHDOG_RESET();
444}
445
446/* ------------------------------------------------------------------------- */
447
df3fc526 448#ifdef CONFIG_PARTITIONS
4101f687 449struct blk_desc *ide_get_dev(int dev)
c609719b 450{
6d0f6bcf 451 return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
c609719b 452}
df3fc526 453#endif
c609719b 454
c609719b
WD
455/* ------------------------------------------------------------------------- */
456
5da627a4 457/* We only need to swap data if we are running on a big endian cpu. */
4d1361d8 458#if defined(__LITTLE_ENDIAN)
288afdc9 459__weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
f5b82c0f
PH
460{
461 ide_input_data(dev, sect_buf, words);
462}
5da627a4 463#else
288afdc9 464__weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
c609719b 465{
34c202c7
WD
466 volatile ushort *pbuf =
467 (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
468 ushort *dbuf = (ushort *) sect_buf;
1a344f29 469
34c202c7
WD
470 debug("in input swap data base for read is %lx\n",
471 (unsigned long) pbuf);
1a344f29
WD
472
473 while (words--) {
0c32d96d 474#ifdef __MIPS__
34c202c7
WD
475 *dbuf++ = swab16p((u16 *) pbuf);
476 *dbuf++ = swab16p((u16 *) pbuf);
0c32d96d 477#else
1a344f29
WD
478 *dbuf++ = ld_le16(pbuf);
479 *dbuf++ = ld_le16(pbuf);
0c32d96d 480#endif /* !MIPS */
1a344f29 481 }
c609719b 482}
4d1361d8 483#endif /* __LITTLE_ENDIAN */
2262cfee
WD
484
485
f2a37fcd 486#if defined(CONFIG_IDE_SWAP_IO)
288afdc9 487__weak void ide_output_data(int dev, const ulong *sect_buf, int words)
c609719b 488{
34c202c7
WD
489 ushort *dbuf;
490 volatile ushort *pbuf;
1a344f29 491
34c202c7
WD
492 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
493 dbuf = (ushort *) sect_buf;
1a344f29
WD
494 while (words--) {
495 EIEIO;
496 *pbuf = *dbuf++;
497 EIEIO;
498 *pbuf = *dbuf++;
499 }
c609719b 500}
34c202c7 501#else /* ! CONFIG_IDE_SWAP_IO */
288afdc9 502__weak void ide_output_data(int dev, const ulong *sect_buf, int words)
2262cfee 503{
0abddf82
ML
504#if defined(CONFIG_IDE_AHB)
505 ide_write_data(dev, sect_buf, words);
506#else
34c202c7 507 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
0abddf82 508#endif
2262cfee 509}
34c202c7 510#endif /* CONFIG_IDE_SWAP_IO */
c609719b 511
f2a37fcd 512#if defined(CONFIG_IDE_SWAP_IO)
288afdc9 513__weak void ide_input_data(int dev, ulong *sect_buf, int words)
c609719b 514{
34c202c7
WD
515 ushort *dbuf;
516 volatile ushort *pbuf;
1a344f29 517
34c202c7
WD
518 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
519 dbuf = (ushort *) sect_buf;
1a344f29
WD
520
521 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
522
523 while (words--) {
cd172b71 524 EIEIO;
1a344f29 525 *dbuf++ = *pbuf;
cd172b71 526 EIEIO;
1a344f29 527 *dbuf++ = *pbuf;
a522fa0e 528 }
c609719b 529}
34c202c7 530#else /* ! CONFIG_IDE_SWAP_IO */
288afdc9 531__weak void ide_input_data(int dev, ulong *sect_buf, int words)
2262cfee 532{
0abddf82
ML
533#if defined(CONFIG_IDE_AHB)
534 ide_read_data(dev, sect_buf, words);
535#else
34c202c7 536 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
0abddf82 537#endif
2262cfee
WD
538}
539
34c202c7 540#endif /* CONFIG_IDE_SWAP_IO */
c609719b
WD
541
542/* -------------------------------------------------------------------------
543 */
4101f687 544static void ide_ident(struct blk_desc *dev_desc)
c609719b 545{
c609719b 546 unsigned char c;
b18eabfa 547 hd_driveid_t iop;
c609719b 548
64f70bed
WD
549#ifdef CONFIG_ATAPI
550 int retries = 0;
c7de829c 551#endif
c609719b 552 int device;
c609719b 553
34c202c7
WD
554 device = dev_desc->dev;
555 printf(" Device %d: ", device);
556
557 ide_led(DEVICE_LED(device), 1); /* LED on */
c609719b
WD
558 /* Select device
559 */
34c202c7
WD
560 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
561 dev_desc->if_type = IF_TYPE_IDE;
c609719b 562#ifdef CONFIG_ATAPI
c7de829c 563
34c202c7
WD
564 retries = 0;
565
566 /* Warning: This will be tricky to read */
567 while (retries <= 1) {
568 /* check signature */
569 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
570 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
571 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
572 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
573 /* ATAPI Signature found */
574 dev_desc->if_type = IF_TYPE_ATAPI;
575 /*
576 * Start Ident Command
577 */
578 ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
579 /*
580 * Wait for completion - ATAPI devices need more time
581 * to become ready
582 */
583 c = ide_wait(device, ATAPI_TIME_OUT);
584 } else
c609719b 585#endif
1a344f29 586 {
34c202c7
WD
587 /*
588 * Start Ident Command
589 */
590 ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
591
592 /*
593 * Wait for completion
594 */
595 c = ide_wait(device, IDE_TIME_OUT);
1a344f29 596 }
34c202c7
WD
597 ide_led(DEVICE_LED(device), 0); /* LED off */
598
599 if (((c & ATA_STAT_DRQ) == 0) ||
600 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
601#ifdef CONFIG_ATAPI
602 {
603 /*
604 * Need to soft reset the device
605 * in case it's an ATAPI...
606 */
607 debug("Retrying...\n");
608 ide_outb(device, ATA_DEV_HD,
609 ATA_LBA | ATA_DEVICE(device));
610 udelay(100000);
611 ide_outb(device, ATA_COMMAND, 0x08);
612 udelay(500000); /* 500 ms */
613 }
614 /*
615 * Select device
616 */
617 ide_outb(device, ATA_DEV_HD,
618 ATA_LBA | ATA_DEVICE(device));
619 retries++;
64f70bed 620#else
34c202c7 621 return;
64f70bed 622#endif
34c202c7 623 }
64f70bed 624#ifdef CONFIG_ATAPI
34c202c7
WD
625 else
626 break;
627 } /* see above - ugly to read */
64f70bed 628
34c202c7 629 if (retries == 2) /* Not found */
64f70bed
WD
630 return;
631#endif
c609719b 632
f5b82c0f 633 ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
c609719b 634
34c202c7
WD
635 ident_cpy((unsigned char *) dev_desc->revision, iop.fw_rev,
636 sizeof(dev_desc->revision));
637 ident_cpy((unsigned char *) dev_desc->vendor, iop.model,
638 sizeof(dev_desc->vendor));
639 ident_cpy((unsigned char *) dev_desc->product, iop.serial_no,
640 sizeof(dev_desc->product));
c3f9d493
WD
641#ifdef __LITTLE_ENDIAN
642 /*
bcdf1d2c
RR
643 * firmware revision, model, and serial number have Big Endian Byte
644 * order in Word. Convert all three to little endian.
c3f9d493
WD
645 *
646 * See CF+ and CompactFlash Specification Revision 2.0:
bcdf1d2c 647 * 6.2.1.6: Identify Drive, Table 39 for more details
c3f9d493
WD
648 */
649
34c202c7
WD
650 strswab(dev_desc->revision);
651 strswab(dev_desc->vendor);
652 strswab(dev_desc->product);
c3f9d493 653#endif /* __LITTLE_ENDIAN */
c609719b 654
b18eabfa 655 if ((iop.config & 0x0080) == 0x0080)
c609719b
WD
656 dev_desc->removable = 1;
657 else
658 dev_desc->removable = 0;
659
c609719b 660#ifdef CONFIG_ATAPI
34c202c7 661 if (dev_desc->if_type == IF_TYPE_ATAPI) {
c609719b
WD
662 atapi_inquiry(dev_desc);
663 return;
664 }
665#endif /* CONFIG_ATAPI */
666
c3f9d493 667#ifdef __BIG_ENDIAN
c609719b 668 /* swap shorts */
b18eabfa 669 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
34c202c7 670#else /* ! __BIG_ENDIAN */
c3f9d493
WD
671 /*
672 * do not swap shorts on little endian
673 *
674 * See CF+ and CompactFlash Specification Revision 2.0:
675 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
676 */
b18eabfa 677 dev_desc->lba = iop.lba_capacity;
34c202c7 678#endif /* __BIG_ENDIAN */
c40b2956 679
42dfe7a1 680#ifdef CONFIG_LBA48
34c202c7 681 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
6e592385 682 dev_desc->lba48 = 1;
34c202c7
WD
683 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
684 ((unsigned long long) iop.lba48_capacity[1] << 16) |
685 ((unsigned long long) iop.lba48_capacity[2] << 32) |
686 ((unsigned long long) iop.lba48_capacity[3] << 48);
c40b2956 687 } else {
c40b2956
WD
688 dev_desc->lba48 = 0;
689 }
690#endif /* CONFIG_LBA48 */
c609719b 691 /* assuming HD */
34c202c7
WD
692 dev_desc->type = DEV_TYPE_HARDDISK;
693 dev_desc->blksz = ATA_BLOCKSIZE;
0472fbfd 694 dev_desc->log2blksz = LOG2(dev_desc->blksz);
34c202c7
WD
695 dev_desc->lun = 0; /* just to fill something in... */
696
697#if 0 /* only used to test the powersaving mode,
698 * if enabled, the drive goes after 5 sec
699 * in standby mode */
700 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
701 c = ide_wait(device, IDE_TIME_OUT);
702 ide_outb(device, ATA_SECT_CNT, 1);
703 ide_outb(device, ATA_LBA_LOW, 0);
704 ide_outb(device, ATA_LBA_MID, 0);
705 ide_outb(device, ATA_LBA_HIGH, 0);
706 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
707 ide_outb(device, ATA_COMMAND, 0xe3);
708 udelay(50);
709 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
c609719b
WD
710#endif
711}
712
713
714/* ------------------------------------------------------------------------- */
715
4101f687 716ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
7c4213f6 717 void *buffer)
c609719b 718{
7c4213f6 719 int device = block_dev->dev;
c609719b
WD
720 ulong n = 0;
721 unsigned char c;
34c202c7
WD
722 unsigned char pwrsave = 0; /* power save */
723
42dfe7a1 724#ifdef CONFIG_LBA48
c40b2956 725 unsigned char lba48 = 0;
c609719b 726
413bf586 727 if (blknr & 0x0000fffff0000000ULL) {
c40b2956
WD
728 /* more than 28 bits used, use 48bit mode */
729 lba48 = 1;
730 }
731#endif
ff8fef56 732 debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
34c202c7 733 device, blknr, blkcnt, (ulong) buffer);
c609719b 734
34c202c7 735 ide_led(DEVICE_LED(device), 1); /* LED on */
c609719b
WD
736
737 /* Select device
738 */
34c202c7
WD
739 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
740 c = ide_wait(device, IDE_TIME_OUT);
c609719b
WD
741
742 if (c & ATA_STAT_BUSY) {
34c202c7 743 printf("IDE read: device %d not ready\n", device);
c609719b
WD
744 goto IDE_READ_E;
745 }
746
747 /* first check if the drive is in Powersaving mode, if yes,
748 * increase the timeout value */
34c202c7
WD
749 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
750 udelay(50);
c609719b 751
34c202c7 752 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
c609719b
WD
753
754 if (c & ATA_STAT_BUSY) {
34c202c7 755 printf("IDE read: device %d not ready\n", device);
c609719b
WD
756 goto IDE_READ_E;
757 }
758 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
34c202c7 759 printf("No Powersaving mode %X\n", c);
c609719b 760 } else {
34c202c7
WD
761 c = ide_inb(device, ATA_SECT_CNT);
762 debug("Powersaving %02X\n", c);
763 if (c == 0)
764 pwrsave = 1;
c609719b
WD
765 }
766
767
768 while (blkcnt-- > 0) {
769
34c202c7 770 c = ide_wait(device, IDE_TIME_OUT);
c609719b
WD
771
772 if (c & ATA_STAT_BUSY) {
34c202c7 773 printf("IDE read: device %d not ready\n", device);
c609719b
WD
774 break;
775 }
42dfe7a1 776#ifdef CONFIG_LBA48
c40b2956
WD
777 if (lba48) {
778 /* write high bits */
34c202c7
WD
779 ide_outb(device, ATA_SECT_CNT, 0);
780 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
6d0f6bcf 781#ifdef CONFIG_SYS_64BIT_LBA
34c202c7
WD
782 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
783 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
413bf586 784#else
34c202c7
WD
785 ide_outb(device, ATA_LBA_MID, 0);
786 ide_outb(device, ATA_LBA_HIGH, 0);
413bf586 787#endif
c40b2956
WD
788 }
789#endif
34c202c7
WD
790 ide_outb(device, ATA_SECT_CNT, 1);
791 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
792 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
793 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 794
42dfe7a1 795#ifdef CONFIG_LBA48
c40b2956 796 if (lba48) {
34c202c7
WD
797 ide_outb(device, ATA_DEV_HD,
798 ATA_LBA | ATA_DEVICE(device));
799 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
c40b2956
WD
800
801 } else
802#endif
803 {
34c202c7
WD
804 ide_outb(device, ATA_DEV_HD, ATA_LBA |
805 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
806 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
c40b2956 807 }
c609719b 808
34c202c7 809 udelay(50);
c609719b 810
34c202c7
WD
811 if (pwrsave) {
812 /* may take up to 4 sec */
813 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
814 pwrsave = 0;
c609719b 815 } else {
34c202c7
WD
816 /* can't take over 500 ms */
817 c = ide_wait(device, IDE_TIME_OUT);
c609719b
WD
818 }
819
34c202c7
WD
820 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
821 ATA_STAT_DRQ) {
ff8fef56
SS
822 printf("Error (no IRQ) dev %d blk " LBAF ": status "
823 "%#02x\n", device, blknr, c);
c609719b
WD
824 break;
825 }
826
f5b82c0f 827 ide_input_data(device, buffer, ATA_SECTORWORDS);
34c202c7 828 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
c609719b
WD
829
830 ++n;
831 ++blknr;
0b94504d 832 buffer += ATA_BLOCKSIZE;
c609719b
WD
833 }
834IDE_READ_E:
34c202c7 835 ide_led(DEVICE_LED(device), 0); /* LED off */
c609719b
WD
836 return (n);
837}
838
839/* ------------------------------------------------------------------------- */
840
841
4101f687 842ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
7c4213f6 843 const void *buffer)
c609719b 844{
7c4213f6 845 int device = block_dev->dev;
c609719b
WD
846 ulong n = 0;
847 unsigned char c;
34c202c7 848
42dfe7a1 849#ifdef CONFIG_LBA48
c40b2956
WD
850 unsigned char lba48 = 0;
851
413bf586 852 if (blknr & 0x0000fffff0000000ULL) {
c40b2956
WD
853 /* more than 28 bits used, use 48bit mode */
854 lba48 = 1;
855 }
856#endif
c609719b 857
34c202c7 858 ide_led(DEVICE_LED(device), 1); /* LED on */
c609719b
WD
859
860 /* Select device
861 */
34c202c7 862 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
c609719b
WD
863
864 while (blkcnt-- > 0) {
865
34c202c7 866 c = ide_wait(device, IDE_TIME_OUT);
c609719b
WD
867
868 if (c & ATA_STAT_BUSY) {
34c202c7 869 printf("IDE read: device %d not ready\n", device);
c609719b
WD
870 goto WR_OUT;
871 }
42dfe7a1 872#ifdef CONFIG_LBA48
c40b2956
WD
873 if (lba48) {
874 /* write high bits */
34c202c7
WD
875 ide_outb(device, ATA_SECT_CNT, 0);
876 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
6d0f6bcf 877#ifdef CONFIG_SYS_64BIT_LBA
34c202c7
WD
878 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
879 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
413bf586 880#else
34c202c7
WD
881 ide_outb(device, ATA_LBA_MID, 0);
882 ide_outb(device, ATA_LBA_HIGH, 0);
413bf586 883#endif
c40b2956
WD
884 }
885#endif
34c202c7
WD
886 ide_outb(device, ATA_SECT_CNT, 1);
887 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
888 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
889 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
c40b2956 890
42dfe7a1 891#ifdef CONFIG_LBA48
c40b2956 892 if (lba48) {
34c202c7
WD
893 ide_outb(device, ATA_DEV_HD,
894 ATA_LBA | ATA_DEVICE(device));
895 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
c40b2956
WD
896
897 } else
898#endif
899 {
34c202c7
WD
900 ide_outb(device, ATA_DEV_HD, ATA_LBA |
901 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
902 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
c40b2956 903 }
c609719b 904
34c202c7 905 udelay(50);
c609719b 906
34c202c7
WD
907 /* can't take over 500 ms */
908 c = ide_wait(device, IDE_TIME_OUT);
c609719b 909
34c202c7
WD
910 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
911 ATA_STAT_DRQ) {
ff8fef56
SS
912 printf("Error (no IRQ) dev %d blk " LBAF ": status "
913 "%#02x\n", device, blknr, c);
c609719b
WD
914 goto WR_OUT;
915 }
916
f5b82c0f 917 ide_output_data(device, buffer, ATA_SECTORWORDS);
34c202c7 918 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
c609719b
WD
919 ++n;
920 ++blknr;
0b94504d 921 buffer += ATA_BLOCKSIZE;
c609719b
WD
922 }
923WR_OUT:
34c202c7 924 ide_led(DEVICE_LED(device), 0); /* LED off */
c609719b
WD
925 return (n);
926}
927
928/* ------------------------------------------------------------------------- */
929
930/*
931 * copy src to dest, skipping leading and trailing blanks and null
932 * terminate the string
7d7ce412 933 * "len" is the size of available memory including the terminating '\0'
c609719b 934 */
34c202c7
WD
935static void ident_cpy(unsigned char *dst, unsigned char *src,
936 unsigned int len)
c609719b 937{
7d7ce412
WD
938 unsigned char *end, *last;
939
940 last = dst;
34c202c7 941 end = src + len - 1;
7d7ce412
WD
942
943 /* reserve space for '\0' */
944 if (len < 2)
945 goto OUT;
efa329cb 946
7d7ce412 947 /* skip leading white space */
34c202c7 948 while ((*src) && (src < end) && (*src == ' '))
7d7ce412
WD
949 ++src;
950
951 /* copy string, omitting trailing white space */
34c202c7 952 while ((*src) && (src < end)) {
7d7ce412
WD
953 *dst++ = *src;
954 if (*src++ != ' ')
955 last = dst;
c609719b 956 }
7d7ce412
WD
957OUT:
958 *last = '\0';
c609719b
WD
959}
960
961/* ------------------------------------------------------------------------- */
962
963/*
964 * Wait until Busy bit is off, or timeout (in ms)
965 * Return last status
966 */
34c202c7 967static uchar ide_wait(int dev, ulong t)
c609719b 968{
34c202c7 969 ulong delay = 10 * t; /* poll every 100 us */
c609719b
WD
970 uchar c;
971
2262cfee 972 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
34c202c7
WD
973 udelay(100);
974 if (delay-- == 0)
c609719b 975 break;
c609719b
WD
976 }
977 return (c);
978}
979
980/* ------------------------------------------------------------------------- */
981
982#ifdef CONFIG_IDE_RESET
983extern void ide_set_reset(int idereset);
984
34c202c7 985static void ide_reset(void)
c609719b 986{
c609719b
WD
987 int i;
988
989 curr_device = -1;
34c202c7 990 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
c609719b 991 ide_bus_ok[i] = 0;
34c202c7 992 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
c609719b
WD
993 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
994
34c202c7 995 ide_set_reset(1); /* assert reset */
c609719b 996
e175eacc
MK
997 /* the reset signal shall be asserted for et least 25 us */
998 udelay(25);
999
c609719b
WD
1000 WATCHDOG_RESET();
1001
c609719b
WD
1002 /* de-assert RESET signal */
1003 ide_set_reset(0);
1004
1005 /* wait 250 ms */
34c202c7
WD
1006 for (i = 0; i < 250; ++i)
1007 udelay(1000);
c609719b
WD
1008}
1009
34c202c7 1010#endif /* CONFIG_IDE_RESET */
c609719b
WD
1011
1012/* ------------------------------------------------------------------------- */
1013
3887c3fb
HS
1014#if defined(CONFIG_OF_IDE_FIXUP)
1015int ide_device_present(int dev)
1016{
1017 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1018 return 0;
1019 return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
1020}
1021#endif
c609719b
WD
1022/* ------------------------------------------------------------------------- */
1023
1024#ifdef CONFIG_ATAPI
1025/****************************************************************************
1026 * ATAPI Support
1027 */
1028
f2a37fcd 1029#if defined(CONFIG_IDE_SWAP_IO)
c609719b
WD
1030/* since ATAPI may use commands with not 4 bytes alligned length
1031 * we have our own transfer functions, 2 bytes alligned */
288afdc9 1032__weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
c609719b 1033{
34c202c7
WD
1034 ushort *dbuf;
1035 volatile ushort *pbuf;
c609719b 1036
34c202c7
WD
1037 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
1038 dbuf = (ushort *) sect_buf;
db01a2ea 1039
34c202c7
WD
1040 debug("in output data shorts base for read is %lx\n",
1041 (unsigned long) pbuf);
db01a2ea 1042
c609719b 1043 while (shorts--) {
5cf91d6b 1044 EIEIO;
1a344f29 1045 *pbuf = *dbuf++;
c609719b 1046 }
1a344f29
WD
1047}
1048
288afdc9 1049__weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
1a344f29 1050{
34c202c7
WD
1051 ushort *dbuf;
1052 volatile ushort *pbuf;
1a344f29 1053
34c202c7
WD
1054 pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
1055 dbuf = (ushort *) sect_buf;
1a344f29 1056
34c202c7
WD
1057 debug("in input data shorts base for read is %lx\n",
1058 (unsigned long) pbuf);
1a344f29
WD
1059
1060 while (shorts--) {
1061 EIEIO;
1062 *dbuf++ = *pbuf;
1063 }
c609719b
WD
1064}
1065
34c202c7 1066#else /* ! CONFIG_IDE_SWAP_IO */
288afdc9 1067__weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
2262cfee 1068{
34c202c7 1069 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD
1070}
1071
288afdc9 1072__weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
2262cfee 1073{
34c202c7 1074 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
2262cfee
WD
1075}
1076
34c202c7 1077#endif /* CONFIG_IDE_SWAP_IO */
2262cfee 1078
c609719b
WD
1079/*
1080 * Wait until (Status & mask) == res, or timeout (in ms)
1081 * Return last status
1082 * This is used since some ATAPI CD ROMs clears their Busy Bit first
1083 * and then they set their DRQ Bit
1084 */
34c202c7 1085static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
c609719b 1086{
34c202c7 1087 ulong delay = 10 * t; /* poll every 100 us */
c609719b
WD
1088 uchar c;
1089
34c202c7
WD
1090 /* prevents to read the status before valid */
1091 c = ide_inb(dev, ATA_DEV_CTL);
1092
2262cfee 1093 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
c609719b 1094 /* break if error occurs (doesn't make sense to wait more) */
34c202c7 1095 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
c609719b 1096 break;
34c202c7
WD
1097 udelay(100);
1098 if (delay-- == 0)
c609719b 1099 break;
c609719b
WD
1100 }
1101 return (c);
1102}
1103
1104/*
1105 * issue an atapi command
1106 */
34c202c7
WD
1107unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
1108 unsigned char *buffer, int buflen)
c609719b 1109{
34c202c7 1110 unsigned char c, err, mask, res;
c609719b 1111 int n;
34c202c7
WD
1112
1113 ide_led(DEVICE_LED(device), 1); /* LED on */
c609719b
WD
1114
1115 /* Select device
1116 */
34c202c7 1117 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
c609719b 1118 res = 0;
34c202c7
WD
1119 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1120 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
c609719b 1121 if ((c & mask) != res) {
34c202c7
WD
1122 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
1123 c);
1124 err = 0xFF;
c609719b
WD
1125 goto AI_OUT;
1126 }
1127 /* write taskfile */
34c202c7
WD
1128 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
1129 ide_outb(device, ATA_SECT_CNT, 0);
1130 ide_outb(device, ATA_SECT_NUM, 0);
1131 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
1132 ide_outb(device, ATA_CYL_HIGH,
1133 (unsigned char) ((buflen >> 8) & 0xFF));
1134 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1135
1136 ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
1137 udelay(50);
1138
1139 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
c609719b 1140 res = ATA_STAT_DRQ;
34c202c7 1141 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
c609719b 1142
34c202c7
WD
1143 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
1144 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
1145 device, c);
1146 err = 0xFF;
c609719b
WD
1147 goto AI_OUT;
1148 }
1149
34c202c7 1150 /* write command block */
f5b82c0f 1151 ide_output_data_shorts(device, (unsigned short *) ccb, ccblen / 2);
34c202c7 1152
53677ef1 1153 /* ATAPI Command written wait for completition */
34c202c7 1154 udelay(5000); /* device must set bsy */
c609719b 1155
34c202c7
WD
1156 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
1157 /*
1158 * if no data wait for DRQ = 0 BSY = 0
1159 * if data wait for DRQ = 1 BSY = 0
1160 */
1161 res = 0;
1162 if (buflen)
c609719b 1163 res = ATA_STAT_DRQ;
34c202c7
WD
1164 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
1165 if ((c & mask) != res) {
c609719b 1166 if (c & ATA_STAT_ERR) {
34c202c7
WD
1167 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
1168 debug("atapi_issue 1 returned sense key %X status %02X\n",
1169 err, c);
c609719b 1170 } else {
34c202c7
WD
1171 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
1172 ccb[0], c);
1173 err = 0xFF;
c609719b
WD
1174 }
1175 goto AI_OUT;
1176 }
34c202c7
WD
1177 n = ide_inb(device, ATA_CYL_HIGH);
1178 n <<= 8;
1179 n += ide_inb(device, ATA_CYL_LOW);
1180 if (n > buflen) {
1181 printf("ERROR, transfer bytes %d requested only %d\n", n,
1182 buflen);
1183 err = 0xff;
c609719b
WD
1184 goto AI_OUT;
1185 }
34c202c7
WD
1186 if ((n == 0) && (buflen < 0)) {
1187 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
1188 err = 0xff;
c609719b
WD
1189 goto AI_OUT;
1190 }
34c202c7
WD
1191 if (n != buflen) {
1192 debug("WARNING, transfer bytes %d not equal with requested %d\n",
1193 n, buflen);
c609719b 1194 }
34c202c7
WD
1195 if (n != 0) { /* data transfer */
1196 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
1197 /* we transfer shorts */
1198 n >>= 1;
c609719b 1199 /* ok now decide if it is an in or output */
34c202c7
WD
1200 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
1201 debug("Write to device\n");
f5b82c0f
PH
1202 ide_output_data_shorts(device,
1203 (unsigned short *) buffer, n);
c609719b 1204 } else {
34c202c7 1205 debug("Read from device @ %p shorts %d\n", buffer, n);
f5b82c0f
PH
1206 ide_input_data_shorts(device,
1207 (unsigned short *) buffer, n);
c609719b
WD
1208 }
1209 }
34c202c7
WD
1210 udelay(5000); /* seems that some CD ROMs need this... */
1211 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
1212 res = 0;
1213 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
c609719b 1214 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
34c202c7
WD
1215 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
1216 debug("atapi_issue 2 returned sense key %X status %X\n", err,
1217 c);
c609719b
WD
1218 } else {
1219 err = 0;
1220 }
1221AI_OUT:
34c202c7 1222 ide_led(DEVICE_LED(device), 0); /* LED off */
c609719b
WD
1223 return (err);
1224}
1225
1226/*
1227 * sending the command to atapi_issue. If an status other than good
1228 * returns, an request_sense will be issued
1229 */
1230
53677ef1 1231#define ATAPI_DRIVE_NOT_READY 100
c609719b
WD
1232#define ATAPI_UNIT_ATTN 10
1233
34c202c7
WD
1234unsigned char atapi_issue_autoreq(int device,
1235 unsigned char *ccb,
1236 int ccblen,
1237 unsigned char *buffer, int buflen)
c609719b 1238{
34c202c7
WD
1239 unsigned char sense_data[18], sense_ccb[12];
1240 unsigned char res, key, asc, ascq;
1241 int notready, unitattn;
c609719b 1242
34c202c7
WD
1243 unitattn = ATAPI_UNIT_ATTN;
1244 notready = ATAPI_DRIVE_NOT_READY;
c609719b
WD
1245
1246retry:
34c202c7
WD
1247 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
1248 if (res == 0)
1249 return 0; /* Ok */
1250
1251 if (res == 0xFF)
1252 return 0xFF; /* error */
1253
1254 debug("(auto_req)atapi_issue returned sense key %X\n", res);
1255
1256 memset(sense_ccb, 0, sizeof(sense_ccb));
1257 memset(sense_data, 0, sizeof(sense_data));
1258 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
1259 sense_ccb[4] = 18; /* allocation Length */
1260
1261 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
1262 key = (sense_data[2] & 0xF);
1263 asc = (sense_data[12]);
1264 ascq = (sense_data[13]);
1265
1266 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
1267 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
1268 sense_data[0], key, asc, ascq);
1269
1270 if ((key == 0))
1271 return 0; /* ok device ready */
1272
1273 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
1274 if (unitattn-- > 0) {
1275 udelay(200 * 1000);
c609719b
WD
1276 goto retry;
1277 }
34c202c7 1278 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
c609719b
WD
1279 goto error;
1280 }
34c202c7
WD
1281 if ((asc == 0x4) && (ascq == 0x1)) {
1282 /* not ready, but will be ready soon */
1283 if (notready-- > 0) {
1284 udelay(200 * 1000);
c609719b
WD
1285 goto retry;
1286 }
34c202c7
WD
1287 printf("Drive not ready, tried %d times\n",
1288 ATAPI_DRIVE_NOT_READY);
c609719b
WD
1289 goto error;
1290 }
34c202c7
WD
1291 if (asc == 0x3a) {
1292 debug("Media not present\n");
c609719b
WD
1293 goto error;
1294 }
c7de829c 1295
34c202c7
WD
1296 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
1297 ascq);
c609719b 1298error:
34c202c7 1299 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
c609719b
WD
1300 return (0xFF);
1301}
1302
1303
4101f687 1304static void atapi_inquiry(struct blk_desc *dev_desc)
c609719b 1305{
34c202c7
WD
1306 unsigned char ccb[12]; /* Command descriptor block */
1307 unsigned char iobuf[64]; /* temp buf */
c609719b
WD
1308 unsigned char c;
1309 int device;
1310
34c202c7
WD
1311 device = dev_desc->dev;
1312 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
1313 dev_desc->block_read = atapi_read;
c609719b 1314
34c202c7
WD
1315 memset(ccb, 0, sizeof(ccb));
1316 memset(iobuf, 0, sizeof(iobuf));
c609719b 1317
34c202c7
WD
1318 ccb[0] = ATAPI_CMD_INQUIRY;
1319 ccb[4] = 40; /* allocation Legnth */
1320 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 40);
c609719b 1321
34c202c7
WD
1322 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
1323 if (c != 0)
c609719b
WD
1324 return;
1325
1326 /* copy device ident strings */
34c202c7
WD
1327 ident_cpy((unsigned char *) dev_desc->vendor, &iobuf[8], 8);
1328 ident_cpy((unsigned char *) dev_desc->product, &iobuf[16], 16);
1329 ident_cpy((unsigned char *) dev_desc->revision, &iobuf[32], 5);
c609719b 1330
34c202c7
WD
1331 dev_desc->lun = 0;
1332 dev_desc->lba = 0;
1333 dev_desc->blksz = 0;
0472fbfd 1334 dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
34c202c7 1335 dev_desc->type = iobuf[0] & 0x1f;
c609719b 1336
34c202c7 1337 if ((iobuf[1] & 0x80) == 0x80)
c609719b
WD
1338 dev_desc->removable = 1;
1339 else
1340 dev_desc->removable = 0;
1341
34c202c7
WD
1342 memset(ccb, 0, sizeof(ccb));
1343 memset(iobuf, 0, sizeof(iobuf));
1344 ccb[0] = ATAPI_CMD_START_STOP;
1345 ccb[4] = 0x03; /* start */
c609719b 1346
34c202c7 1347 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
c609719b 1348
34c202c7
WD
1349 debug("ATAPI_CMD_START_STOP returned %x\n", c);
1350 if (c != 0)
c609719b
WD
1351 return;
1352
34c202c7
WD
1353 memset(ccb, 0, sizeof(ccb));
1354 memset(iobuf, 0, sizeof(iobuf));
1355 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
c609719b 1356
34c202c7
WD
1357 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
1358 if (c != 0)
c609719b
WD
1359 return;
1360
34c202c7
WD
1361 memset(ccb, 0, sizeof(ccb));
1362 memset(iobuf, 0, sizeof(iobuf));
1363 ccb[0] = ATAPI_CMD_READ_CAP;
1364 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 8);
1365 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
1366 if (c != 0)
c609719b
WD
1367 return;
1368
34c202c7
WD
1369 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
1370 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
1371 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
1372
1373 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
1374 ((unsigned long) iobuf[1] << 16) +
1375 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
1376 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
1377 ((unsigned long) iobuf[5] << 16) +
1378 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
0472fbfd 1379 dev_desc->log2blksz = LOG2(dev_desc->blksz);
42dfe7a1 1380#ifdef CONFIG_LBA48
34c202c7
WD
1381 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
1382 dev_desc->lba48 = 0;
42dfe7a1 1383#endif
c609719b
WD
1384 return;
1385}
1386
1387
1388/*
1389 * atapi_read:
1390 * we transfer only one block per command, since the multiple DRQ per
1391 * command is not yet implemented
1392 */
1393#define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
1394#define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
34c202c7 1395#define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
c609719b 1396
4101f687 1397ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
7c4213f6 1398 void *buffer)
c609719b 1399{
7c4213f6 1400 int device = block_dev->dev;
c609719b 1401 ulong n = 0;
34c202c7 1402 unsigned char ccb[12]; /* Command descriptor block */
c609719b
WD
1403 ulong cnt;
1404
77c2b210 1405 debug("atapi_read dev %d start " LBAF " blocks " LBAF " buffer at %lX\n",
34c202c7 1406 device, blknr, blkcnt, (ulong) buffer);
c609719b
WD
1407
1408 do {
34c202c7
WD
1409 if (blkcnt > ATAPI_READ_MAX_BLOCK)
1410 cnt = ATAPI_READ_MAX_BLOCK;
1411 else
1412 cnt = blkcnt;
1413
1414 ccb[0] = ATAPI_CMD_READ_12;
1415 ccb[1] = 0; /* reserved */
1416 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
1417 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
1418 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
1419 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
1420 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
1421 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
1422 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
1423 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
1424 ccb[10] = 0; /* reserved */
1425 ccb[11] = 0; /* reserved */
1426
1427 if (atapi_issue_autoreq(device, ccb, 12,
1428 (unsigned char *) buffer,
1429 cnt * ATAPI_READ_BLOCK_SIZE)
1430 == 0xFF) {
c609719b
WD
1431 return (n);
1432 }
34c202c7
WD
1433 n += cnt;
1434 blkcnt -= cnt;
1435 blknr += cnt;
1436 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
c609719b
WD
1437 } while (blkcnt > 0);
1438 return (n);
1439}
1440
1441/* ------------------------------------------------------------------------- */
1442
1443#endif /* CONFIG_ATAPI */
1444
34c202c7
WD
1445U_BOOT_CMD(ide, 5, 1, do_ide,
1446 "IDE sub-system",
1447 "reset - reset IDE controller\n"
1448 "ide info - show available IDE devices\n"
1449 "ide device [dev] - show or set current device\n"
1450 "ide part [dev] - print partition table of one or all IDE devices\n"
1451 "ide read addr blk# cnt\n"
1452 "ide write addr blk# cnt - read/write `cnt'"
1453 " blocks starting at block `blk#'\n"
1454 " to/from memory address `addr'");
1455
1456U_BOOT_CMD(diskboot, 3, 1, do_diskboot,
1457 "boot from IDE device", "loadAddr dev:part");