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ppc: Enable generic board support
[people/ms/u-boot.git] / common / board_f.c
CommitLineData
1938f4a5
SG		 1/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * (C) Copyright 2002-2006
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#include <common.h>
30#include <linux/compiler.h>
31#include <version.h>
32#include <environment.h>
33#include <fdtdec.h>
e4fef6cf
SG		 34#if defined(CONFIG_CMD_IDE)
35#include <ide.h>
36#endif
37#include <i2c.h>
1938f4a5
SG		 38#include <initcall.h>
39#include <logbuff.h>
e4fef6cf
SG		 40
41/* TODO: Can we move these into arch/ headers? */
42#ifdef CONFIG_8xx
43#include <mpc8xx.h>
44#endif
45#ifdef CONFIG_5xx
46#include <mpc5xx.h>
47#endif
48#ifdef CONFIG_MPC5xxx
49#include <mpc5xxx.h>
50#endif
51
1938f4a5 52#include <post.h>
e4fef6cf
SG		 53#include <spi.h>
54#include <watchdog.h>
1938f4a5 55#include <asm/io.h>
e4fef6cf
SG		 56#ifdef CONFIG_MP
57#include <asm/mp.h>
58#endif
1938f4a5
SG		 59#include <asm/sections.h>
60#include <linux/compiler.h>
61
62/*
63 * Pointer to initial global data area
64 *
65 * Here we initialize it if needed.
66 */
67#ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
68#undef XTRN_DECLARE_GLOBAL_DATA_PTR
69#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
70DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_GD_ADDR);
71#else
72DECLARE_GLOBAL_DATA_PTR;
73#endif
74
75/*
76 * sjg: IMO this code should be
77 * refactored to a single function, something like:
78 *
79 * void led_set_state(enum led_colour_t colour, int on);
80 */
81/************************************************************************
82 * Coloured LED functionality
83 ************************************************************************
84 * May be supplied by boards if desired
85 */
86inline void __coloured_LED_init(void) {}
87void coloured_LED_init(void)
88 __attribute__((weak, alias("__coloured_LED_init")));
89inline void __red_led_on(void) {}
90void red_led_on(void) __attribute__((weak, alias("__red_led_on")));
91inline void __red_led_off(void) {}
92void red_led_off(void) __attribute__((weak, alias("__red_led_off")));
93inline void __green_led_on(void) {}
94void green_led_on(void) __attribute__((weak, alias("__green_led_on")));
95inline void __green_led_off(void) {}
96void green_led_off(void) __attribute__((weak, alias("__green_led_off")));
97inline void __yellow_led_on(void) {}
98void yellow_led_on(void) __attribute__((weak, alias("__yellow_led_on")));
99inline void __yellow_led_off(void) {}
100void yellow_led_off(void) __attribute__((weak, alias("__yellow_led_off")));
101inline void __blue_led_on(void) {}
102void blue_led_on(void) __attribute__((weak, alias("__blue_led_on")));
103inline void __blue_led_off(void) {}
104void blue_led_off(void) __attribute__((weak, alias("__blue_led_off")));
105
106/*
107 * Why is gd allocated a register? Prior to reloc it might be better to
108 * just pass it around to each function in this file?
109 *
110 * After reloc one could argue that it is hardly used and doesn't need
111 * to be in a register. Or if it is it should perhaps hold pointers to all
112 * global data for all modules, so that post-reloc we can avoid the massive
113 * literal pool we get on ARM. Or perhaps just encourage each module to use
114 * a structure...
115 */
116
117/*
118 * Could the CONFIG_SPL_BUILD infection become a flag in gd?
119 */
120
e4fef6cf
SG		 121#if defined(CONFIG_WATCHDOG)
122static int init_func_watchdog_init(void)
123{
124 puts(" Watchdog enabled\n");
125 WATCHDOG_RESET();
126
127 return 0;
128}
129
130int init_func_watchdog_reset(void)
131{
132 WATCHDOG_RESET();
133
134 return 0;
135}
136#endif /* CONFIG_WATCHDOG */
137
138void __board_add_ram_info(int use_default)
139{
140 /* please define platform specific board_add_ram_info() */
141}
142
143void board_add_ram_info(int)
144 __attribute__ ((weak, alias("__board_add_ram_info")));
145
1938f4a5
SG		 146static int init_baud_rate(void)
147{
148 gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE);
149 return 0;
150}
151
152static int display_text_info(void)
153{
154 ulong bss_start, bss_end;
155
632efa74 156#ifdef CONFIG_SYS_SYM_OFFSETS
1938f4a5
SG		 157 bss_start = _bss_start_ofs + _TEXT_BASE;
158 bss_end = _bss_end_ofs + _TEXT_BASE;
632efa74
SG		 159#else
160 bss_start = (ulong)&__bss_start;
161 bss_end = (ulong)&__bss_end;
162#endif
1938f4a5
SG		 163 debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n",
164 CONFIG_SYS_TEXT_BASE, bss_start, bss_end);
165
166#ifdef CONFIG_MODEM_SUPPORT
167 debug("Modem Support enabled\n");
168#endif
169#ifdef CONFIG_USE_IRQ
170 debug("IRQ Stack: %08lx\n", IRQ_STACK_START);
171 debug("FIQ Stack: %08lx\n", FIQ_STACK_START);
172#endif
173
174 return 0;
175}
176
177static int announce_dram_init(void)
178{
179 puts("DRAM: ");
180 return 0;
181}
182
e4fef6cf
SG		 183#ifdef CONFIG_PPC
184static int init_func_ram(void)
185{
186#ifdef CONFIG_BOARD_TYPES
187 int board_type = gd->board_type;
188#else
189 int board_type = 0; /* use dummy arg */
190#endif
191
192 gd->ram_size = initdram(board_type);
193
194 if (gd->ram_size > 0)
195 return 0;
196
197 puts("*** failed ***\n");
198 return 1;
199}
200#endif
201
1938f4a5
SG		 202static int show_dram_config(void)
203{
204 ulong size;
205
206#ifdef CONFIG_NR_DRAM_BANKS
207 int i;
208
209 debug("\nRAM Configuration:\n");
210 for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
211 size += gd->bd->bi_dram[i].size;
212 debug("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start);
213#ifdef DEBUG
214 print_size(gd->bd->bi_dram[i].size, "\n");
215#endif
216 }
217 debug("\nDRAM: ");
218#else
219 size = gd->ram_size;
220#endif
221
e4fef6cf
SG		 222 print_size(size, "");
223 board_add_ram_info(0);
224 putc('\n');
1938f4a5
SG		 225
226 return 0;
227}
228
e4fef6cf
SG		 229ulong get_effective_memsize(void)
230{
231#ifndef CONFIG_VERY_BIG_RAM
232 return gd->ram_size;
233#else
234 /* limit stack to what we can reasonable map */
235 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
236 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
237#endif
238}
239
1938f4a5
SG		 240void __dram_init_banksize(void)
241{
242#if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
243 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
244 gd->bd->bi_dram[0].size = get_effective_memsize();
245#endif
246}
247
248void dram_init_banksize(void)
249 __attribute__((weak, alias("__dram_init_banksize")));
250
e4fef6cf
SG		 251#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
252static int init_func_i2c(void)
253{
254 puts("I2C: ");
255 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
256 puts("ready\n");
257 return 0;
258}
259#endif
260
261#if defined(CONFIG_HARD_SPI)
262static int init_func_spi(void)
263{
264 puts("SPI: ");
265 spi_init();
266 puts("ready\n");
267 return 0;
268}
269#endif
270
271__maybe_unused
1938f4a5
SG		 272static int zero_global_data(void)
273{
274 memset((void *)gd, '\0', sizeof(gd_t));
275
276 return 0;
277}
278
279static int setup_mon_len(void)
280{
632efa74 281#ifdef CONFIG_SYS_SYM_OFFSETS
1938f4a5 282 gd->mon_len = _bss_end_ofs;
632efa74 283#else
e4fef6cf
SG		 284 /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
285 gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
632efa74 286#endif
1938f4a5
SG		 287 return 0;
288}
289
290__weak int arch_cpu_init(void)
291{
292 return 0;
293}
294
295static int setup_fdt(void)
296{
297#ifdef CONFIG_OF_EMBED
298 /* Get a pointer to the FDT */
299 gd->fdt_blob = _binary_dt_dtb_start;
300#elif defined CONFIG_OF_SEPARATE
301 /* FDT is at end of image */
632efa74 302# ifdef CONFIG_SYS_SYM_OFFSETS
1938f4a5 303 gd->fdt_blob = (void *)(_end_ofs + CONFIG_SYS_TEXT_BASE);
632efa74
SG		 304# else
305 gd->fdt_blob = (ulong *)&_end;
306# endif
1938f4a5
SG		 307#endif
308 /* Allow the early environment to override the fdt address */
309 gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16,
310 (uintptr_t)gd->fdt_blob);
311 return 0;
312}
313
314/* Get the top of usable RAM */
315__weak ulong board_get_usable_ram_top(ulong total_size)
316{
317 return gd->ram_top;
318}
319
320static int setup_dest_addr(void)
321{
322 debug("Monitor len: %08lX\n", gd->mon_len);
323 /*
324 * Ram is setup, size stored in gd !!
325 */
326 debug("Ram size: %08lX\n", (ulong)gd->ram_size);
327#if defined(CONFIG_SYS_MEM_TOP_HIDE)
328 /*
329 * Subtract specified amount of memory to hide so that it won't
330 * get "touched" at all by U-Boot. By fixing up gd->ram_size
331 * the Linux kernel should now get passed the now "corrected"
332 * memory size and won't touch it either. This should work
333 * for arch/ppc and arch/powerpc. Only Linux board ports in
334 * arch/powerpc with bootwrapper support, that recalculate the
335 * memory size from the SDRAM controller setup will have to
336 * get fixed.
337 */
338 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
339#endif
340#ifdef CONFIG_SYS_SDRAM_BASE
341 gd->ram_top = CONFIG_SYS_SDRAM_BASE;
342#endif
e4fef6cf 343 gd->ram_top += get_effective_memsize();
1938f4a5
SG		 344 gd->ram_top = board_get_usable_ram_top(gd->mon_len);
345 gd->dest_addr = gd->ram_top;
346 debug("Ram top: %08lX\n", (ulong)gd->ram_top);
e4fef6cf
SG		 347#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
348 /*
349 * We need to make sure the location we intend to put secondary core
350 * boot code is reserved and not used by any part of u-boot
351 */
352 if (gd->dest_addr > determine_mp_bootpg(NULL)) {
353 gd->dest_addr = determine_mp_bootpg(NULL);
354 debug("Reserving MP boot page to %08lx\n", gd->dest_addr);
355 }
356#endif
1938f4a5
SG		 357 gd->dest_addr_sp = gd->dest_addr;
358 return 0;
359}
360
361#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
362static int reserve_logbuffer(void)
363{
364 /* reserve kernel log buffer */
365 gd->dest_addr -= LOGBUFF_RESERVE;
366 debug("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN,
367 gd->dest_addr);
368 return 0;
369}
370#endif
371
372#ifdef CONFIG_PRAM
373/* reserve protected RAM */
374static int reserve_pram(void)
375{
376 ulong reg;
377
378 reg = getenv_ulong("pram", 10, CONFIG_PRAM);
379 gd->dest_addr -= (reg << 10); /* size is in kB */
380 debug("Reserving %ldk for protected RAM at %08lx\n", reg,
381 gd->dest_addr);
382 return 0;
383}
384#endif /* CONFIG_PRAM */
385
386/* Round memory pointer down to next 4 kB limit */
387static int reserve_round_4k(void)
388{
389 gd->dest_addr &= ~(4096 - 1);
390 return 0;
391}
392
393#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
394 defined(CONFIG_ARM)
395static int reserve_mmu(void)
396{
397 /* reserve TLB table */
398 gd->arch.tlb_size = 4096 * 4;
399 gd->dest_addr -= gd->arch.tlb_size;
400
401 /* round down to next 64 kB limit */
402 gd->dest_addr &= ~(0x10000 - 1);
403
404 gd->arch.tlb_addr = gd->dest_addr;
405 debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
406 gd->arch.tlb_addr + gd->arch.tlb_size);
407 return 0;
408}
409#endif
410
411#ifdef CONFIG_LCD
412static int reserve_lcd(void)
413{
414#ifdef CONFIG_FB_ADDR
415 gd->fb_base = CONFIG_FB_ADDR;
416#else
417 /* reserve memory for LCD display (always full pages) */
418 gd->dest_addr = lcd_setmem(gd->dest_addr);
419 gd->fb_base = gd->dest_addr;
420#endif /* CONFIG_FB_ADDR */
421 return 0;
422}
423#endif /* CONFIG_LCD */
424
e4fef6cf
SG		 425#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
426 && !defined(CONFIG_ARM)
427static int reserve_video(void)
428{
429 /* reserve memory for video display (always full pages) */
430 gd->dest_addr = video_setmem(gd->dest_addr);
431 gd->fb_base = gd->dest_addr;
432
433 return 0;
434}
435#endif
436
1938f4a5
SG		 437static int reserve_uboot(void)
438{
439 /*
440 * reserve memory for U-Boot code, data & bss
441 * round down to next 4 kB limit
442 */
443 gd->dest_addr -= gd->mon_len;
444 gd->dest_addr &= ~(4096 - 1);
e4fef6cf
SG		 445#ifdef CONFIG_E500
446 /* round down to next 64 kB limit so that IVPR stays aligned */
447 gd->dest_addr &= ~(65536 - 1);
448#endif
1938f4a5
SG		 449
450 debug("Reserving %ldk for U-Boot at: %08lx\n", gd->mon_len >> 10,
451 gd->dest_addr);
452 return 0;
453}
454
8cae8a68 455#ifndef CONFIG_SPL_BUILD
1938f4a5
SG		 456/* reserve memory for malloc() area */
457static int reserve_malloc(void)
458{
459 gd->dest_addr_sp = gd->dest_addr - TOTAL_MALLOC_LEN;
460 debug("Reserving %dk for malloc() at: %08lx\n",
461 TOTAL_MALLOC_LEN >> 10, gd->dest_addr_sp);
462 return 0;
463}
464
465/* (permanently) allocate a Board Info struct */
466static int reserve_board(void)
467{
468 gd->dest_addr_sp -= sizeof(bd_t);
469 gd->bd = (bd_t *)gd->dest_addr_sp;
470 memset(gd->bd, '\0', sizeof(bd_t));
471 debug("Reserving %zu Bytes for Board Info at: %08lx\n",
472 sizeof(bd_t), gd->dest_addr_sp);
473 return 0;
474}
8cae8a68 475#endif
1938f4a5
SG		 476
477static int setup_machine(void)
478{
479#ifdef CONFIG_MACH_TYPE
480 gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
481#endif
482 return 0;
483}
484
485static int reserve_global_data(void)
486{
487 gd->dest_addr_sp -= sizeof(gd_t);
488 gd->new_gd = (gd_t *)gd->dest_addr_sp;
489 debug("Reserving %zu Bytes for Global Data at: %08lx\n",
490 sizeof(gd_t), gd->dest_addr_sp);
491 return 0;
492}
493
494static int reserve_fdt(void)
495{
496 /*
497 * If the device tree is sitting immediate above our image then we
498 * must relocate it. If it is embedded in the data section, then it
499 * will be relocated with other data.
500 */
501 if (gd->fdt_blob) {
502 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
503
504 gd->dest_addr_sp -= gd->fdt_size;
505 gd->new_fdt = (void *)gd->dest_addr_sp;
506 debug("Reserving %lu Bytes for FDT at: %p\n",
507 gd->fdt_size, gd->new_fdt);
508 }
509
510 return 0;
511}
512
513static int reserve_stacks(void)
514{
8cae8a68
SG		 515#ifdef CONFIG_SPL_BUILD
516# ifdef CONFIG_ARM
517 gd->dest_addr_sp -= 128; /* leave 32 words for abort-stack */
518 gd->irq_sp = gd->dest_addr_sp;
519# endif
520#else
e4fef6cf
SG		 521# ifdef CONFIG_PPC
522 ulong *s;
523# endif
8cae8a68 524
1938f4a5
SG		 525 /* setup stack pointer for exceptions */
526 gd->dest_addr_sp -= 16;
527 gd->dest_addr_sp &= ~0xf;
528 gd->irq_sp = gd->dest_addr_sp;
529
530 /*
531 * Handle architecture-specific things here
532 * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack()
533 * to handle this and put in arch/xxx/lib/stack.c
534 */
535# ifdef CONFIG_ARM
536# ifdef CONFIG_USE_IRQ
537 gd->dest_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ);
538 debug("Reserving %zu Bytes for IRQ stack at: %08lx\n",
539 CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->dest_addr_sp);
540
541 /* 8-byte alignment for ARM ABI compliance */
542 gd->dest_addr_sp &= ~0x07;
543# endif
544 /* leave 3 words for abort-stack, plus 1 for alignment */
545 gd->dest_addr_sp -= 16;
e4fef6cf
SG		 546# elif defined(CONFIG_PPC)
547 /* Clear initial stack frame */
548 s = (ulong *) gd->dest_addr_sp;
549 *s = 0; /* Terminate back chain */
550 *++s = 0; /* NULL return address */
8cae8a68 551# endif /* Architecture specific code */
1938f4a5
SG		 552
553 return 0;
8cae8a68 554#endif
1938f4a5
SG		 555}
556
557static int display_new_sp(void)
558{
559 debug("New Stack Pointer is: %08lx\n", gd->dest_addr_sp);
560
561 return 0;
562}
563
e4fef6cf
SG		 564#ifdef CONFIG_PPC
565static int setup_board_part1(void)
566{
567 bd_t *bd = gd->bd;
568
569 /*
570 * Save local variables to board info struct
571 */
572
573 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
574 bd->bi_memsize = gd->ram_size; /* size in bytes */
575
576#ifdef CONFIG_SYS_SRAM_BASE
577 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
578 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
579#endif
580
581#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
582 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
583 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
584#endif
585#if defined(CONFIG_MPC5xxx)
586 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
587#endif
588#if defined(CONFIG_MPC83xx)
589 bd->bi_immrbar = CONFIG_SYS_IMMR;
590#endif
591#if defined(CONFIG_MPC8220)
592 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
593 bd->bi_inpfreq = gd->arch.inp_clk;
594 bd->bi_pcifreq = gd->pci_clk;
595 bd->bi_vcofreq = gd->arch.vco_clk;
596 bd->bi_pevfreq = gd->arch.pev_clk;
597 bd->bi_flbfreq = gd->arch.flb_clk;
598
599 /* store bootparam to sram (backward compatible), here? */
600 {
601 u32 *sram = (u32 *) CONFIG_SYS_SRAM_BASE;
602
603 *sram++ = gd->ram_size;
604 *sram++ = gd->bus_clk;
605 *sram++ = gd->arch.inp_clk;
606 *sram++ = gd->cpu_clk;
607 *sram++ = gd->arch.vco_clk;
608 *sram++ = gd->arch.flb_clk;
609 *sram++ = 0xb8c3ba11; /* boot signature */
610 }
611#endif
612
613 return 0;
614}
615
616static int setup_board_part2(void)
617{
618 bd_t *bd = gd->bd;
619
620 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
621 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
622#if defined(CONFIG_CPM2)
623 bd->bi_cpmfreq = gd->arch.cpm_clk;
624 bd->bi_brgfreq = gd->arch.brg_clk;
625 bd->bi_sccfreq = gd->arch.scc_clk;
626 bd->bi_vco = gd->arch.vco_out;
627#endif /* CONFIG_CPM2 */
628#if defined(CONFIG_MPC512X)
629 bd->bi_ipsfreq = gd->arch.ips_clk;
630#endif /* CONFIG_MPC512X */
631#if defined(CONFIG_MPC5xxx)
632 bd->bi_ipbfreq = gd->arch.ipb_clk;
633 bd->bi_pcifreq = gd->pci_clk;
634#endif /* CONFIG_MPC5xxx */
635
636 return 0;
637}
638#endif
639
640#ifdef CONFIG_SYS_EXTBDINFO
641static int setup_board_extra(void)
642{
643 bd_t *bd = gd->bd;
644
645 strncpy((char *) bd->bi_s_version, "1.2", sizeof(bd->bi_s_version));
646 strncpy((char *) bd->bi_r_version, U_BOOT_VERSION,
647 sizeof(bd->bi_r_version));
648
649 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
650 bd->bi_plb_busfreq = gd->bus_clk;
651#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
652 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
653 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
654 bd->bi_pci_busfreq = get_PCI_freq();
655 bd->bi_opbfreq = get_OPB_freq();
656#elif defined(CONFIG_XILINX_405)
657 bd->bi_pci_busfreq = get_PCI_freq();
658#endif
659
660 return 0;
661}
662#endif
663
1938f4a5
SG		 664#ifdef CONFIG_POST
665static int init_post(void)
666{
667 post_bootmode_init();
668 post_run(NULL, POST_ROM | post_bootmode_get(0));
669
670 return 0;
671}
672#endif
673
674static int setup_baud_rate(void)
675{
676 /* Ick, can we get rid of this line? */
677 gd->bd->bi_baudrate = gd->baudrate;
678
679 return 0;
680}
681
682static int setup_dram_config(void)
683{
684 /* Ram is board specific, so move it to board code ... */
685 dram_init_banksize();
686
687 return 0;
688}
689
690static int reloc_fdt(void)
691{
692 if (gd->new_fdt) {
693 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
694 gd->fdt_blob = gd->new_fdt;
695 }
696
697 return 0;
698}
699
700static int setup_reloc(void)
701{
702 gd->relocaddr = gd->dest_addr;
703 gd->start_addr_sp = gd->dest_addr_sp;
704 gd->reloc_off = gd->dest_addr - CONFIG_SYS_TEXT_BASE;
705 memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
706
707 debug("Relocation Offset is: %08lx\n", gd->reloc_off);
708 debug("Relocating to %08lx, new gd at %p, sp at %08lx\n",
709 gd->dest_addr, gd->new_gd, gd->dest_addr_sp);
710
711 return 0;
712}
713
714/* ARM calls relocate_code from its crt0.S */
715#if !defined(CONFIG_ARM)
716
717static int jump_to_copy(void)
718{
719 relocate_code(gd->dest_addr_sp, gd->new_gd, gd->dest_addr);
720
721 return 0;
722}
723#endif
724
725/* Record the board_init_f() bootstage (after arch_cpu_init()) */
726static int mark_bootstage(void)
727{
728 bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
729
730 return 0;
731}
732
733static init_fnc_t init_sequence_f[] = {
e4fef6cf
SG		 734#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
735 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
736 !defined(CONFIG_MPC86xx)
632efa74 737 zero_global_data,
e4fef6cf 738#endif
1938f4a5
SG		 739 setup_fdt,
740 setup_mon_len,
e4fef6cf
SG		 741#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
742 /* TODO: can this go into arch_cpu_init()? */
743 probecpu,
744#endif
1938f4a5
SG		 745 arch_cpu_init, /* basic arch cpu dependent setup */
746 mark_bootstage,
747#ifdef CONFIG_OF_CONTROL
748 fdtdec_check_fdt,
749#endif
750#if defined(CONFIG_BOARD_EARLY_INIT_F)
751 board_early_init_f,
752#endif
e4fef6cf
SG		 753 /* TODO: can any of this go into arch_cpu_init()? */
754#if defined(CONFIG_PPC) && !defined(CONFIG_8xx_CPUCLK_DEFAULT)
755 get_clocks, /* get CPU and bus clocks (etc.) */
756#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
757 && !defined(CONFIG_TQM885D)
758 adjust_sdram_tbs_8xx,
759#endif
760 /* TODO: can we rename this to timer_init()? */
761 init_timebase,
762#endif
763#if defined(CONFIG_BOARD_EARLY_INIT_F)
764 board_early_init_f,
765#endif
766#ifdef CONFIG_ARM
1938f4a5 767 timer_init, /* initialize timer */
e4fef6cf 768#endif
1938f4a5
SG		 769#ifdef CONFIG_BOARD_POSTCLK_INIT
770 board_postclk_init,
771#endif
772#ifdef CONFIG_FSL_ESDHC
773 get_clocks,
e4fef6cf
SG		 774#endif
775#ifdef CONFIG_SYS_ALLOC_DPRAM
776#if !defined(CONFIG_CPM2)
777 dpram_init,
778#endif
779#endif
780#if defined(CONFIG_BOARD_POSTCLK_INIT)
781 board_postclk_init,
1938f4a5
SG		 782#endif
783 env_init, /* initialize environment */
e4fef6cf
SG		 784#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
785 /* get CPU and bus clocks according to the environment variable */
786 get_clocks_866,
787 /* adjust sdram refresh rate according to the new clock */
788 sdram_adjust_866,
789 init_timebase,
790#endif
1938f4a5
SG		 791 init_baud_rate, /* initialze baudrate settings */
792 serial_init, /* serial communications setup */
793 console_init_f, /* stage 1 init of console */
794 display_options, /* say that we are here */
795 display_text_info, /* show debugging info if required */
e4fef6cf
SG		 796#if defined(CONFIG_8260)
797 prt_8260_rsr,
798 prt_8260_clks,
799#endif /* CONFIG_8260 */
800#if defined(CONFIG_MPC83xx)
801 prt_83xx_rsr,
802#endif
803#ifdef CONFIG_PPC
804 checkcpu,
805#endif
1938f4a5
SG		 806#if defined(CONFIG_DISPLAY_CPUINFO)
807 print_cpuinfo, /* display cpu info (and speed) */
808#endif
e4fef6cf
SG		 809#if defined(CONFIG_MPC5xxx)
810 prt_mpc5xxx_clks,
811#endif /* CONFIG_MPC5xxx */
812#if defined(CONFIG_MPC8220)
813 prt_mpc8220_clks,
814#endif
1938f4a5
SG		 815#if defined(CONFIG_DISPLAY_BOARDINFO)
816 checkboard, /* display board info */
e4fef6cf
SG		 817#endif
818 INIT_FUNC_WATCHDOG_INIT
819#if defined(CONFIG_MISC_INIT_F)
820 misc_init_f,
821#endif
822 INIT_FUNC_WATCHDOG_RESET
823#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
824 init_func_i2c,
825#endif
826#if defined(CONFIG_HARD_SPI)
827 init_func_spi,
828#endif
829#ifdef CONFIG_X86
830 dram_init_f, /* configure available RAM banks */
1938f4a5
SG		 831#endif
832 announce_dram_init,
833 /* TODO: unify all these dram functions? */
834#ifdef CONFIG_ARM
835 dram_init, /* configure available RAM banks */
836#endif
e4fef6cf
SG		 837#ifdef CONFIG_PPC
838 init_func_ram,
839#endif
840#ifdef CONFIG_POST
841 post_init_f,
842#endif
843 INIT_FUNC_WATCHDOG_RESET
844#if defined(CONFIG_SYS_DRAM_TEST)
845 testdram,
846#endif /* CONFIG_SYS_DRAM_TEST */
847 INIT_FUNC_WATCHDOG_RESET
848
1938f4a5
SG		 849#ifdef CONFIG_POST
850 init_post,
851#endif
e4fef6cf 852 INIT_FUNC_WATCHDOG_RESET
1938f4a5
SG		 853 /*
854 * Now that we have DRAM mapped and working, we can
855 * relocate the code and continue running from DRAM.
856 *
857 * Reserve memory at end of RAM for (top down in that order):
858 * - area that won't get touched by U-Boot and Linux (optional)
859 * - kernel log buffer
860 * - protected RAM
861 * - LCD framebuffer
862 * - monitor code
863 * - board info struct
864 */
865 setup_dest_addr,
866#if defined(CONFIG_LOGBUFFER) && !defined(CONFIG_ALT_LB_ADDR)
867 reserve_logbuffer,
868#endif
869#ifdef CONFIG_PRAM
870 reserve_pram,
871#endif
872 reserve_round_4k,
873#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF)) && \
874 defined(CONFIG_ARM)
875 reserve_mmu,
876#endif
877#ifdef CONFIG_LCD
878 reserve_lcd,
e4fef6cf
SG		 879#endif
880 /* TODO: Why the dependency on CONFIG_8xx? */
881#if defined(CONFIG_VIDEO) && (!defined(CONFIG_PPC) || defined(CONFIG_8xx)) \
882 && !defined(CONFIG_ARM)
883 reserve_video,
1938f4a5
SG		 884#endif
885 reserve_uboot,
8cae8a68 886#ifndef CONFIG_SPL_BUILD
1938f4a5
SG		 887 reserve_malloc,
888 reserve_board,
8cae8a68 889#endif
1938f4a5
SG		 890 setup_machine,
891 reserve_global_data,
892 reserve_fdt,
893 reserve_stacks,
894 setup_dram_config,
895 show_dram_config,
e4fef6cf
SG		 896#ifdef CONFIG_PPC
897 setup_board_part1,
898 INIT_FUNC_WATCHDOG_RESET
899 setup_board_part2,
900#endif
1938f4a5
SG		 901 setup_baud_rate,
902 display_new_sp,
e4fef6cf
SG		 903#ifdef CONFIG_SYS_EXTBDINFO
904 setup_board_extra,
905#endif
906 INIT_FUNC_WATCHDOG_RESET
1938f4a5
SG		 907 reloc_fdt,
908 setup_reloc,
909#ifndef CONFIG_ARM
910 jump_to_copy,
911#endif
912 NULL,
913};
914
915void board_init_f(ulong boot_flags)
916{
917 gd_t data;
918
919 gd = &data;
920
921 gd->flags = boot_flags;
922
923 if (initcall_run_list(init_sequence_f))
924 hang();
925
926#ifndef CONFIG_ARM
927 /* NOTREACHED - jump_to_copy() does not return */
928 hang();
929#endif
930}
931
932void hang(void)
933{
934 puts("### ERROR ### Please RESET the board ###\n");
935 for (;;);
936}
"Das U-Boot" Source Tree