]> git.ipfire.org Git - people/ms/u-boot.git/blame - common/cmd_bdinfo.c
Add generic global_data
[people/ms/u-boot.git] / common / cmd_bdinfo.c
CommitLineData
8bde7f77
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Boot support
26 */
27#include <common.h>
28#include <command.h>
d88af4da 29#include <linux/compiler.h>
8bde7f77 30
d87080b7 31DECLARE_GLOBAL_DATA_PTR;
8bde7f77 32
d88af4da
MF
33__maybe_unused
34static void print_num(const char *name, ulong value)
35{
36 printf("%-12s= 0x%08lX\n", name, value);
37}
8bde7f77 38
5f3dfadc 39__maybe_unused
d88af4da
MF
40static void print_eth(int idx)
41{
42 char name[10], *val;
43 if (idx)
44 sprintf(name, "eth%iaddr", idx);
45 else
46 strcpy(name, "ethaddr");
47 val = getenv(name);
48 if (!val)
49 val = "(not set)";
50 printf("%-12s= %s\n", name, val);
51}
de2dff6f 52
d88af4da 53__maybe_unused
47708457 54static void print_lnum(const char *name, unsigned long long value)
d88af4da
MF
55{
56 printf("%-12s= 0x%.8llX\n", name, value);
57}
58
59__maybe_unused
60static void print_mhz(const char *name, unsigned long hz)
61{
62 char buf[32];
63
64 printf("%-12s= %6s MHz\n", name, strmhz(buf, hz));
65}
8bde7f77 66
c99ea790 67#if defined(CONFIG_PPC)
8bde7f77 68
5902e8f7 69int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 70{
8bde7f77 71 bd_t *bd = gd->bd;
8bde7f77
WD
72
73#ifdef DEBUG
5902e8f7
ML
74 print_num("bd address", (ulong)bd);
75#endif
76 print_num("memstart", bd->bi_memstart);
77 print_lnum("memsize", bd->bi_memsize);
78 print_num("flashstart", bd->bi_flashstart);
79 print_num("flashsize", bd->bi_flashsize);
80 print_num("flashoffset", bd->bi_flashoffset);
81 print_num("sramstart", bd->bi_sramstart);
82 print_num("sramsize", bd->bi_sramsize);
83#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || \
84 defined(CONFIG_8260) || defined(CONFIG_E500)
85 print_num("immr_base", bd->bi_immr_base);
86#endif
87 print_num("bootflags", bd->bi_bootflags);
88#if defined(CONFIG_405CR) || defined(CONFIG_405EP) || \
89 defined(CONFIG_405GP) || \
90 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
91 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
92 defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \
93 defined(CONFIG_XILINX_405)
0c277ef9
TT
94 print_mhz("procfreq", bd->bi_procfreq);
95 print_mhz("plb_busfreq", bd->bi_plb_busfreq);
5902e8f7
ML
96#if defined(CONFIG_405EP) || defined(CONFIG_405GP) || \
97 defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
98 defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
99 defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405)
0c277ef9 100 print_mhz("pci_busfreq", bd->bi_pci_busfreq);
8bde7f77 101#endif
9fea65a6 102#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
9c4c5ae3 103#if defined(CONFIG_CPM2)
0c277ef9
TT
104 print_mhz("vco", bd->bi_vco);
105 print_mhz("sccfreq", bd->bi_sccfreq);
106 print_mhz("brgfreq", bd->bi_brgfreq);
8bde7f77 107#endif
0c277ef9 108 print_mhz("intfreq", bd->bi_intfreq);
9c4c5ae3 109#if defined(CONFIG_CPM2)
0c277ef9 110 print_mhz("cpmfreq", bd->bi_cpmfreq);
8bde7f77 111#endif
0c277ef9 112 print_mhz("busfreq", bd->bi_busfreq);
9fea65a6 113#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */
983fda83 114#if defined(CONFIG_MPC8220)
0c277ef9
TT
115 print_mhz("inpfreq", bd->bi_inpfreq);
116 print_mhz("flbfreq", bd->bi_flbfreq);
117 print_mhz("pcifreq", bd->bi_pcifreq);
118 print_mhz("vcofreq", bd->bi_vcofreq);
119 print_mhz("pevfreq", bd->bi_pevfreq);
983fda83 120#endif
03f5c550 121
34e210f5
TT
122#ifdef CONFIG_ENABLE_36BIT_PHYS
123#ifdef CONFIG_PHYS_64BIT
124 puts("addressing = 36-bit\n");
125#else
126 puts("addressing = 32-bit\n");
127#endif
128#endif
129
de2dff6f 130 print_eth(0);
e2ffd59b 131#if defined(CONFIG_HAS_ETH1)
de2dff6f 132 print_eth(1);
03f5c550 133#endif
e2ffd59b 134#if defined(CONFIG_HAS_ETH2)
de2dff6f 135 print_eth(2);
42d1f039 136#endif
e2ffd59b 137#if defined(CONFIG_HAS_ETH3)
de2dff6f 138 print_eth(3);
03f5c550 139#endif
c68a05fe 140#if defined(CONFIG_HAS_ETH4)
de2dff6f 141 print_eth(4);
c68a05fe 142#endif
c68a05fe 143#if defined(CONFIG_HAS_ETH5)
de2dff6f 144 print_eth(5);
c68a05fe 145#endif
146
8bde7f77 147#ifdef CONFIG_HERMES
0c277ef9 148 print_mhz("ethspeed", bd->bi_ethspeed);
8bde7f77 149#endif
50a47d05 150 printf("IP addr = %s\n", getenv("ipaddr"));
a7e5ee9e 151 printf("baudrate = %6u bps\n", bd->bi_baudrate);
5902e8f7 152 print_num("relocaddr", gd->relocaddr);
8bde7f77
WD
153 return 0;
154}
155
c99ea790 156#elif defined(CONFIG_NIOS2)
5c952cf0 157
5902e8f7 158int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
5c952cf0 159{
5c952cf0
WD
160 bd_t *bd = gd->bd;
161
5902e8f7
ML
162 print_num("mem start", (ulong)bd->bi_memstart);
163 print_lnum("mem size", (u64)bd->bi_memsize);
164 print_num("flash start", (ulong)bd->bi_flashstart);
165 print_num("flash size", (ulong)bd->bi_flashsize);
166 print_num("flash offset", (ulong)bd->bi_flashoffset);
5c952cf0 167
6d0f6bcf 168#if defined(CONFIG_SYS_SRAM_BASE)
5c952cf0
WD
169 print_num ("sram start", (ulong)bd->bi_sramstart);
170 print_num ("sram size", (ulong)bd->bi_sramsize);
171#endif
172
90253178 173#if defined(CONFIG_CMD_NET)
de2dff6f 174 print_eth(0);
50a47d05 175 printf("ip_addr = %s\n", getenv("ipaddr"));
5c952cf0
WD
176#endif
177
7fffe2fa 178 printf("baudrate = %u bps\n", bd->bi_baudrate);
5c952cf0
WD
179
180 return 0;
181}
c99ea790
RM
182
183#elif defined(CONFIG_MICROBLAZE)
cfc67116 184
5902e8f7 185int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
cfc67116 186{
cfc67116 187 bd_t *bd = gd->bd;
5902e8f7
ML
188 print_num("mem start ", (ulong)bd->bi_memstart);
189 print_lnum("mem size ", (u64)bd->bi_memsize);
190 print_num("flash start ", (ulong)bd->bi_flashstart);
191 print_num("flash size ", (ulong)bd->bi_flashsize);
192 print_num("flash offset ", (ulong)bd->bi_flashoffset);
6d0f6bcf 193#if defined(CONFIG_SYS_SRAM_BASE)
5902e8f7
ML
194 print_num("sram start ", (ulong)bd->bi_sramstart);
195 print_num("sram size ", (ulong)bd->bi_sramsize);
cfc67116 196#endif
90253178 197#if defined(CONFIG_CMD_NET)
de2dff6f 198 print_eth(0);
50a47d05 199 printf("ip_addr = %s\n", getenv("ipaddr"));
cfc67116 200#endif
74e8456b 201 printf("baudrate = %u bps\n", (ulong)bd->bi_baudrate);
cfc67116
MS
202 return 0;
203}
4a551709 204
c99ea790
RM
205#elif defined(CONFIG_SPARC)
206
54841ab5 207int do_bdinfo(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
00ab32c8
DH
208{
209 bd_t *bd = gd->bd;
00ab32c8
DH
210
211#ifdef DEBUG
212 print_num("bd address ", (ulong) bd);
213#endif
214 print_num("memstart ", bd->bi_memstart);
b57ca3e1 215 print_lnum("memsize ", bd->bi_memsize);
00ab32c8 216 print_num("flashstart ", bd->bi_flashstart);
6d0f6bcf 217 print_num("CONFIG_SYS_MONITOR_BASE ", CONFIG_SYS_MONITOR_BASE);
0e8d1586 218 print_num("CONFIG_ENV_ADDR ", CONFIG_ENV_ADDR);
d97f01a6 219 printf("CONFIG_SYS_RELOC_MONITOR_BASE = 0x%x (%d)\n", CONFIG_SYS_RELOC_MONITOR_BASE,
6d0f6bcf 220 CONFIG_SYS_MONITOR_LEN);
d97f01a6 221 printf("CONFIG_SYS_MALLOC_BASE = 0x%x (%d)\n", CONFIG_SYS_MALLOC_BASE,
6d0f6bcf 222 CONFIG_SYS_MALLOC_LEN);
d97f01a6 223 printf("CONFIG_SYS_INIT_SP_OFFSET = 0x%x (%d)\n", CONFIG_SYS_INIT_SP_OFFSET,
6d0f6bcf 224 CONFIG_SYS_STACK_SIZE);
d97f01a6 225 printf("CONFIG_SYS_PROM_OFFSET = 0x%x (%d)\n", CONFIG_SYS_PROM_OFFSET,
6d0f6bcf 226 CONFIG_SYS_PROM_SIZE);
d97f01a6 227 printf("CONFIG_SYS_GBL_DATA_OFFSET = 0x%x (%d)\n", CONFIG_SYS_GBL_DATA_OFFSET,
25ddd1fb 228 GENERATED_GBL_DATA_SIZE);
00ab32c8
DH
229
230#if defined(CONFIG_CMD_NET)
de2dff6f 231 print_eth(0);
50a47d05 232 printf("ip_addr = %s\n", getenv("ipaddr"));
00ab32c8 233#endif
a8f1f1cd 234 printf("baudrate = %6u bps\n", bd->bi_baudrate);
00ab32c8
DH
235 return 0;
236}
237
c99ea790
RM
238#elif defined(CONFIG_M68K)
239
5902e8f7 240int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8e585f02 241{
8e585f02 242 bd_t *bd = gd->bd;
8ae158cd 243
5902e8f7
ML
244 print_num("memstart", (ulong)bd->bi_memstart);
245 print_lnum("memsize", (u64)bd->bi_memsize);
246 print_num("flashstart", (ulong)bd->bi_flashstart);
247 print_num("flashsize", (ulong)bd->bi_flashsize);
248 print_num("flashoffset", (ulong)bd->bi_flashoffset);
6d0f6bcf 249#if defined(CONFIG_SYS_INIT_RAM_ADDR)
5902e8f7
ML
250 print_num("sramstart", (ulong)bd->bi_sramstart);
251 print_num("sramsize", (ulong)bd->bi_sramsize);
8e585f02 252#endif
6d0f6bcf 253#if defined(CONFIG_SYS_MBAR)
5902e8f7 254 print_num("mbar", bd->bi_mbar_base);
8e585f02 255#endif
0c277ef9
TT
256 print_mhz("cpufreq", bd->bi_intfreq);
257 print_mhz("busfreq", bd->bi_busfreq);
8ae158cd 258#ifdef CONFIG_PCI
0c277ef9 259 print_mhz("pcifreq", bd->bi_pcifreq);
8ae158cd
TL
260#endif
261#ifdef CONFIG_EXTRA_CLOCK
0c277ef9
TT
262 print_mhz("flbfreq", bd->bi_flbfreq);
263 print_mhz("inpfreq", bd->bi_inpfreq);
264 print_mhz("vcofreq", bd->bi_vcofreq);
8ae158cd 265#endif
26667b7f 266#if defined(CONFIG_CMD_NET)
de2dff6f 267 print_eth(0);
8e585f02 268#if defined(CONFIG_HAS_ETH1)
de2dff6f 269 print_eth(1);
8e585f02 270#endif
8e585f02 271#if defined(CONFIG_HAS_ETH2)
de2dff6f 272 print_eth(2);
8e585f02 273#endif
8e585f02 274#if defined(CONFIG_HAS_ETH3)
de2dff6f 275 print_eth(3);
8e585f02
TL
276#endif
277
50a47d05 278 printf("ip_addr = %s\n", getenv("ipaddr"));
26667b7f 279#endif
f5a5b3c5 280 printf("baudrate = %u bps\n", bd->bi_baudrate);
8e585f02
TL
281
282 return 0;
283}
284
8dc48d71 285#elif defined(CONFIG_BLACKFIN)
c99ea790 286
54841ab5 287int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8dc48d71 288{
8dc48d71
MF
289 bd_t *bd = gd->bd;
290
291 printf("U-Boot = %s\n", bd->bi_r_version);
292 printf("CPU = %s\n", bd->bi_cpu);
293 printf("Board = %s\n", bd->bi_board_name);
0c277ef9
TT
294 print_mhz("VCO", bd->bi_vco);
295 print_mhz("CCLK", bd->bi_cclk);
296 print_mhz("SCLK", bd->bi_sclk);
8dc48d71 297
5902e8f7
ML
298 print_num("boot_params", (ulong)bd->bi_boot_params);
299 print_num("memstart", (ulong)bd->bi_memstart);
300 print_lnum("memsize", (u64)bd->bi_memsize);
301 print_num("flashstart", (ulong)bd->bi_flashstart);
302 print_num("flashsize", (ulong)bd->bi_flashsize);
303 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8dc48d71 304
de2dff6f 305 print_eth(0);
50a47d05 306 printf("ip_addr = %s\n", getenv("ipaddr"));
5e84e5a7 307 printf("baudrate = %u bps\n", bd->bi_baudrate);
8dc48d71
MF
308
309 return 0;
310}
311
c99ea790 312#elif defined(CONFIG_MIPS)
8bde7f77 313
5902e8f7 314int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 315{
8bde7f77
WD
316 bd_t *bd = gd->bd;
317
5902e8f7
ML
318 print_num("boot_params", (ulong)bd->bi_boot_params);
319 print_num("memstart", (ulong)bd->bi_memstart);
320 print_lnum("memsize", (u64)bd->bi_memsize);
321 print_num("flashstart", (ulong)bd->bi_flashstart);
322 print_num("flashsize", (ulong)bd->bi_flashsize);
323 print_num("flashoffset", (ulong)bd->bi_flashoffset);
8bde7f77 324
de2dff6f 325 print_eth(0);
50a47d05 326 printf("ip_addr = %s\n", getenv("ipaddr"));
8dc22b00 327 printf("baudrate = %u bps\n", bd->bi_baudrate);
8bde7f77
WD
328
329 return 0;
330}
8bde7f77 331
c99ea790
RM
332#elif defined(CONFIG_AVR32)
333
5902e8f7 334int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
c99ea790
RM
335{
336 bd_t *bd = gd->bd;
337
5902e8f7
ML
338 print_num("boot_params", (ulong)bd->bi_boot_params);
339 print_num("memstart", (ulong)bd->bi_memstart);
340 print_lnum("memsize", (u64)bd->bi_memsize);
341 print_num("flashstart", (ulong)bd->bi_flashstart);
342 print_num("flashsize", (ulong)bd->bi_flashsize);
343 print_num("flashoffset", (ulong)bd->bi_flashoffset);
c99ea790
RM
344
345 print_eth(0);
50a47d05 346 printf("ip_addr = %s\n", getenv("ipaddr"));
15dc95d4 347 printf("baudrate = %u bps\n", bd->bi_baudrate);
c99ea790
RM
348
349 return 0;
350}
351
352#elif defined(CONFIG_ARM)
8bde7f77 353
5902e8f7 354int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
8bde7f77 355{
8bde7f77
WD
356 int i;
357 bd_t *bd = gd->bd;
358
5902e8f7
ML
359 print_num("arch_number", bd->bi_arch_number);
360 print_num("boot_params", (ulong)bd->bi_boot_params);
8bde7f77 361
5902e8f7 362 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
8bde7f77
WD
363 print_num("DRAM bank", i);
364 print_num("-> start", bd->bi_dram[i].start);
365 print_num("-> size", bd->bi_dram[i].size);
366 }
367
a41dbbd9 368#if defined(CONFIG_CMD_NET)
de2dff6f 369 print_eth(0);
50a47d05 370 printf("ip_addr = %s\n", getenv("ipaddr"));
a41dbbd9 371#endif
e46e31a8 372 printf("baudrate = %u bps\n", bd->bi_baudrate);
e47f2db5 373#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
34fd5d25 374 print_num("TLB addr", gd->arch.tlb_addr);
f1d2b313 375#endif
5902e8f7
ML
376 print_num("relocaddr", gd->relocaddr);
377 print_num("reloc off", gd->reloc_off);
378 print_num("irq_sp", gd->irq_sp); /* irq stack pointer */
379 print_num("sp start ", gd->start_addr_sp);
380 print_num("FB base ", gd->fb_base);
8f5d4687
HM
381 /*
382 * TODO: Currently only support for davinci SOC's is added.
383 * Remove this check once all the board implement this.
384 */
385#ifdef CONFIG_CLOCKS
386 printf("ARM frequency = %ld MHz\n", gd->bd->bi_arm_freq);
387 printf("DSP frequency = %ld MHz\n", gd->bd->bi_dsp_freq);
388 printf("DDR frequency = %ld MHz\n", gd->bd->bi_ddr_freq);
389#endif
8bde7f77
WD
390 return 0;
391}
392
ebd0d062
NI
393#elif defined(CONFIG_SH)
394
5902e8f7 395int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
ebd0d062
NI
396{
397 bd_t *bd = gd->bd;
5902e8f7
ML
398 print_num("mem start ", (ulong)bd->bi_memstart);
399 print_lnum("mem size ", (u64)bd->bi_memsize);
400 print_num("flash start ", (ulong)bd->bi_flashstart);
401 print_num("flash size ", (ulong)bd->bi_flashsize);
402 print_num("flash offset ", (ulong)bd->bi_flashoffset);
ebd0d062
NI
403
404#if defined(CONFIG_CMD_NET)
405 print_eth(0);
50a47d05 406 printf("ip_addr = %s\n", getenv("ipaddr"));
ebd0d062 407#endif
ecd4551f 408 printf("baudrate = %u bps\n", bd->bi_baudrate);
ebd0d062
NI
409 return 0;
410}
411
a806ee6f
GR
412#elif defined(CONFIG_X86)
413
5902e8f7 414int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
a806ee6f
GR
415{
416 int i;
417 bd_t *bd = gd->bd;
a806ee6f 418
5902e8f7
ML
419 print_num("boot_params", (ulong)bd->bi_boot_params);
420 print_num("bi_memstart", bd->bi_memstart);
421 print_num("bi_memsize", bd->bi_memsize);
422 print_num("bi_flashstart", bd->bi_flashstart);
423 print_num("bi_flashsize", bd->bi_flashsize);
424 print_num("bi_flashoffset", bd->bi_flashoffset);
425 print_num("bi_sramstart", bd->bi_sramstart);
426 print_num("bi_sramsize", bd->bi_sramsize);
427 print_num("bi_bootflags", bd->bi_bootflags);
0c277ef9
TT
428 print_mhz("cpufreq", bd->bi_intfreq);
429 print_mhz("busfreq", bd->bi_busfreq);
5902e8f7
ML
430
431 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
a806ee6f
GR
432 print_num("DRAM bank", i);
433 print_num("-> start", bd->bi_dram[i].start);
434 print_num("-> size", bd->bi_dram[i].size);
435 }
436
437#if defined(CONFIG_CMD_NET)
438 print_eth(0);
50a47d05 439 printf("ip_addr = %s\n", getenv("ipaddr"));
0c277ef9 440 print_mhz("ethspeed", bd->bi_ethspeed);
a806ee6f 441#endif
55f97c1b 442 printf("baudrate = %u bps\n", bd->bi_baudrate);
a806ee6f
GR
443
444 return 0;
445}
446
6fcc3be4
SG
447#elif defined(CONFIG_SANDBOX)
448
449int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
450{
451 int i;
452 bd_t *bd = gd->bd;
453
454 print_num("boot_params", (ulong)bd->bi_boot_params);
455
456 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
457 print_num("DRAM bank", i);
458 print_num("-> start", bd->bi_dram[i].start);
459 print_num("-> size", bd->bi_dram[i].size);
460 }
461
462#if defined(CONFIG_CMD_NET)
463 print_eth(0);
50a47d05 464 printf("ip_addr = %s\n", getenv("ipaddr"));
6fcc3be4
SG
465#endif
466 print_num("FB base ", gd->fb_base);
467 return 0;
468}
469
64d61461
ML
470#elif defined(CONFIG_NDS32)
471
472int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
473{
474 int i;
475 bd_t *bd = gd->bd;
476
477 print_num("arch_number", bd->bi_arch_number);
478 print_num("boot_params", (ulong)bd->bi_boot_params);
479
480 for (i = 0; i < CONFIG_NR_DRAM_BANKS; ++i) {
481 print_num("DRAM bank", i);
482 print_num("-> start", bd->bi_dram[i].start);
483 print_num("-> size", bd->bi_dram[i].size);
484 }
485
486#if defined(CONFIG_CMD_NET)
487 print_eth(0);
50a47d05 488 printf("ip_addr = %s\n", getenv("ipaddr"));
64d61461 489#endif
a25356d7 490 printf("baudrate = %u bps\n", bd->bi_baudrate);
64d61461
ML
491
492 return 0;
493}
494
2be9fdbf
SK
495#elif defined(CONFIG_OPENRISC)
496
497int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
498{
499 bd_t *bd = gd->bd;
500
501 print_num("mem start", (ulong)bd->bi_memstart);
502 print_lnum("mem size", (u64)bd->bi_memsize);
503 print_num("flash start", (ulong)bd->bi_flashstart);
504 print_num("flash size", (ulong)bd->bi_flashsize);
505 print_num("flash offset", (ulong)bd->bi_flashoffset);
506
507#if defined(CONFIG_CMD_NET)
508 print_eth(0);
50a47d05 509 printf("ip_addr = %s\n", getenv("ipaddr"));
2be9fdbf
SK
510#endif
511
7a68e330 512 printf("baudrate = %u bps\n", bd->bi_baudrate);
2be9fdbf
SK
513
514 return 0;
515}
516
c99ea790
RM
517#else
518 #error "a case for this architecture does not exist!"
519#endif
8bde7f77 520
8bde7f77
WD
521/* -------------------------------------------------------------------- */
522
0d498393
WD
523U_BOOT_CMD(
524 bdinfo, 1, 1, do_bdinfo,
2fb2604d 525 "print Board Info structure",
a89c33db 526 ""
8bde7f77 527);