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Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
[people/ms/u-boot.git] / common / cmd_mem.c
CommitLineData
3863585b
WD
1/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
3863585b
WD
6 */
7
8/*
9 * Memory Functions
10 *
11 * Copied from FADS ROM, Dan Malek (dmalek@jlc.net)
12 */
13
14#include <common.h>
0098e179 15#include <bootretry.h>
18d66533 16#include <cli.h>
3863585b 17#include <command.h>
2abbe075
WD
18#ifdef CONFIG_HAS_DATAFLASH
19#include <dataflash.h>
20#endif
d20a40de 21#include <hash.h>
a6e6fc61 22#include <watchdog.h>
0628ab8e 23#include <asm/io.h>
15a33e49
SG
24#include <linux/compiler.h>
25
26DECLARE_GLOBAL_DATA_PTR;
3863585b 27
8e169cc9
SG
28#ifndef CONFIG_SYS_MEMTEST_SCRATCH
29#define CONFIG_SYS_MEMTEST_SCRATCH 0
30#endif
31
54841ab5 32static int mod_mem(cmd_tbl_t *, int, int, int, char * const []);
3863585b
WD
33
34/* Display values from last command.
35 * Memory modify remembered values are different from display memory.
36 */
d6efe244
MF
37static uint dp_last_addr, dp_last_size;
38static uint dp_last_length = 0x40;
39static uint mm_last_addr, mm_last_size;
3863585b
WD
40
41static ulong base_address = 0;
42
43/* Memory Display
44 *
45 * Syntax:
4d1fd7f1 46 * md{.b, .w, .l, .q} {addr} {len}
3863585b
WD
47 */
48#define DISP_LINE_LEN 16
088f1b19 49static int do_mem_md(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 50{
27b207fd 51 ulong addr, length;
c95c4280
GL
52#if defined(CONFIG_HAS_DATAFLASH)
53 ulong nbytes, linebytes;
54#endif
27b207fd 55 int size;
3863585b
WD
56 int rc = 0;
57
58 /* We use the last specified parameters, unless new ones are
59 * entered.
60 */
61 addr = dp_last_addr;
62 size = dp_last_size;
63 length = dp_last_length;
64
47e26b1b 65 if (argc < 2)
4c12eeb8 66 return CMD_RET_USAGE;
3863585b
WD
67
68 if ((flag & CMD_FLAG_REPEAT) == 0) {
69 /* New command specified. Check for a size specification.
70 * Defaults to long if no or incorrect specification.
71 */
27b207fd
WD
72 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
73 return 1;
3863585b
WD
74
75 /* Address is specified since argc > 1
76 */
77 addr = simple_strtoul(argv[1], NULL, 16);
78 addr += base_address;
79
80 /* If another parameter, it is the length to display.
81 * Length is the number of objects, not number of bytes.
82 */
83 if (argc > 2)
84 length = simple_strtoul(argv[2], NULL, 16);
85 }
86
c95c4280 87#if defined(CONFIG_HAS_DATAFLASH)
3863585b
WD
88 /* Print the lines.
89 *
90 * We buffer all read data, so we can make sure data is read only
91 * once, and all accesses are with the specified bus width.
92 */
93 nbytes = length * size;
94 do {
95 char linebuf[DISP_LINE_LEN];
c95c4280 96 void* p;
3863585b 97 linebytes = (nbytes>DISP_LINE_LEN)?DISP_LINE_LEN:nbytes;
2abbe075 98
c95c4280
GL
99 rc = read_dataflash(addr, (linebytes/size)*size, linebuf);
100 p = (rc == DATAFLASH_OK) ? linebuf : (void*)addr;
101 print_buffer(addr, p, size, linebytes/size, DISP_LINE_LEN/size);
102
3863585b 103 nbytes -= linebytes;
c95c4280 104 addr += linebytes;
3863585b
WD
105 if (ctrlc()) {
106 rc = 1;
107 break;
108 }
109 } while (nbytes > 0);
c95c4280 110#else
4c727c77
MF
111
112# if defined(CONFIG_BLACKFIN)
113 /* See if we're trying to display L1 inst */
114 if (addr_bfin_on_chip_mem(addr)) {
115 char linebuf[DISP_LINE_LEN];
116 ulong linebytes, nbytes = length * size;
117 do {
118 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
119 memcpy(linebuf, (void *)addr, linebytes);
120 print_buffer(addr, linebuf, size, linebytes/size, DISP_LINE_LEN/size);
121
122 nbytes -= linebytes;
123 addr += linebytes;
124 if (ctrlc()) {
125 rc = 1;
126 break;
127 }
128 } while (nbytes > 0);
129 } else
130# endif
131
132 {
0628ab8e
SG
133 ulong bytes = size * length;
134 const void *buf = map_sysmem(addr, bytes);
135
4c727c77 136 /* Print the lines. */
0628ab8e
SG
137 print_buffer(addr, buf, size, length, DISP_LINE_LEN / size);
138 addr += bytes;
139 unmap_sysmem(buf);
4c727c77 140 }
c95c4280 141#endif
3863585b
WD
142
143 dp_last_addr = addr;
144 dp_last_length = length;
145 dp_last_size = size;
146 return (rc);
147}
148
088f1b19 149static int do_mem_mm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b
WD
150{
151 return mod_mem (cmdtp, 1, flag, argc, argv);
152}
088f1b19 153static int do_mem_nm(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b
WD
154{
155 return mod_mem (cmdtp, 0, flag, argc, argv);
156}
157
088f1b19 158static int do_mem_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 159{
4d1fd7f1
YS
160#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
161 u64 writeval;
162#else
163 ulong writeval;
164#endif
165 ulong addr, count;
27b207fd 166 int size;
0628ab8e
SG
167 void *buf;
168 ulong bytes;
3863585b 169
47e26b1b 170 if ((argc < 3) || (argc > 4))
4c12eeb8 171 return CMD_RET_USAGE;
3863585b
WD
172
173 /* Check for size specification.
174 */
27b207fd
WD
175 if ((size = cmd_get_data_size(argv[0], 4)) < 1)
176 return 1;
3863585b
WD
177
178 /* Address is specified since argc > 1
179 */
180 addr = simple_strtoul(argv[1], NULL, 16);
181 addr += base_address;
182
183 /* Get the value to write.
184 */
4d1fd7f1
YS
185#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
186 writeval = simple_strtoull(argv[2], NULL, 16);
187#else
3863585b 188 writeval = simple_strtoul(argv[2], NULL, 16);
4d1fd7f1 189#endif
3863585b
WD
190
191 /* Count ? */
192 if (argc == 4) {
193 count = simple_strtoul(argv[3], NULL, 16);
194 } else {
195 count = 1;
196 }
197
0628ab8e
SG
198 bytes = size * count;
199 buf = map_sysmem(addr, bytes);
3863585b
WD
200 while (count-- > 0) {
201 if (size == 4)
76698b4e 202 *((u32 *)buf) = (u32)writeval;
4d1fd7f1
YS
203#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
204 else if (size == 8)
205 *((u64 *)buf) = (u64)writeval;
206#endif
3863585b 207 else if (size == 2)
76698b4e 208 *((u16 *)buf) = (u16)writeval;
3863585b 209 else
76698b4e 210 *((u8 *)buf) = (u8)writeval;
0628ab8e 211 buf += size;
3863585b 212 }
0628ab8e 213 unmap_sysmem(buf);
3863585b
WD
214 return 0;
215}
216
4aaf29b2 217#ifdef CONFIG_MX_CYCLIC
5a8608e5 218static int do_mem_mdc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
4aaf29b2
SR
219{
220 int i;
221 ulong count;
222
47e26b1b 223 if (argc < 4)
4c12eeb8 224 return CMD_RET_USAGE;
4aaf29b2
SR
225
226 count = simple_strtoul(argv[3], NULL, 10);
227
228 for (;;) {
229 do_mem_md (NULL, 0, 3, argv);
230
231 /* delay for <count> ms... */
232 for (i=0; i<count; i++)
233 udelay (1000);
234
235 /* check for ctrl-c to abort... */
236 if (ctrlc()) {
237 puts("Abort\n");
238 return 0;
239 }
240 }
241
242 return 0;
243}
244
5a8608e5 245static int do_mem_mwc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
4aaf29b2
SR
246{
247 int i;
248 ulong count;
249
47e26b1b 250 if (argc < 4)
4c12eeb8 251 return CMD_RET_USAGE;
4aaf29b2
SR
252
253 count = simple_strtoul(argv[3], NULL, 10);
254
255 for (;;) {
256 do_mem_mw (NULL, 0, 3, argv);
257
258 /* delay for <count> ms... */
259 for (i=0; i<count; i++)
260 udelay (1000);
261
262 /* check for ctrl-c to abort... */
263 if (ctrlc()) {
264 puts("Abort\n");
265 return 0;
266 }
267 }
268
269 return 0;
270}
271#endif /* CONFIG_MX_CYCLIC */
272
088f1b19 273static int do_mem_cmp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 274{
0628ab8e 275 ulong addr1, addr2, count, ngood, bytes;
27b207fd 276 int size;
3863585b 277 int rcode = 0;
054ea170 278 const char *type;
0628ab8e 279 const void *buf1, *buf2, *base;
4d1fd7f1
YS
280#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
281 u64 word1, word2;
282#else
283 ulong word1, word2;
284#endif
3863585b 285
47e26b1b 286 if (argc != 4)
4c12eeb8 287 return CMD_RET_USAGE;
3863585b
WD
288
289 /* Check for size specification.
290 */
27b207fd
WD
291 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
292 return 1;
4d1fd7f1
YS
293 type = size == 8 ? "double word" :
294 size == 4 ? "word" :
295 size == 2 ? "halfword" : "byte";
3863585b
WD
296
297 addr1 = simple_strtoul(argv[1], NULL, 16);
298 addr1 += base_address;
299
300 addr2 = simple_strtoul(argv[2], NULL, 16);
301 addr2 += base_address;
302
303 count = simple_strtoul(argv[3], NULL, 16);
304
2abbe075
WD
305#ifdef CONFIG_HAS_DATAFLASH
306 if (addr_dataflash(addr1) | addr_dataflash(addr2)){
4b9206ed 307 puts ("Comparison with DataFlash space not supported.\n\r");
2abbe075
WD
308 return 0;
309 }
310#endif
311
4c727c77
MF
312#ifdef CONFIG_BLACKFIN
313 if (addr_bfin_on_chip_mem(addr1) || addr_bfin_on_chip_mem(addr2)) {
314 puts ("Comparison with L1 instruction memory not supported.\n\r");
315 return 0;
316 }
317#endif
318
0628ab8e
SG
319 bytes = size * count;
320 base = buf1 = map_sysmem(addr1, bytes);
321 buf2 = map_sysmem(addr2, bytes);
feb12a1f 322 for (ngood = 0; ngood < count; ++ngood) {
3863585b 323 if (size == 4) {
76698b4e
YS
324 word1 = *(u32 *)buf1;
325 word2 = *(u32 *)buf2;
4d1fd7f1
YS
326#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
327 } else if (size == 8) {
328 word1 = *(u64 *)buf1;
329 word2 = *(u64 *)buf2;
330#endif
054ea170 331 } else if (size == 2) {
76698b4e
YS
332 word1 = *(u16 *)buf1;
333 word2 = *(u16 *)buf2;
054ea170 334 } else {
76698b4e
YS
335 word1 = *(u8 *)buf1;
336 word2 = *(u8 *)buf2;
3863585b 337 }
054ea170 338 if (word1 != word2) {
0628ab8e 339 ulong offset = buf1 - base;
4d1fd7f1
YS
340#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
341 printf("%s at 0x%p (%#0*llx) != %s at 0x%p (%#0*llx)\n",
342 type, (void *)(addr1 + offset), size, word1,
343 type, (void *)(addr2 + offset), size, word2);
344#else
054ea170 345 printf("%s at 0x%08lx (%#0*lx) != %s at 0x%08lx (%#0*lx)\n",
0628ab8e
SG
346 type, (ulong)(addr1 + offset), size, word1,
347 type, (ulong)(addr2 + offset), size, word2);
4d1fd7f1 348#endif
054ea170
MF
349 rcode = 1;
350 break;
3863585b 351 }
054ea170 352
0628ab8e
SG
353 buf1 += size;
354 buf2 += size;
eaadb44e
SR
355
356 /* reset watchdog from time to time */
feb12a1f 357 if ((ngood % (64 << 10)) == 0)
eaadb44e 358 WATCHDOG_RESET();
3863585b 359 }
0628ab8e
SG
360 unmap_sysmem(buf1);
361 unmap_sysmem(buf2);
3863585b 362
054ea170 363 printf("Total of %ld %s(s) were the same\n", ngood, type);
3863585b
WD
364 return rcode;
365}
366
088f1b19 367static int do_mem_cp(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 368{
0628ab8e 369 ulong addr, dest, count, bytes;
27b207fd 370 int size;
0628ab8e
SG
371 const void *src;
372 void *buf;
3863585b 373
47e26b1b 374 if (argc != 4)
4c12eeb8 375 return CMD_RET_USAGE;
3863585b
WD
376
377 /* Check for size specification.
378 */
27b207fd
WD
379 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
380 return 1;
3863585b
WD
381
382 addr = simple_strtoul(argv[1], NULL, 16);
383 addr += base_address;
384
385 dest = simple_strtoul(argv[2], NULL, 16);
386 dest += base_address;
387
388 count = simple_strtoul(argv[3], NULL, 16);
389
390 if (count == 0) {
391 puts ("Zero length ???\n");
392 return 1;
393 }
394
6d0f6bcf 395#ifndef CONFIG_SYS_NO_FLASH
3863585b 396 /* check if we are copying to Flash */
2abbe075
WD
397 if ( (addr2info(dest) != NULL)
398#ifdef CONFIG_HAS_DATAFLASH
84d0c2f1 399 && (!addr_dataflash(dest))
2abbe075
WD
400#endif
401 ) {
3863585b
WD
402 int rc;
403
4b9206ed 404 puts ("Copy to Flash... ");
3863585b 405
77ddac94 406 rc = flash_write ((char *)addr, dest, count*size);
3863585b
WD
407 if (rc != 0) {
408 flash_perror (rc);
409 return (1);
410 }
411 puts ("done\n");
412 return 0;
413 }
414#endif
415
2abbe075
WD
416#ifdef CONFIG_HAS_DATAFLASH
417 /* Check if we are copying from RAM or Flash to DataFlash */
418 if (addr_dataflash(dest) && !addr_dataflash(addr)){
419 int rc;
420
4b9206ed 421 puts ("Copy to DataFlash... ");
2abbe075
WD
422
423 rc = write_dataflash (dest, addr, count*size);
424
425 if (rc != 1) {
426 dataflash_perror (rc);
427 return (1);
428 }
429 puts ("done\n");
430 return 0;
431 }
8bde7f77 432
2abbe075 433 /* Check if we are copying from DataFlash to RAM */
880cc438 434 if (addr_dataflash(addr) && !addr_dataflash(dest)
6d0f6bcf 435#ifndef CONFIG_SYS_NO_FLASH
880cc438
SP
436 && (addr2info(dest) == NULL)
437#endif
438 ){
5779d8d9
WD
439 int rc;
440 rc = read_dataflash(addr, count * size, (char *) dest);
441 if (rc != 1) {
d4ca31c4
WD
442 dataflash_perror (rc);
443 return (1);
444 }
2abbe075
WD
445 return 0;
446 }
447
448 if (addr_dataflash(addr) && addr_dataflash(dest)){
4b9206ed 449 puts ("Unsupported combination of source/destination.\n\r");
2abbe075
WD
450 return 1;
451 }
452#endif
453
4c727c77
MF
454#ifdef CONFIG_BLACKFIN
455 /* See if we're copying to/from L1 inst */
456 if (addr_bfin_on_chip_mem(dest) || addr_bfin_on_chip_mem(addr)) {
457 memcpy((void *)dest, (void *)addr, count * size);
458 return 0;
459 }
460#endif
461
0628ab8e 462 bytes = size * count;
53237afe 463 buf = map_sysmem(dest, bytes);
0628ab8e 464 src = map_sysmem(addr, bytes);
3863585b
WD
465 while (count-- > 0) {
466 if (size == 4)
76698b4e 467 *((u32 *)buf) = *((u32 *)src);
4d1fd7f1
YS
468#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
469 else if (size == 8)
470 *((u64 *)buf) = *((u64 *)src);
471#endif
3863585b 472 else if (size == 2)
76698b4e 473 *((u16 *)buf) = *((u16 *)src);
3863585b 474 else
76698b4e 475 *((u8 *)buf) = *((u8 *)src);
0628ab8e
SG
476 src += size;
477 buf += size;
eaadb44e
SR
478
479 /* reset watchdog from time to time */
480 if ((count % (64 << 10)) == 0)
481 WATCHDOG_RESET();
3863585b 482 }
a3a4749d
MY
483 unmap_sysmem(buf);
484 unmap_sysmem(src);
485
3863585b
WD
486 return 0;
487}
488
088f1b19
KP
489static int do_mem_base(cmd_tbl_t *cmdtp, int flag, int argc,
490 char * const argv[])
3863585b
WD
491{
492 if (argc > 1) {
493 /* Set new base address.
494 */
495 base_address = simple_strtoul(argv[1], NULL, 16);
496 }
497 /* Print the current base address.
498 */
499 printf("Base Address: 0x%08lx\n", base_address);
500 return 0;
501}
502
088f1b19
KP
503static int do_mem_loop(cmd_tbl_t *cmdtp, int flag, int argc,
504 char * const argv[])
3863585b 505{
0628ab8e 506 ulong addr, length, i, bytes;
27b207fd 507 int size;
4d1fd7f1
YS
508#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
509 volatile u64 *llp;
510#endif
76698b4e
YS
511 volatile u32 *longp;
512 volatile u16 *shortp;
513 volatile u8 *cp;
0628ab8e 514 const void *buf;
3863585b 515
47e26b1b 516 if (argc < 3)
4c12eeb8 517 return CMD_RET_USAGE;
3863585b 518
85de63e2
RD
519 /*
520 * Check for a size specification.
3863585b
WD
521 * Defaults to long if no or incorrect specification.
522 */
27b207fd
WD
523 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
524 return 1;
3863585b
WD
525
526 /* Address is always specified.
527 */
528 addr = simple_strtoul(argv[1], NULL, 16);
529
530 /* Length is the number of objects, not number of bytes.
531 */
532 length = simple_strtoul(argv[2], NULL, 16);
533
0628ab8e
SG
534 bytes = size * length;
535 buf = map_sysmem(addr, bytes);
536
3863585b
WD
537 /* We want to optimize the loops to run as fast as possible.
538 * If we have only one object, just run infinite loops.
539 */
540 if (length == 1) {
4d1fd7f1
YS
541#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
542 if (size == 8) {
543 llp = (u64 *)buf;
544 for (;;)
545 i = *llp;
546 }
547#endif
3863585b 548 if (size == 4) {
76698b4e 549 longp = (u32 *)buf;
3863585b
WD
550 for (;;)
551 i = *longp;
552 }
553 if (size == 2) {
76698b4e 554 shortp = (u16 *)buf;
3863585b
WD
555 for (;;)
556 i = *shortp;
557 }
76698b4e 558 cp = (u8 *)buf;
3863585b
WD
559 for (;;)
560 i = *cp;
561 }
562
4d1fd7f1
YS
563#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
564 if (size == 8) {
565 for (;;) {
566 llp = (u64 *)buf;
567 i = length;
568 while (i-- > 0)
569 *llp++;
570 }
571 }
572#endif
3863585b
WD
573 if (size == 4) {
574 for (;;) {
76698b4e 575 longp = (u32 *)buf;
3863585b
WD
576 i = length;
577 while (i-- > 0)
f3b3c3df 578 *longp++;
3863585b
WD
579 }
580 }
581 if (size == 2) {
582 for (;;) {
76698b4e 583 shortp = (u16 *)buf;
3863585b
WD
584 i = length;
585 while (i-- > 0)
f3b3c3df 586 *shortp++;
3863585b
WD
587 }
588 }
589 for (;;) {
76698b4e 590 cp = (u8 *)buf;
3863585b
WD
591 i = length;
592 while (i-- > 0)
f3b3c3df 593 *cp++;
3863585b 594 }
0628ab8e 595 unmap_sysmem(buf);
92765f42
SG
596
597 return 0;
3863585b
WD
598}
599
56523f12 600#ifdef CONFIG_LOOPW
5a8608e5
MY
601static int do_mem_loopw(cmd_tbl_t *cmdtp, int flag, int argc,
602 char * const argv[])
56523f12 603{
4d1fd7f1 604 ulong addr, length, i, bytes;
56523f12 605 int size;
4d1fd7f1
YS
606#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
607 volatile u64 *llp;
608 u64 data;
609#else
610 ulong data;
611#endif
76698b4e
YS
612 volatile u32 *longp;
613 volatile u16 *shortp;
614 volatile u8 *cp;
0628ab8e 615 void *buf;
81050926 616
47e26b1b 617 if (argc < 4)
4c12eeb8 618 return CMD_RET_USAGE;
56523f12 619
85de63e2
RD
620 /*
621 * Check for a size specification.
56523f12
WD
622 * Defaults to long if no or incorrect specification.
623 */
624 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
625 return 1;
626
627 /* Address is always specified.
628 */
629 addr = simple_strtoul(argv[1], NULL, 16);
630
631 /* Length is the number of objects, not number of bytes.
632 */
633 length = simple_strtoul(argv[2], NULL, 16);
634
635 /* data to write */
4d1fd7f1
YS
636#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
637 data = simple_strtoull(argv[3], NULL, 16);
638#else
56523f12 639 data = simple_strtoul(argv[3], NULL, 16);
4d1fd7f1 640#endif
81050926 641
0628ab8e
SG
642 bytes = size * length;
643 buf = map_sysmem(addr, bytes);
644
56523f12
WD
645 /* We want to optimize the loops to run as fast as possible.
646 * If we have only one object, just run infinite loops.
647 */
648 if (length == 1) {
4d1fd7f1
YS
649#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
650 if (size == 8) {
651 llp = (u64 *)buf;
652 for (;;)
653 *llp = data;
654 }
655#endif
56523f12 656 if (size == 4) {
76698b4e 657 longp = (u32 *)buf;
56523f12
WD
658 for (;;)
659 *longp = data;
4d1fd7f1 660 }
56523f12 661 if (size == 2) {
76698b4e 662 shortp = (u16 *)buf;
56523f12
WD
663 for (;;)
664 *shortp = data;
665 }
76698b4e 666 cp = (u8 *)buf;
56523f12
WD
667 for (;;)
668 *cp = data;
669 }
670
4d1fd7f1
YS
671#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
672 if (size == 8) {
673 for (;;) {
674 llp = (u64 *)buf;
675 i = length;
676 while (i-- > 0)
677 *llp++ = data;
678 }
679 }
680#endif
56523f12
WD
681 if (size == 4) {
682 for (;;) {
76698b4e 683 longp = (u32 *)buf;
56523f12
WD
684 i = length;
685 while (i-- > 0)
686 *longp++ = data;
687 }
688 }
689 if (size == 2) {
690 for (;;) {
76698b4e 691 shortp = (u16 *)buf;
56523f12
WD
692 i = length;
693 while (i-- > 0)
694 *shortp++ = data;
695 }
696 }
697 for (;;) {
76698b4e 698 cp = (u8 *)buf;
56523f12
WD
699 i = length;
700 while (i-- > 0)
701 *cp++ = data;
702 }
703}
704#endif /* CONFIG_LOOPW */
705
68149e94 706#ifdef CONFIG_CMD_MEMTEST
5512d5b0
SG
707static ulong mem_test_alt(vu_long *buf, ulong start_addr, ulong end_addr,
708 vu_long *dummy)
3863585b 709{
c9638f50 710 vu_long *addr;
c9638f50
SG
711 ulong errs = 0;
712 ulong val, readback;
713 int j;
c9638f50
SG
714 vu_long offset;
715 vu_long test_offset;
716 vu_long pattern;
717 vu_long temp;
718 vu_long anti_pattern;
719 vu_long num_words;
3863585b
WD
720 static const ulong bitpattern[] = {
721 0x00000001, /* single bit */
722 0x00000003, /* two adjacent bits */
723 0x00000007, /* three adjacent bits */
724 0x0000000F, /* four adjacent bits */
725 0x00000005, /* two non-adjacent bits */
726 0x00000015, /* three non-adjacent bits */
727 0x00000055, /* four non-adjacent bits */
728 0xaaaaaaaa, /* alternating 1/0 */
729 };
3863585b 730
5512d5b0 731 num_words = (end_addr - start_addr) / sizeof(vu_long);
8c86bbe0 732
7ecbd4d7
SG
733 /*
734 * Data line test: write a pattern to the first
735 * location, write the 1's complement to a 'parking'
736 * address (changes the state of the data bus so a
737 * floating bus doesn't give a false OK), and then
738 * read the value back. Note that we read it back
739 * into a variable because the next time we read it,
740 * it might be right (been there, tough to explain to
741 * the quality guys why it prints a failure when the
742 * "is" and "should be" are obviously the same in the
743 * error message).
744 *
745 * Rather than exhaustively testing, we test some
746 * patterns by shifting '1' bits through a field of
747 * '0's and '0' bits through a field of '1's (i.e.
748 * pattern and ~pattern).
749 */
5512d5b0 750 addr = buf;
7ecbd4d7
SG
751 for (j = 0; j < sizeof(bitpattern) / sizeof(bitpattern[0]); j++) {
752 val = bitpattern[j];
753 for (; val != 0; val <<= 1) {
5512d5b0 754 *addr = val;
c9638f50 755 *dummy = ~val; /* clear the test data off the bus */
3863585b 756 readback = *addr;
7ecbd4d7 757 if (readback != val) {
c9638f50
SG
758 printf("FAILURE (data line): "
759 "expected %08lx, actual %08lx\n",
760 val, readback);
761 errs++;
c44d4386 762 if (ctrlc())
51209b1f 763 return -1;
3863585b
WD
764 }
765 *addr = ~val;
766 *dummy = val;
767 readback = *addr;
c9638f50
SG
768 if (readback != ~val) {
769 printf("FAILURE (data line): "
770 "Is %08lx, should be %08lx\n",
771 readback, ~val);
772 errs++;
c44d4386 773 if (ctrlc())
51209b1f 774 return -1;
3863585b 775 }
3863585b 776 }
7ecbd4d7 777 }
3863585b 778
7ecbd4d7
SG
779 /*
780 * Based on code whose Original Author and Copyright
781 * information follows: Copyright (c) 1998 by Michael
782 * Barr. This software is placed into the public
783 * domain and may be used for any purpose. However,
784 * this notice must not be changed or removed and no
785 * warranty is either expressed or implied by its
786 * publication or distribution.
787 */
3863585b 788
7ecbd4d7
SG
789 /*
790 * Address line test
791
792 * Description: Test the address bus wiring in a
793 * memory region by performing a walking
794 * 1's test on the relevant bits of the
795 * address and checking for aliasing.
796 * This test will find single-bit
797 * address failures such as stuck-high,
798 * stuck-low, and shorted pins. The base
799 * address and size of the region are
800 * selected by the caller.
801
802 * Notes: For best results, the selected base
803 * address should have enough LSB 0's to
804 * guarantee single address bit changes.
805 * For example, to test a 64-Kbyte
806 * region, select a base address on a
807 * 64-Kbyte boundary. Also, select the
808 * region size as a power-of-two if at
809 * all possible.
810 *
811 * Returns: 0 if the test succeeds, 1 if the test fails.
812 */
7ecbd4d7
SG
813 pattern = (vu_long) 0xaaaaaaaa;
814 anti_pattern = (vu_long) 0x55555555;
3863585b 815
5512d5b0 816 debug("%s:%d: length = 0x%.8lx\n", __func__, __LINE__, num_words);
7ecbd4d7
SG
817 /*
818 * Write the default pattern at each of the
819 * power-of-two offsets.
820 */
5512d5b0
SG
821 for (offset = 1; offset < num_words; offset <<= 1)
822 addr[offset] = pattern;
3863585b 823
7ecbd4d7
SG
824 /*
825 * Check for address bits stuck high.
826 */
827 test_offset = 0;
5512d5b0 828 addr[test_offset] = anti_pattern;
3863585b 829
5512d5b0
SG
830 for (offset = 1; offset < num_words; offset <<= 1) {
831 temp = addr[offset];
7ecbd4d7 832 if (temp != pattern) {
c9638f50 833 printf("\nFAILURE: Address bit stuck high @ 0x%.8lx:"
3863585b 834 " expected 0x%.8lx, actual 0x%.8lx\n",
102c051f
DF
835 start_addr + offset*sizeof(vu_long),
836 pattern, temp);
87b22b77 837 errs++;
c44d4386 838 if (ctrlc())
7ecbd4d7 839 return -1;
3863585b 840 }
7ecbd4d7 841 }
5512d5b0 842 addr[test_offset] = pattern;
7ecbd4d7 843 WATCHDOG_RESET();
3863585b 844
7ecbd4d7
SG
845 /*
846 * Check for addr bits stuck low or shorted.
847 */
5512d5b0
SG
848 for (test_offset = 1; test_offset < num_words; test_offset <<= 1) {
849 addr[test_offset] = anti_pattern;
3863585b 850
5512d5b0
SG
851 for (offset = 1; offset < num_words; offset <<= 1) {
852 temp = addr[offset];
3863585b 853 if ((temp != pattern) && (offset != test_offset)) {
7ecbd4d7
SG
854 printf("\nFAILURE: Address bit stuck low or"
855 " shorted @ 0x%.8lx: expected 0x%.8lx,"
856 " actual 0x%.8lx\n",
102c051f
DF
857 start_addr + offset*sizeof(vu_long),
858 pattern, temp);
7ecbd4d7 859 errs++;
c44d4386 860 if (ctrlc())
7ecbd4d7 861 return -1;
3863585b 862 }
3863585b 863 }
5512d5b0 864 addr[test_offset] = pattern;
7ecbd4d7 865 }
3863585b 866
7ecbd4d7
SG
867 /*
868 * Description: Test the integrity of a physical
869 * memory device by performing an
870 * increment/decrement test over the
871 * entire region. In the process every
872 * storage bit in the device is tested
873 * as a zero and a one. The base address
874 * and the size of the region are
875 * selected by the caller.
876 *
877 * Returns: 0 if the test succeeds, 1 if the test fails.
878 */
5512d5b0 879 num_words++;
3863585b 880
7ecbd4d7
SG
881 /*
882 * Fill memory with a known pattern.
883 */
884 for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
885 WATCHDOG_RESET();
5512d5b0 886 addr[offset] = pattern;
7ecbd4d7 887 }
3863585b 888
7ecbd4d7
SG
889 /*
890 * Check each location and invert it for the second pass.
891 */
892 for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
893 WATCHDOG_RESET();
5512d5b0 894 temp = addr[offset];
7ecbd4d7 895 if (temp != pattern) {
c9638f50 896 printf("\nFAILURE (read/write) @ 0x%.8lx:"
3863585b 897 " expected 0x%.8lx, actual 0x%.8lx)\n",
102c051f
DF
898 start_addr + offset*sizeof(vu_long),
899 pattern, temp);
87b22b77 900 errs++;
c44d4386 901 if (ctrlc())
51209b1f 902 return -1;
3863585b
WD
903 }
904
7ecbd4d7 905 anti_pattern = ~pattern;
5512d5b0 906 addr[offset] = anti_pattern;
7ecbd4d7
SG
907 }
908
909 /*
910 * Check each location for the inverted pattern and zero it.
911 */
912 for (pattern = 1, offset = 0; offset < num_words; pattern++, offset++) {
913 WATCHDOG_RESET();
914 anti_pattern = ~pattern;
5512d5b0 915 temp = addr[offset];
7ecbd4d7 916 if (temp != anti_pattern) {
c9638f50 917 printf("\nFAILURE (read/write): @ 0x%.8lx:"
3863585b 918 " expected 0x%.8lx, actual 0x%.8lx)\n",
102c051f
DF
919 start_addr + offset*sizeof(vu_long),
920 anti_pattern, temp);
87b22b77 921 errs++;
c44d4386 922 if (ctrlc())
51209b1f 923 return -1;
3863585b 924 }
5512d5b0 925 addr[offset] = 0;
7ecbd4d7 926 }
51209b1f
SG
927
928 return 0;
c9638f50
SG
929}
930
5512d5b0
SG
931static ulong mem_test_quick(vu_long *buf, ulong start_addr, ulong end_addr,
932 vu_long pattern, int iteration)
c9638f50 933{
5512d5b0 934 vu_long *end;
c9638f50 935 vu_long *addr;
c9638f50 936 ulong errs = 0;
5512d5b0 937 ulong incr, length;
c9638f50 938 ulong val, readback;
3863585b 939
51209b1f 940 /* Alternate the pattern */
3863585b 941 incr = 1;
51209b1f
SG
942 if (iteration & 1) {
943 incr = -incr;
944 /*
945 * Flip the pattern each time to make lots of zeros and
946 * then, the next time, lots of ones. We decrement
947 * the "negative" patterns and increment the "positive"
948 * patterns to preserve this feature.
949 */
950 if (pattern & 0x80000000)
951 pattern = -pattern; /* complement & increment */
952 else
953 pattern = ~pattern;
954 }
5512d5b0
SG
955 length = (end_addr - start_addr) / sizeof(ulong);
956 end = buf + length;
7ecbd4d7
SG
957 printf("\rPattern %08lX Writing..."
958 "%12s"
959 "\b\b\b\b\b\b\b\b\b\b",
960 pattern, "");
3863585b 961
5512d5b0 962 for (addr = buf, val = pattern; addr < end; addr++) {
7ecbd4d7
SG
963 WATCHDOG_RESET();
964 *addr = val;
965 val += incr;
966 }
3863585b 967
7ecbd4d7 968 puts("Reading...");
3863585b 969
5512d5b0 970 for (addr = buf, val = pattern; addr < end; addr++) {
7ecbd4d7
SG
971 WATCHDOG_RESET();
972 readback = *addr;
973 if (readback != val) {
5512d5b0
SG
974 ulong offset = addr - buf;
975
7ecbd4d7
SG
976 printf("\nMem error @ 0x%08X: "
977 "found %08lX, expected %08lX\n",
102c051f 978 (uint)(uintptr_t)(start_addr + offset*sizeof(vu_long)),
5512d5b0 979 readback, val);
7ecbd4d7 980 errs++;
c44d4386 981 if (ctrlc())
7ecbd4d7 982 return -1;
3863585b 983 }
7ecbd4d7
SG
984 val += incr;
985 }
3863585b 986
51209b1f 987 return 0;
c9638f50
SG
988}
989
990/*
991 * Perform a memory test. A more complete alternative test can be
992 * configured using CONFIG_SYS_ALT_MEMTEST. The complete test loops until
993 * interrupted by ctrl-c or by a failure of one of the sub-tests.
994 */
995static int do_mem_mtest(cmd_tbl_t *cmdtp, int flag, int argc,
996 char * const argv[])
997{
8c86bbe0 998 ulong start, end;
5512d5b0 999 vu_long *buf, *dummy;
c9638f50
SG
1000 int iteration_limit;
1001 int ret;
51209b1f 1002 ulong errs = 0; /* number of errors, or -1 if interrupted */
c9638f50 1003 ulong pattern;
51209b1f 1004 int iteration;
c9638f50
SG
1005#if defined(CONFIG_SYS_ALT_MEMTEST)
1006 const int alt_test = 1;
1007#else
1008 const int alt_test = 0;
3863585b 1009#endif
c9638f50
SG
1010
1011 if (argc > 1)
8c86bbe0 1012 start = simple_strtoul(argv[1], NULL, 16);
c9638f50 1013 else
8c86bbe0 1014 start = CONFIG_SYS_MEMTEST_START;
c9638f50
SG
1015
1016 if (argc > 2)
8c86bbe0 1017 end = simple_strtoul(argv[2], NULL, 16);
c9638f50 1018 else
8c86bbe0 1019 end = CONFIG_SYS_MEMTEST_END;
c9638f50
SG
1020
1021 if (argc > 3)
1022 pattern = (ulong)simple_strtoul(argv[3], NULL, 16);
1023 else
1024 pattern = 0;
1025
1026 if (argc > 4)
1027 iteration_limit = (ulong)simple_strtoul(argv[4], NULL, 16);
1028 else
1029 iteration_limit = 0;
1030
8c86bbe0
SG
1031 printf("Testing %08x ... %08x:\n", (uint)start, (uint)end);
1032 debug("%s:%d: start %#08lx end %#08lx\n", __func__, __LINE__,
1033 start, end);
51209b1f 1034
5512d5b0
SG
1035 buf = map_sysmem(start, end - start);
1036 dummy = map_sysmem(CONFIG_SYS_MEMTEST_SCRATCH, sizeof(vu_long));
51209b1f
SG
1037 for (iteration = 0;
1038 !iteration_limit || iteration < iteration_limit;
1039 iteration++) {
1040 if (ctrlc()) {
51209b1f
SG
1041 errs = -1UL;
1042 break;
1043 }
1044
1045 printf("Iteration: %6d\r", iteration + 1);
1046 debug("\n");
5512d5b0
SG
1047 if (alt_test) {
1048 errs = mem_test_alt(buf, start, end, dummy);
1049 } else {
1050 errs = mem_test_quick(buf, start, end, pattern,
1051 iteration);
1052 }
1053 if (errs == -1UL)
1054 break;
1055 }
1056
1057 /*
1058 * Work-around for eldk-4.2 which gives this warning if we try to
1059 * case in the unmap_sysmem() call:
1060 * warning: initialization discards qualifiers from pointer target type
1061 */
1062 {
1063 void *vbuf = (void *)buf;
1064 void *vdummy = (void *)dummy;
1065
1066 unmap_sysmem(vbuf);
1067 unmap_sysmem(vdummy);
51209b1f
SG
1068 }
1069
1070 if (errs == -1UL) {
c44d4386
SG
1071 /* Memory test was aborted - write a newline to finish off */
1072 putc('\n');
51209b1f
SG
1073 ret = 1;
1074 } else {
1075 printf("Tested %d iteration(s) with %lu errors.\n",
1076 iteration, errs);
1077 ret = errs != 0;
1078 }
c9638f50
SG
1079
1080 return ret; /* not reached */
3863585b 1081}
a2681707 1082#endif /* CONFIG_CMD_MEMTEST */
3863585b
WD
1083
1084/* Modify memory.
1085 *
1086 * Syntax:
4d1fd7f1
YS
1087 * mm{.b, .w, .l, .q} {addr}
1088 * nm{.b, .w, .l, .q} {addr}
3863585b
WD
1089 */
1090static int
54841ab5 1091mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char * const argv[])
3863585b 1092{
4d1fd7f1
YS
1093 ulong addr;
1094#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1095 u64 i;
1096#else
1097 ulong i;
1098#endif
27b207fd 1099 int nbytes, size;
0628ab8e 1100 void *ptr = NULL;
3863585b 1101
47e26b1b 1102 if (argc != 2)
4c12eeb8 1103 return CMD_RET_USAGE;
3863585b 1104
b26440f1 1105 bootretry_reset_cmd_timeout(); /* got a good command to get here */
3863585b
WD
1106 /* We use the last specified parameters, unless new ones are
1107 * entered.
1108 */
1109 addr = mm_last_addr;
1110 size = mm_last_size;
1111
1112 if ((flag & CMD_FLAG_REPEAT) == 0) {
1113 /* New command specified. Check for a size specification.
1114 * Defaults to long if no or incorrect specification.
1115 */
27b207fd
WD
1116 if ((size = cmd_get_data_size(argv[0], 4)) < 0)
1117 return 1;
3863585b
WD
1118
1119 /* Address is specified since argc > 1
1120 */
1121 addr = simple_strtoul(argv[1], NULL, 16);
1122 addr += base_address;
1123 }
1124
2abbe075
WD
1125#ifdef CONFIG_HAS_DATAFLASH
1126 if (addr_dataflash(addr)){
4b9206ed 1127 puts ("Can't modify DataFlash in place. Use cp instead.\n\r");
2abbe075
WD
1128 return 0;
1129 }
1130#endif
1131
4c727c77
MF
1132#ifdef CONFIG_BLACKFIN
1133 if (addr_bfin_on_chip_mem(addr)) {
1134 puts ("Can't modify L1 instruction in place. Use cp instead.\n\r");
1135 return 0;
1136 }
1137#endif
1138
3863585b
WD
1139 /* Print the address, followed by value. Then accept input for
1140 * the next value. A non-converted value exits.
1141 */
1142 do {
0628ab8e 1143 ptr = map_sysmem(addr, size);
3863585b
WD
1144 printf("%08lx:", addr);
1145 if (size == 4)
76698b4e 1146 printf(" %08x", *((u32 *)ptr));
4d1fd7f1
YS
1147#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1148 else if (size == 8)
1149 printf(" %016llx", *((u64 *)ptr));
1150#endif
3863585b 1151 else if (size == 2)
76698b4e 1152 printf(" %04x", *((u16 *)ptr));
3863585b 1153 else
76698b4e 1154 printf(" %02x", *((u8 *)ptr));
3863585b 1155
e1bf824d 1156 nbytes = cli_readline(" ? ");
3863585b
WD
1157 if (nbytes == 0 || (nbytes == 1 && console_buffer[0] == '-')) {
1158 /* <CR> pressed as only input, don't modify current
1159 * location and move to next. "-" pressed will go back.
1160 */
1161 if (incrflag)
1162 addr += nbytes ? -size : size;
1163 nbytes = 1;
b26440f1
SG
1164 /* good enough to not time out */
1165 bootretry_reset_cmd_timeout();
3863585b
WD
1166 }
1167#ifdef CONFIG_BOOT_RETRY_TIME
1168 else if (nbytes == -2) {
1169 break; /* timed out, exit the command */
1170 }
1171#endif
1172 else {
1173 char *endp;
4d1fd7f1
YS
1174#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1175 i = simple_strtoull(console_buffer, &endp, 16);
1176#else
3863585b 1177 i = simple_strtoul(console_buffer, &endp, 16);
4d1fd7f1 1178#endif
3863585b
WD
1179 nbytes = endp - console_buffer;
1180 if (nbytes) {
3863585b
WD
1181 /* good enough to not time out
1182 */
b26440f1 1183 bootretry_reset_cmd_timeout();
3863585b 1184 if (size == 4)
76698b4e 1185 *((u32 *)ptr) = i;
4d1fd7f1
YS
1186#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1187 else if (size == 8)
1188 *((u64 *)ptr) = i;
1189#endif
3863585b 1190 else if (size == 2)
76698b4e 1191 *((u16 *)ptr) = i;
3863585b 1192 else
76698b4e 1193 *((u8 *)ptr) = i;
3863585b
WD
1194 if (incrflag)
1195 addr += size;
1196 }
1197 }
1198 } while (nbytes);
0628ab8e
SG
1199 if (ptr)
1200 unmap_sysmem(ptr);
3863585b
WD
1201
1202 mm_last_addr = addr;
1203 mm_last_size = size;
1204 return 0;
1205}
1206
710b9938
MF
1207#ifdef CONFIG_CMD_CRC32
1208
088f1b19 1209static int do_mem_crc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
3863585b 1210{
d20a40de 1211 int flags = 0;
c26e454d 1212 int ac;
54841ab5 1213 char * const *av;
c26e454d 1214
d20a40de 1215 if (argc < 3)
4c12eeb8 1216 return CMD_RET_USAGE;
c26e454d
WD
1217
1218 av = argv + 1;
1219 ac = argc - 1;
d20a40de 1220#ifdef CONFIG_HASH_VERIFY
c26e454d 1221 if (strcmp(*av, "-v") == 0) {
d20a40de 1222 flags |= HASH_FLAG_VERIFY;
c26e454d
WD
1223 av++;
1224 ac--;
c26e454d 1225 }
d20a40de 1226#endif
c26e454d 1227
d20a40de 1228 return hash_command("crc32", flags, cmdtp, flag, ac, av);
c26e454d 1229}
c26e454d 1230
710b9938
MF
1231#endif
1232
8bde7f77 1233/**************************************************/
0d498393 1234U_BOOT_CMD(
53677ef1 1235 md, 3, 1, do_mem_md,
2fb2604d 1236 "memory display",
4d1fd7f1
YS
1237#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1238 "[.b, .w, .l, .q] address [# of objects]"
1239#else
a89c33db 1240 "[.b, .w, .l] address [# of objects]"
4d1fd7f1 1241#endif
8bde7f77
WD
1242);
1243
1244
0d498393 1245U_BOOT_CMD(
53677ef1 1246 mm, 2, 1, do_mem_mm,
a89c33db 1247 "memory modify (auto-incrementing address)",
4d1fd7f1
YS
1248#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1249 "[.b, .w, .l, .q] address"
1250#else
a89c33db 1251 "[.b, .w, .l] address"
4d1fd7f1 1252#endif
8bde7f77
WD
1253);
1254
1255
0d498393 1256U_BOOT_CMD(
53677ef1 1257 nm, 2, 1, do_mem_nm,
2fb2604d 1258 "memory modify (constant address)",
4d1fd7f1
YS
1259#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1260 "[.b, .w, .l, .q] address"
1261#else
a89c33db 1262 "[.b, .w, .l] address"
4d1fd7f1 1263#endif
8bde7f77
WD
1264);
1265
0d498393 1266U_BOOT_CMD(
53677ef1 1267 mw, 4, 1, do_mem_mw,
2fb2604d 1268 "memory write (fill)",
4d1fd7f1
YS
1269#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1270 "[.b, .w, .l, .q] address value [count]"
1271#else
a89c33db 1272 "[.b, .w, .l] address value [count]"
4d1fd7f1 1273#endif
8bde7f77
WD
1274);
1275
0d498393 1276U_BOOT_CMD(
53677ef1 1277 cp, 4, 1, do_mem_cp,
2fb2604d 1278 "memory copy",
4d1fd7f1
YS
1279#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1280 "[.b, .w, .l, .q] source target count"
1281#else
a89c33db 1282 "[.b, .w, .l] source target count"
4d1fd7f1 1283#endif
8bde7f77
WD
1284);
1285
0d498393 1286U_BOOT_CMD(
53677ef1 1287 cmp, 4, 1, do_mem_cmp,
2fb2604d 1288 "memory compare",
4d1fd7f1
YS
1289#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1290 "[.b, .w, .l, .q] addr1 addr2 count"
1291#else
a89c33db 1292 "[.b, .w, .l] addr1 addr2 count"
4d1fd7f1 1293#endif
8bde7f77
WD
1294);
1295
710b9938
MF
1296#ifdef CONFIG_CMD_CRC32
1297
c26e454d
WD
1298#ifndef CONFIG_CRC32_VERIFY
1299
0d498393 1300U_BOOT_CMD(
53677ef1 1301 crc32, 4, 1, do_mem_crc,
2fb2604d 1302 "checksum calculation",
a89c33db 1303 "address count [addr]\n - compute CRC32 checksum [save at addr]"
8bde7f77
WD
1304);
1305
c26e454d
WD
1306#else /* CONFIG_CRC32_VERIFY */
1307
1308U_BOOT_CMD(
53677ef1 1309 crc32, 5, 1, do_mem_crc,
2fb2604d 1310 "checksum calculation",
c26e454d 1311 "address count [addr]\n - compute CRC32 checksum [save at addr]\n"
a89c33db 1312 "-v address count crc\n - verify crc of memory area"
c26e454d
WD
1313);
1314
1315#endif /* CONFIG_CRC32_VERIFY */
1316
710b9938
MF
1317#endif
1318
15a33e49
SG
1319#ifdef CONFIG_CMD_MEMINFO
1320__weak void board_show_dram(ulong size)
1321{
1322 puts("DRAM: ");
1323 print_size(size, "\n");
1324}
1325
1326static int do_mem_info(cmd_tbl_t *cmdtp, int flag, int argc,
1327 char * const argv[])
1328{
1329 board_show_dram(gd->ram_size);
1330
1331 return 0;
1332}
1333#endif
1334
0d498393 1335U_BOOT_CMD(
53677ef1 1336 base, 2, 1, do_mem_base,
2fb2604d 1337 "print or set address offset",
8bde7f77 1338 "\n - print address offset for memory commands\n"
a89c33db 1339 "base off\n - set address offset for memory commands to 'off'"
8bde7f77
WD
1340);
1341
0d498393 1342U_BOOT_CMD(
53677ef1 1343 loop, 3, 1, do_mem_loop,
2fb2604d 1344 "infinite loop on address range",
4d1fd7f1
YS
1345#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1346 "[.b, .w, .l, .q] address number_of_objects"
1347#else
a89c33db 1348 "[.b, .w, .l] address number_of_objects"
4d1fd7f1 1349#endif
8bde7f77
WD
1350);
1351
56523f12
WD
1352#ifdef CONFIG_LOOPW
1353U_BOOT_CMD(
53677ef1 1354 loopw, 4, 1, do_mem_loopw,
2fb2604d 1355 "infinite write loop on address range",
4d1fd7f1
YS
1356#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1357 "[.b, .w, .l, .q] address number_of_objects data_to_write"
1358#else
a89c33db 1359 "[.b, .w, .l] address number_of_objects data_to_write"
4d1fd7f1 1360#endif
56523f12
WD
1361);
1362#endif /* CONFIG_LOOPW */
1363
a2681707 1364#ifdef CONFIG_CMD_MEMTEST
0d498393 1365U_BOOT_CMD(
b6fc6fd4 1366 mtest, 5, 1, do_mem_mtest,
a89c33db
WD
1367 "simple RAM read/write test",
1368 "[start [end [pattern [iterations]]]]"
8bde7f77 1369);
a2681707 1370#endif /* CONFIG_CMD_MEMTEST */
8bde7f77 1371
4aaf29b2
SR
1372#ifdef CONFIG_MX_CYCLIC
1373U_BOOT_CMD(
53677ef1 1374 mdc, 4, 1, do_mem_mdc,
2fb2604d 1375 "memory display cyclic",
4d1fd7f1
YS
1376#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1377 "[.b, .w, .l, .q] address count delay(ms)"
1378#else
a89c33db 1379 "[.b, .w, .l] address count delay(ms)"
4d1fd7f1 1380#endif
4aaf29b2
SR
1381);
1382
1383U_BOOT_CMD(
53677ef1 1384 mwc, 4, 1, do_mem_mwc,
2fb2604d 1385 "memory write cyclic",
4d1fd7f1
YS
1386#ifdef CONFIG_SYS_SUPPORT_64BIT_DATA
1387 "[.b, .w, .l, .q] address value delay(ms)"
1388#else
a89c33db 1389 "[.b, .w, .l] address value delay(ms)"
4d1fd7f1 1390#endif
4aaf29b2
SR
1391);
1392#endif /* CONFIG_MX_CYCLIC */
15a33e49
SG
1393
1394#ifdef CONFIG_CMD_MEMINFO
1395U_BOOT_CMD(
1396 meminfo, 3, 1, do_mem_info,
1397 "display memory information",
1398 ""
1399);
1400#endif