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Commit | Line | Data |
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64dbbd40 GVB |
1 | /* |
2 | * (C) Copyright 2007 | |
3 | * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com | |
4 | * | |
2a523f52 | 5 | * Copyright 2010-2011 Freescale Semiconductor, Inc. |
a0342c08 | 6 | * |
1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
64dbbd40 GVB |
8 | */ |
9 | ||
10 | #include <common.h> | |
e48f3741 | 11 | #include <inttypes.h> |
3e303f74 | 12 | #include <stdio_dev.h> |
64dbbd40 GVB |
13 | #include <linux/ctype.h> |
14 | #include <linux/types.h> | |
64dbbd40 | 15 | #include <asm/global_data.h> |
64dbbd40 GVB |
16 | #include <libfdt.h> |
17 | #include <fdt_support.h> | |
151c8b09 | 18 | #include <exports.h> |
a0ae380b | 19 | #include <fdtdec.h> |
64dbbd40 | 20 | |
94fb182c AG |
21 | /** |
22 | * fdt_getprop_u32_default_node - Return a node's property or a default | |
23 | * | |
24 | * @fdt: ptr to device tree | |
25 | * @off: offset of node | |
26 | * @cell: cell offset in property | |
27 | * @prop: property name | |
28 | * @dflt: default value if the property isn't found | |
29 | * | |
30 | * Convenience function to return a node's property or a default value if | |
31 | * the property doesn't exist. | |
32 | */ | |
33 | u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell, | |
34 | const char *prop, const u32 dflt) | |
35 | { | |
36 | const fdt32_t *val; | |
37 | int len; | |
38 | ||
39 | val = fdt_getprop(fdt, off, prop, &len); | |
40 | ||
41 | /* Check if property exists */ | |
42 | if (!val) | |
43 | return dflt; | |
44 | ||
45 | /* Check if property is long enough */ | |
46 | if (len < ((cell + 1) * sizeof(uint32_t))) | |
47 | return dflt; | |
48 | ||
49 | return fdt32_to_cpu(*val); | |
50 | } | |
51 | ||
3bed2aaf KG |
52 | /** |
53 | * fdt_getprop_u32_default - Find a node and return it's property or a default | |
54 | * | |
55 | * @fdt: ptr to device tree | |
56 | * @path: path of node | |
57 | * @prop: property name | |
58 | * @dflt: default value if the property isn't found | |
59 | * | |
60 | * Convenience function to find a node and return it's property or a | |
61 | * default value if it doesn't exist. | |
62 | */ | |
07e12784 GB |
63 | u32 fdt_getprop_u32_default(const void *fdt, const char *path, |
64 | const char *prop, const u32 dflt) | |
3bed2aaf | 65 | { |
3bed2aaf KG |
66 | int off; |
67 | ||
68 | off = fdt_path_offset(fdt, path); | |
69 | if (off < 0) | |
70 | return dflt; | |
71 | ||
94fb182c | 72 | return fdt_getprop_u32_default_node(fdt, off, 0, prop, dflt); |
3bed2aaf | 73 | } |
64dbbd40 | 74 | |
a3c2933e KG |
75 | /** |
76 | * fdt_find_and_setprop: Find a node and set it's property | |
77 | * | |
78 | * @fdt: ptr to device tree | |
79 | * @node: path of node | |
80 | * @prop: property name | |
81 | * @val: ptr to new value | |
82 | * @len: length of new property value | |
83 | * @create: flag to create the property if it doesn't exist | |
84 | * | |
85 | * Convenience function to directly set a property given the path to the node. | |
86 | */ | |
87 | int fdt_find_and_setprop(void *fdt, const char *node, const char *prop, | |
88 | const void *val, int len, int create) | |
89 | { | |
8d04f02f | 90 | int nodeoff = fdt_path_offset(fdt, node); |
a3c2933e KG |
91 | |
92 | if (nodeoff < 0) | |
93 | return nodeoff; | |
94 | ||
8aa5ec6e | 95 | if ((!create) && (fdt_get_property(fdt, nodeoff, prop, NULL) == NULL)) |
a3c2933e KG |
96 | return 0; /* create flag not set; so exit quietly */ |
97 | ||
98 | return fdt_setprop(fdt, nodeoff, prop, val, len); | |
99 | } | |
100 | ||
8edb2192 | 101 | /** |
a9e8e291 SG |
102 | * fdt_find_or_add_subnode() - find or possibly add a subnode of a given node |
103 | * | |
8edb2192 MY |
104 | * @fdt: pointer to the device tree blob |
105 | * @parentoffset: structure block offset of a node | |
106 | * @name: name of the subnode to locate | |
107 | * | |
108 | * fdt_subnode_offset() finds a subnode of the node with a given name. | |
109 | * If the subnode does not exist, it will be created. | |
110 | */ | |
a9e8e291 | 111 | int fdt_find_or_add_subnode(void *fdt, int parentoffset, const char *name) |
8edb2192 MY |
112 | { |
113 | int offset; | |
114 | ||
115 | offset = fdt_subnode_offset(fdt, parentoffset, name); | |
116 | ||
117 | if (offset == -FDT_ERR_NOTFOUND) | |
118 | offset = fdt_add_subnode(fdt, parentoffset, name); | |
119 | ||
120 | if (offset < 0) | |
121 | printf("%s: %s: %s\n", __func__, name, fdt_strerror(offset)); | |
122 | ||
123 | return offset; | |
124 | } | |
125 | ||
972f2a89 MY |
126 | /* rename to CONFIG_OF_STDOUT_PATH ? */ |
127 | #if defined(OF_STDOUT_PATH) | |
128 | static int fdt_fixup_stdout(void *fdt, int chosenoff) | |
129 | { | |
130 | return fdt_setprop(fdt, chosenoff, "linux,stdout-path", | |
131 | OF_STDOUT_PATH, strlen(OF_STDOUT_PATH) + 1); | |
132 | } | |
133 | #elif defined(CONFIG_OF_STDOUT_VIA_ALIAS) && defined(CONFIG_CONS_INDEX) | |
40777812 | 134 | static int fdt_fixup_stdout(void *fdt, int chosenoff) |
151c8b09 | 135 | { |
972f2a89 MY |
136 | int err; |
137 | int aliasoff; | |
151c8b09 | 138 | char sername[9] = { 0 }; |
972f2a89 MY |
139 | const void *path; |
140 | int len; | |
141 | char tmp[256]; /* long enough */ | |
151c8b09 | 142 | |
9f29aeb8 | 143 | sprintf(sername, "serial%d", CONFIG_CONS_INDEX - 1); |
151c8b09 | 144 | |
972f2a89 MY |
145 | aliasoff = fdt_path_offset(fdt, "/aliases"); |
146 | if (aliasoff < 0) { | |
147 | err = aliasoff; | |
da77c819 | 148 | goto noalias; |
151c8b09 | 149 | } |
972f2a89 MY |
150 | |
151 | path = fdt_getprop(fdt, aliasoff, sername, &len); | |
152 | if (!path) { | |
153 | err = len; | |
da77c819 | 154 | goto noalias; |
972f2a89 MY |
155 | } |
156 | ||
157 | /* fdt_setprop may break "path" so we copy it to tmp buffer */ | |
158 | memcpy(tmp, path, len); | |
159 | ||
160 | err = fdt_setprop(fdt, chosenoff, "linux,stdout-path", tmp, len); | |
151c8b09 KG |
161 | if (err < 0) |
162 | printf("WARNING: could not set linux,stdout-path %s.\n", | |
972f2a89 | 163 | fdt_strerror(err)); |
151c8b09 KG |
164 | |
165 | return err; | |
da77c819 SW |
166 | |
167 | noalias: | |
168 | printf("WARNING: %s: could not read %s alias: %s\n", | |
169 | __func__, sername, fdt_strerror(err)); | |
170 | ||
171 | return 0; | |
151c8b09 | 172 | } |
972f2a89 MY |
173 | #else |
174 | static int fdt_fixup_stdout(void *fdt, int chosenoff) | |
175 | { | |
176 | return 0; | |
177 | } | |
151c8b09 KG |
178 | #endif |
179 | ||
f18295d3 MY |
180 | static inline int fdt_setprop_uxx(void *fdt, int nodeoffset, const char *name, |
181 | uint64_t val, int is_u64) | |
182 | { | |
183 | if (is_u64) | |
184 | return fdt_setprop_u64(fdt, nodeoffset, name, val); | |
185 | else | |
186 | return fdt_setprop_u32(fdt, nodeoffset, name, (uint32_t)val); | |
187 | } | |
188 | ||
10be5b5d PK |
189 | int fdt_root(void *fdt) |
190 | { | |
191 | char *serial; | |
192 | int err; | |
193 | ||
194 | err = fdt_check_header(fdt); | |
195 | if (err < 0) { | |
196 | printf("fdt_root: %s\n", fdt_strerror(err)); | |
197 | return err; | |
198 | } | |
199 | ||
200 | serial = getenv("serial#"); | |
201 | if (serial) { | |
202 | err = fdt_setprop(fdt, 0, "serial-number", serial, | |
203 | strlen(serial) + 1); | |
204 | ||
205 | if (err < 0) { | |
206 | printf("WARNING: could not set serial-number %s.\n", | |
207 | fdt_strerror(err)); | |
208 | return err; | |
209 | } | |
210 | } | |
211 | ||
212 | return 0; | |
213 | } | |
f18295d3 | 214 | |
dbe963ae | 215 | int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end) |
64dbbd40 | 216 | { |
f18295d3 | 217 | int nodeoffset; |
2a1a2cb6 | 218 | int err, j, total; |
f18295d3 | 219 | int is_u64; |
2a1a2cb6 | 220 | uint64_t addr, size; |
64dbbd40 | 221 | |
50babaf8 MY |
222 | /* just return if the size of initrd is zero */ |
223 | if (initrd_start == initrd_end) | |
224 | return 0; | |
225 | ||
8edb2192 MY |
226 | /* find or create "/chosen" node. */ |
227 | nodeoffset = fdt_find_or_add_subnode(fdt, 0, "chosen"); | |
228 | if (nodeoffset < 0) | |
2a1a2cb6 | 229 | return nodeoffset; |
64dbbd40 | 230 | |
2a1a2cb6 KG |
231 | total = fdt_num_mem_rsv(fdt); |
232 | ||
233 | /* | |
234 | * Look for an existing entry and update it. If we don't find | |
235 | * the entry, we will j be the next available slot. | |
236 | */ | |
237 | for (j = 0; j < total; j++) { | |
238 | err = fdt_get_mem_rsv(fdt, j, &addr, &size); | |
239 | if (addr == initrd_start) { | |
240 | fdt_del_mem_rsv(fdt, j); | |
241 | break; | |
c28abb9c | 242 | } |
2a1a2cb6 | 243 | } |
8d04f02f | 244 | |
ce6b27a8 | 245 | err = fdt_add_mem_rsv(fdt, initrd_start, initrd_end - initrd_start); |
2a1a2cb6 KG |
246 | if (err < 0) { |
247 | printf("fdt_initrd: %s\n", fdt_strerror(err)); | |
248 | return err; | |
249 | } | |
250 | ||
933cdbb4 | 251 | is_u64 = (fdt_address_cells(fdt, 0) == 2); |
f18295d3 MY |
252 | |
253 | err = fdt_setprop_uxx(fdt, nodeoffset, "linux,initrd-start", | |
254 | (uint64_t)initrd_start, is_u64); | |
f77a606a | 255 | |
dbe963ae MY |
256 | if (err < 0) { |
257 | printf("WARNING: could not set linux,initrd-start %s.\n", | |
258 | fdt_strerror(err)); | |
259 | return err; | |
260 | } | |
f18295d3 MY |
261 | |
262 | err = fdt_setprop_uxx(fdt, nodeoffset, "linux,initrd-end", | |
263 | (uint64_t)initrd_end, is_u64); | |
264 | ||
dbe963ae MY |
265 | if (err < 0) { |
266 | printf("WARNING: could not set linux,initrd-end %s.\n", | |
267 | fdt_strerror(err)); | |
2a1a2cb6 | 268 | |
dbe963ae | 269 | return err; |
64dbbd40 GVB |
270 | } |
271 | ||
2a1a2cb6 KG |
272 | return 0; |
273 | } | |
274 | ||
bc6ed0f9 | 275 | int fdt_chosen(void *fdt) |
2a1a2cb6 KG |
276 | { |
277 | int nodeoffset; | |
278 | int err; | |
279 | char *str; /* used to set string properties */ | |
2a1a2cb6 KG |
280 | |
281 | err = fdt_check_header(fdt); | |
282 | if (err < 0) { | |
283 | printf("fdt_chosen: %s\n", fdt_strerror(err)); | |
284 | return err; | |
285 | } | |
286 | ||
8edb2192 MY |
287 | /* find or create "/chosen" node. */ |
288 | nodeoffset = fdt_find_or_add_subnode(fdt, 0, "chosen"); | |
289 | if (nodeoffset < 0) | |
290 | return nodeoffset; | |
64dbbd40 | 291 | |
64dbbd40 | 292 | str = getenv("bootargs"); |
972f2a89 MY |
293 | if (str) { |
294 | err = fdt_setprop(fdt, nodeoffset, "bootargs", str, | |
295 | strlen(str) + 1); | |
296 | if (err < 0) { | |
bc6ed0f9 MY |
297 | printf("WARNING: could not set bootargs %s.\n", |
298 | fdt_strerror(err)); | |
972f2a89 MY |
299 | return err; |
300 | } | |
64dbbd40 | 301 | } |
2a1a2cb6 | 302 | |
972f2a89 | 303 | return fdt_fixup_stdout(fdt, nodeoffset); |
64dbbd40 GVB |
304 | } |
305 | ||
e93becf8 KG |
306 | void do_fixup_by_path(void *fdt, const char *path, const char *prop, |
307 | const void *val, int len, int create) | |
308 | { | |
309 | #if defined(DEBUG) | |
310 | int i; | |
d9ad115b | 311 | debug("Updating property '%s/%s' = ", path, prop); |
e93becf8 KG |
312 | for (i = 0; i < len; i++) |
313 | debug(" %.2x", *(u8*)(val+i)); | |
314 | debug("\n"); | |
315 | #endif | |
316 | int rc = fdt_find_and_setprop(fdt, path, prop, val, len, create); | |
317 | if (rc) | |
318 | printf("Unable to update property %s:%s, err=%s\n", | |
319 | path, prop, fdt_strerror(rc)); | |
320 | } | |
321 | ||
322 | void do_fixup_by_path_u32(void *fdt, const char *path, const char *prop, | |
323 | u32 val, int create) | |
324 | { | |
8aa5ec6e KP |
325 | fdt32_t tmp = cpu_to_fdt32(val); |
326 | do_fixup_by_path(fdt, path, prop, &tmp, sizeof(tmp), create); | |
e93becf8 KG |
327 | } |
328 | ||
9eb77cea KG |
329 | void do_fixup_by_prop(void *fdt, |
330 | const char *pname, const void *pval, int plen, | |
331 | const char *prop, const void *val, int len, | |
332 | int create) | |
333 | { | |
334 | int off; | |
335 | #if defined(DEBUG) | |
336 | int i; | |
d9ad115b | 337 | debug("Updating property '%s' = ", prop); |
9eb77cea KG |
338 | for (i = 0; i < len; i++) |
339 | debug(" %.2x", *(u8*)(val+i)); | |
340 | debug("\n"); | |
341 | #endif | |
342 | off = fdt_node_offset_by_prop_value(fdt, -1, pname, pval, plen); | |
343 | while (off != -FDT_ERR_NOTFOUND) { | |
8aa5ec6e | 344 | if (create || (fdt_get_property(fdt, off, prop, NULL) != NULL)) |
9eb77cea KG |
345 | fdt_setprop(fdt, off, prop, val, len); |
346 | off = fdt_node_offset_by_prop_value(fdt, off, pname, pval, plen); | |
347 | } | |
348 | } | |
349 | ||
350 | void do_fixup_by_prop_u32(void *fdt, | |
351 | const char *pname, const void *pval, int plen, | |
352 | const char *prop, u32 val, int create) | |
353 | { | |
8aa5ec6e KP |
354 | fdt32_t tmp = cpu_to_fdt32(val); |
355 | do_fixup_by_prop(fdt, pname, pval, plen, prop, &tmp, 4, create); | |
9eb77cea KG |
356 | } |
357 | ||
358 | void do_fixup_by_compat(void *fdt, const char *compat, | |
359 | const char *prop, const void *val, int len, int create) | |
360 | { | |
361 | int off = -1; | |
362 | #if defined(DEBUG) | |
363 | int i; | |
d9ad115b | 364 | debug("Updating property '%s' = ", prop); |
9eb77cea KG |
365 | for (i = 0; i < len; i++) |
366 | debug(" %.2x", *(u8*)(val+i)); | |
367 | debug("\n"); | |
368 | #endif | |
369 | off = fdt_node_offset_by_compatible(fdt, -1, compat); | |
370 | while (off != -FDT_ERR_NOTFOUND) { | |
8aa5ec6e | 371 | if (create || (fdt_get_property(fdt, off, prop, NULL) != NULL)) |
9eb77cea KG |
372 | fdt_setprop(fdt, off, prop, val, len); |
373 | off = fdt_node_offset_by_compatible(fdt, off, compat); | |
374 | } | |
375 | } | |
376 | ||
377 | void do_fixup_by_compat_u32(void *fdt, const char *compat, | |
378 | const char *prop, u32 val, int create) | |
379 | { | |
8aa5ec6e KP |
380 | fdt32_t tmp = cpu_to_fdt32(val); |
381 | do_fixup_by_compat(fdt, compat, prop, &tmp, 4, create); | |
9eb77cea KG |
382 | } |
383 | ||
739a01ed MY |
384 | /* |
385 | * fdt_pack_reg - pack address and size array into the "reg"-suitable stream | |
386 | */ | |
41f09bbe SG |
387 | static int fdt_pack_reg(const void *fdt, void *buf, u64 *address, u64 *size, |
388 | int n) | |
739a01ed MY |
389 | { |
390 | int i; | |
ffccb84c HG |
391 | int address_cells = fdt_address_cells(fdt, 0); |
392 | int size_cells = fdt_size_cells(fdt, 0); | |
739a01ed MY |
393 | char *p = buf; |
394 | ||
395 | for (i = 0; i < n; i++) { | |
ffccb84c | 396 | if (address_cells == 2) |
739a01ed MY |
397 | *(fdt64_t *)p = cpu_to_fdt64(address[i]); |
398 | else | |
399 | *(fdt32_t *)p = cpu_to_fdt32(address[i]); | |
ffccb84c | 400 | p += 4 * address_cells; |
739a01ed | 401 | |
ffccb84c | 402 | if (size_cells == 2) |
739a01ed MY |
403 | *(fdt64_t *)p = cpu_to_fdt64(size[i]); |
404 | else | |
405 | *(fdt32_t *)p = cpu_to_fdt32(size[i]); | |
ffccb84c | 406 | p += 4 * size_cells; |
739a01ed MY |
407 | } |
408 | ||
409 | return p - (char *)buf; | |
410 | } | |
411 | ||
5e574546 DA |
412 | #ifdef CONFIG_NR_DRAM_BANKS |
413 | #define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS | |
414 | #else | |
8aa5ec6e | 415 | #define MEMORY_BANKS_MAX 4 |
5e574546 | 416 | #endif |
a6bd9e83 JR |
417 | int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks) |
418 | { | |
419 | int err, nodeoffset; | |
739a01ed | 420 | int len; |
8aa5ec6e | 421 | u8 tmp[MEMORY_BANKS_MAX * 16]; /* Up to 64-bit address + 64-bit size */ |
3c927281 | 422 | |
8aa5ec6e KP |
423 | if (banks > MEMORY_BANKS_MAX) { |
424 | printf("%s: num banks %d exceeds hardcoded limit %d." | |
425 | " Recompile with higher MEMORY_BANKS_MAX?\n", | |
426 | __FUNCTION__, banks, MEMORY_BANKS_MAX); | |
427 | return -1; | |
428 | } | |
429 | ||
3c927281 KG |
430 | err = fdt_check_header(blob); |
431 | if (err < 0) { | |
432 | printf("%s: %s\n", __FUNCTION__, fdt_strerror(err)); | |
433 | return err; | |
434 | } | |
435 | ||
8edb2192 MY |
436 | /* find or create "/memory" node. */ |
437 | nodeoffset = fdt_find_or_add_subnode(blob, 0, "memory"); | |
438 | if (nodeoffset < 0) | |
35940de1 | 439 | return nodeoffset; |
8edb2192 | 440 | |
3c927281 KG |
441 | err = fdt_setprop(blob, nodeoffset, "device_type", "memory", |
442 | sizeof("memory")); | |
443 | if (err < 0) { | |
444 | printf("WARNING: could not set %s %s.\n", "device_type", | |
445 | fdt_strerror(err)); | |
446 | return err; | |
447 | } | |
448 | ||
5c1cf89f AP |
449 | if (!banks) |
450 | return 0; | |
451 | ||
739a01ed | 452 | len = fdt_pack_reg(blob, tmp, start, size, banks); |
3c927281 KG |
453 | |
454 | err = fdt_setprop(blob, nodeoffset, "reg", tmp, len); | |
455 | if (err < 0) { | |
456 | printf("WARNING: could not set %s %s.\n", | |
457 | "reg", fdt_strerror(err)); | |
458 | return err; | |
459 | } | |
460 | return 0; | |
461 | } | |
462 | ||
a6bd9e83 JR |
463 | int fdt_fixup_memory(void *blob, u64 start, u64 size) |
464 | { | |
465 | return fdt_fixup_memory_banks(blob, &start, &size, 1); | |
466 | } | |
467 | ||
ba37aa03 | 468 | void fdt_fixup_ethernet(void *fdt) |
ab544633 | 469 | { |
ba37aa03 | 470 | int node, i, j; |
bc393a79 | 471 | char *tmp, *end; |
064d55f8 | 472 | char mac[16]; |
ab544633 | 473 | const char *path; |
ba37aa03 | 474 | unsigned char mac_addr[6]; |
bc393a79 | 475 | int offset; |
ab544633 KG |
476 | |
477 | node = fdt_path_offset(fdt, "/aliases"); | |
ba37aa03 KG |
478 | if (node < 0) |
479 | return; | |
480 | ||
bc393a79 BM |
481 | for (offset = fdt_first_property_offset(fdt, node); |
482 | offset > 0; | |
483 | offset = fdt_next_property_offset(fdt, offset)) { | |
484 | const char *name; | |
485 | int len = strlen("ethernet"); | |
486 | ||
487 | path = fdt_getprop_by_offset(fdt, offset, &name, NULL); | |
488 | if (!strncmp(name, "ethernet", len)) { | |
489 | i = trailing_strtol(name); | |
490 | if (i != -1) { | |
491 | if (i == 0) | |
492 | strcpy(mac, "ethaddr"); | |
493 | else | |
494 | sprintf(mac, "eth%daddr", i); | |
495 | } else { | |
496 | continue; | |
497 | } | |
498 | tmp = getenv(mac); | |
499 | if (!tmp) | |
500 | continue; | |
501 | ||
502 | for (j = 0; j < 6; j++) { | |
503 | mac_addr[j] = tmp ? | |
504 | simple_strtoul(tmp, &end, 16) : 0; | |
505 | if (tmp) | |
506 | tmp = (*end) ? end + 1 : end; | |
507 | } | |
508 | ||
509 | do_fixup_by_path(fdt, path, "mac-address", | |
510 | &mac_addr, 6, 0); | |
511 | do_fixup_by_path(fdt, path, "local-mac-address", | |
512 | &mac_addr, 6, 1); | |
ab544633 | 513 | } |
ab544633 KG |
514 | } |
515 | } | |
18e69a35 | 516 | |
3082d234 | 517 | /* Resize the fdt to its actual size + a bit of padding */ |
5bf58ccc | 518 | int fdt_shrink_to_minimum(void *blob) |
3082d234 KG |
519 | { |
520 | int i; | |
521 | uint64_t addr, size; | |
522 | int total, ret; | |
523 | uint actualsize; | |
524 | ||
525 | if (!blob) | |
526 | return 0; | |
527 | ||
528 | total = fdt_num_mem_rsv(blob); | |
529 | for (i = 0; i < total; i++) { | |
530 | fdt_get_mem_rsv(blob, i, &addr, &size); | |
92549358 | 531 | if (addr == (uintptr_t)blob) { |
3082d234 KG |
532 | fdt_del_mem_rsv(blob, i); |
533 | break; | |
534 | } | |
535 | } | |
536 | ||
f242a088 PK |
537 | /* |
538 | * Calculate the actual size of the fdt | |
3840ebfa FW |
539 | * plus the size needed for 5 fdt_add_mem_rsv, one |
540 | * for the fdt itself and 4 for a possible initrd | |
541 | * ((initrd-start + initrd-end) * 2 (name & value)) | |
f242a088 | 542 | */ |
3082d234 | 543 | actualsize = fdt_off_dt_strings(blob) + |
3840ebfa | 544 | fdt_size_dt_strings(blob) + 5 * sizeof(struct fdt_reserve_entry); |
3082d234 KG |
545 | |
546 | /* Make it so the fdt ends on a page boundary */ | |
92549358 SG |
547 | actualsize = ALIGN(actualsize + ((uintptr_t)blob & 0xfff), 0x1000); |
548 | actualsize = actualsize - ((uintptr_t)blob & 0xfff); | |
3082d234 KG |
549 | |
550 | /* Change the fdt header to reflect the correct size */ | |
551 | fdt_set_totalsize(blob, actualsize); | |
552 | ||
553 | /* Add the new reservation */ | |
92549358 | 554 | ret = fdt_add_mem_rsv(blob, (uintptr_t)blob, actualsize); |
3082d234 KG |
555 | if (ret < 0) |
556 | return ret; | |
557 | ||
558 | return actualsize; | |
559 | } | |
8ab451c4 KG |
560 | |
561 | #ifdef CONFIG_PCI | |
cfd700be | 562 | #define CONFIG_SYS_PCI_NR_INBOUND_WIN 4 |
8ab451c4 KG |
563 | |
564 | #define FDT_PCI_PREFETCH (0x40000000) | |
565 | #define FDT_PCI_MEM32 (0x02000000) | |
566 | #define FDT_PCI_IO (0x01000000) | |
567 | #define FDT_PCI_MEM64 (0x03000000) | |
568 | ||
569 | int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) { | |
570 | ||
571 | int addrcell, sizecell, len, r; | |
572 | u32 *dma_range; | |
573 | /* sized based on pci addr cells, size-cells, & address-cells */ | |
574 | u32 dma_ranges[(3 + 2 + 2) * CONFIG_SYS_PCI_NR_INBOUND_WIN]; | |
575 | ||
576 | addrcell = fdt_getprop_u32_default(blob, "/", "#address-cells", 1); | |
577 | sizecell = fdt_getprop_u32_default(blob, "/", "#size-cells", 1); | |
578 | ||
579 | dma_range = &dma_ranges[0]; | |
580 | for (r = 0; r < hose->region_count; r++) { | |
581 | u64 bus_start, phys_start, size; | |
582 | ||
ff4e66e9 KG |
583 | /* skip if !PCI_REGION_SYS_MEMORY */ |
584 | if (!(hose->regions[r].flags & PCI_REGION_SYS_MEMORY)) | |
8ab451c4 KG |
585 | continue; |
586 | ||
587 | bus_start = (u64)hose->regions[r].bus_start; | |
588 | phys_start = (u64)hose->regions[r].phys_start; | |
589 | size = (u64)hose->regions[r].size; | |
590 | ||
591 | dma_range[0] = 0; | |
cfd700be | 592 | if (size >= 0x100000000ull) |
8ab451c4 KG |
593 | dma_range[0] |= FDT_PCI_MEM64; |
594 | else | |
595 | dma_range[0] |= FDT_PCI_MEM32; | |
596 | if (hose->regions[r].flags & PCI_REGION_PREFETCH) | |
597 | dma_range[0] |= FDT_PCI_PREFETCH; | |
598 | #ifdef CONFIG_SYS_PCI_64BIT | |
599 | dma_range[1] = bus_start >> 32; | |
600 | #else | |
601 | dma_range[1] = 0; | |
602 | #endif | |
603 | dma_range[2] = bus_start & 0xffffffff; | |
604 | ||
605 | if (addrcell == 2) { | |
606 | dma_range[3] = phys_start >> 32; | |
607 | dma_range[4] = phys_start & 0xffffffff; | |
608 | } else { | |
609 | dma_range[3] = phys_start & 0xffffffff; | |
610 | } | |
611 | ||
612 | if (sizecell == 2) { | |
613 | dma_range[3 + addrcell + 0] = size >> 32; | |
614 | dma_range[3 + addrcell + 1] = size & 0xffffffff; | |
615 | } else { | |
616 | dma_range[3 + addrcell + 0] = size & 0xffffffff; | |
617 | } | |
618 | ||
619 | dma_range += (3 + addrcell + sizecell); | |
620 | } | |
621 | ||
622 | len = dma_range - &dma_ranges[0]; | |
623 | if (len) | |
624 | fdt_setprop(blob, phb_off, "dma-ranges", &dma_ranges[0], len*4); | |
625 | ||
626 | return 0; | |
627 | } | |
628 | #endif | |
30d45c0d SR |
629 | |
630 | #ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE | |
8a805df1 SR |
631 | /* |
632 | * Provide a weak default function to return the flash bank size. | |
633 | * There might be multiple non-identical flash chips connected to one | |
634 | * chip-select, so we need to pass an index as well. | |
635 | */ | |
636 | u32 __flash_get_bank_size(int cs, int idx) | |
637 | { | |
638 | extern flash_info_t flash_info[]; | |
639 | ||
640 | /* | |
641 | * As default, a simple 1:1 mapping is provided. Boards with | |
642 | * a different mapping need to supply a board specific mapping | |
643 | * routine. | |
644 | */ | |
645 | return flash_info[cs].size; | |
646 | } | |
647 | u32 flash_get_bank_size(int cs, int idx) | |
648 | __attribute__((weak, alias("__flash_get_bank_size"))); | |
649 | ||
30d45c0d SR |
650 | /* |
651 | * This function can be used to update the size in the "reg" property | |
8a805df1 | 652 | * of all NOR FLASH device nodes. This is necessary for boards with |
30d45c0d SR |
653 | * non-fixed NOR FLASH sizes. |
654 | */ | |
8a805df1 | 655 | int fdt_fixup_nor_flash_size(void *blob) |
30d45c0d SR |
656 | { |
657 | char compat[][16] = { "cfi-flash", "jedec-flash" }; | |
658 | int off; | |
659 | int len; | |
660 | struct fdt_property *prop; | |
2778a014 | 661 | u32 *reg, *reg2; |
30d45c0d SR |
662 | int i; |
663 | ||
664 | for (i = 0; i < 2; i++) { | |
665 | off = fdt_node_offset_by_compatible(blob, -1, compat[i]); | |
666 | while (off != -FDT_ERR_NOTFOUND) { | |
8a805df1 SR |
667 | int idx; |
668 | ||
30d45c0d | 669 | /* |
8a805df1 SR |
670 | * Found one compatible node, so fixup the size |
671 | * int its reg properties | |
30d45c0d SR |
672 | */ |
673 | prop = fdt_get_property_w(blob, off, "reg", &len); | |
674 | if (prop) { | |
8a805df1 SR |
675 | int tuple_size = 3 * sizeof(reg); |
676 | ||
677 | /* | |
678 | * There might be multiple reg-tuples, | |
679 | * so loop through them all | |
680 | */ | |
2778a014 SR |
681 | reg = reg2 = (u32 *)&prop->data[0]; |
682 | for (idx = 0; idx < (len / tuple_size); idx++) { | |
8a805df1 SR |
683 | /* |
684 | * Update size in reg property | |
685 | */ | |
686 | reg[2] = flash_get_bank_size(reg[0], | |
687 | idx); | |
2778a014 SR |
688 | |
689 | /* | |
690 | * Point to next reg tuple | |
691 | */ | |
692 | reg += 3; | |
30d45c0d | 693 | } |
2778a014 SR |
694 | |
695 | fdt_setprop(blob, off, "reg", reg2, len); | |
30d45c0d SR |
696 | } |
697 | ||
698 | /* Move to next compatible node */ | |
699 | off = fdt_node_offset_by_compatible(blob, off, | |
700 | compat[i]); | |
701 | } | |
702 | } | |
703 | ||
8a805df1 | 704 | return 0; |
30d45c0d SR |
705 | } |
706 | #endif | |
3c950e2e | 707 | |
cb2707af MM |
708 | int fdt_increase_size(void *fdt, int add_len) |
709 | { | |
710 | int newlen; | |
711 | ||
712 | newlen = fdt_totalsize(fdt) + add_len; | |
713 | ||
714 | /* Open in place with a new len */ | |
715 | return fdt_open_into(fdt, fdt, newlen); | |
716 | } | |
717 | ||
3c950e2e AG |
718 | #ifdef CONFIG_FDT_FIXUP_PARTITIONS |
719 | #include <jffs2/load_kernel.h> | |
720 | #include <mtd_node.h> | |
721 | ||
722 | struct reg_cell { | |
723 | unsigned int r0; | |
724 | unsigned int r1; | |
725 | }; | |
726 | ||
727 | int fdt_del_subnodes(const void *blob, int parent_offset) | |
728 | { | |
729 | int off, ndepth; | |
730 | int ret; | |
731 | ||
732 | for (ndepth = 0, off = fdt_next_node(blob, parent_offset, &ndepth); | |
733 | (off >= 0) && (ndepth > 0); | |
734 | off = fdt_next_node(blob, off, &ndepth)) { | |
735 | if (ndepth == 1) { | |
736 | debug("delete %s: offset: %x\n", | |
737 | fdt_get_name(blob, off, 0), off); | |
738 | ret = fdt_del_node((void *)blob, off); | |
739 | if (ret < 0) { | |
740 | printf("Can't delete node: %s\n", | |
741 | fdt_strerror(ret)); | |
742 | return ret; | |
743 | } else { | |
744 | ndepth = 0; | |
745 | off = parent_offset; | |
746 | } | |
747 | } | |
748 | } | |
749 | return 0; | |
750 | } | |
751 | ||
3c950e2e AG |
752 | int fdt_del_partitions(void *blob, int parent_offset) |
753 | { | |
754 | const void *prop; | |
755 | int ndepth = 0; | |
756 | int off; | |
757 | int ret; | |
758 | ||
759 | off = fdt_next_node(blob, parent_offset, &ndepth); | |
760 | if (off > 0 && ndepth == 1) { | |
761 | prop = fdt_getprop(blob, off, "label", NULL); | |
762 | if (prop == NULL) { | |
763 | /* | |
764 | * Could not find label property, nand {}; node? | |
765 | * Check subnode, delete partitions there if any. | |
766 | */ | |
767 | return fdt_del_partitions(blob, off); | |
768 | } else { | |
769 | ret = fdt_del_subnodes(blob, parent_offset); | |
770 | if (ret < 0) { | |
771 | printf("Can't remove subnodes: %s\n", | |
772 | fdt_strerror(ret)); | |
773 | return ret; | |
774 | } | |
775 | } | |
776 | } | |
777 | return 0; | |
778 | } | |
779 | ||
780 | int fdt_node_set_part_info(void *blob, int parent_offset, | |
781 | struct mtd_device *dev) | |
782 | { | |
783 | struct list_head *pentry; | |
784 | struct part_info *part; | |
785 | struct reg_cell cell; | |
786 | int off, ndepth = 0; | |
787 | int part_num, ret; | |
788 | char buf[64]; | |
789 | ||
790 | ret = fdt_del_partitions(blob, parent_offset); | |
791 | if (ret < 0) | |
792 | return ret; | |
793 | ||
794 | /* | |
795 | * Check if it is nand {}; subnode, adjust | |
796 | * the offset in this case | |
797 | */ | |
798 | off = fdt_next_node(blob, parent_offset, &ndepth); | |
799 | if (off > 0 && ndepth == 1) | |
800 | parent_offset = off; | |
801 | ||
802 | part_num = 0; | |
803 | list_for_each_prev(pentry, &dev->parts) { | |
804 | int newoff; | |
805 | ||
806 | part = list_entry(pentry, struct part_info, link); | |
807 | ||
06503f16 | 808 | debug("%2d: %-20s0x%08llx\t0x%08llx\t%d\n", |
3c950e2e AG |
809 | part_num, part->name, part->size, |
810 | part->offset, part->mask_flags); | |
811 | ||
06503f16 | 812 | sprintf(buf, "partition@%llx", part->offset); |
3c950e2e AG |
813 | add_sub: |
814 | ret = fdt_add_subnode(blob, parent_offset, buf); | |
815 | if (ret == -FDT_ERR_NOSPACE) { | |
816 | ret = fdt_increase_size(blob, 512); | |
817 | if (!ret) | |
818 | goto add_sub; | |
819 | else | |
820 | goto err_size; | |
821 | } else if (ret < 0) { | |
822 | printf("Can't add partition node: %s\n", | |
823 | fdt_strerror(ret)); | |
824 | return ret; | |
825 | } | |
826 | newoff = ret; | |
827 | ||
828 | /* Check MTD_WRITEABLE_CMD flag */ | |
829 | if (part->mask_flags & 1) { | |
830 | add_ro: | |
831 | ret = fdt_setprop(blob, newoff, "read_only", NULL, 0); | |
832 | if (ret == -FDT_ERR_NOSPACE) { | |
833 | ret = fdt_increase_size(blob, 512); | |
834 | if (!ret) | |
835 | goto add_ro; | |
836 | else | |
837 | goto err_size; | |
838 | } else if (ret < 0) | |
839 | goto err_prop; | |
840 | } | |
841 | ||
842 | cell.r0 = cpu_to_fdt32(part->offset); | |
843 | cell.r1 = cpu_to_fdt32(part->size); | |
844 | add_reg: | |
845 | ret = fdt_setprop(blob, newoff, "reg", &cell, sizeof(cell)); | |
846 | if (ret == -FDT_ERR_NOSPACE) { | |
847 | ret = fdt_increase_size(blob, 512); | |
848 | if (!ret) | |
849 | goto add_reg; | |
850 | else | |
851 | goto err_size; | |
852 | } else if (ret < 0) | |
853 | goto err_prop; | |
854 | ||
855 | add_label: | |
856 | ret = fdt_setprop_string(blob, newoff, "label", part->name); | |
857 | if (ret == -FDT_ERR_NOSPACE) { | |
858 | ret = fdt_increase_size(blob, 512); | |
859 | if (!ret) | |
860 | goto add_label; | |
861 | else | |
862 | goto err_size; | |
863 | } else if (ret < 0) | |
864 | goto err_prop; | |
865 | ||
866 | part_num++; | |
867 | } | |
868 | return 0; | |
869 | err_size: | |
870 | printf("Can't increase blob size: %s\n", fdt_strerror(ret)); | |
871 | return ret; | |
872 | err_prop: | |
873 | printf("Can't add property: %s\n", fdt_strerror(ret)); | |
874 | return ret; | |
875 | } | |
876 | ||
877 | /* | |
878 | * Update partitions in nor/nand nodes using info from | |
879 | * mtdparts environment variable. The nodes to update are | |
880 | * specified by node_info structure which contains mtd device | |
881 | * type and compatible string: E. g. the board code in | |
882 | * ft_board_setup() could use: | |
883 | * | |
884 | * struct node_info nodes[] = { | |
885 | * { "fsl,mpc5121-nfc", MTD_DEV_TYPE_NAND, }, | |
886 | * { "cfi-flash", MTD_DEV_TYPE_NOR, }, | |
887 | * }; | |
888 | * | |
889 | * fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes)); | |
890 | */ | |
891 | void fdt_fixup_mtdparts(void *blob, void *node_info, int node_info_size) | |
892 | { | |
893 | struct node_info *ni = node_info; | |
894 | struct mtd_device *dev; | |
895 | char *parts; | |
896 | int i, idx; | |
897 | int noff; | |
898 | ||
899 | parts = getenv("mtdparts"); | |
900 | if (!parts) | |
901 | return; | |
902 | ||
903 | if (mtdparts_init() != 0) | |
904 | return; | |
905 | ||
906 | for (i = 0; i < node_info_size; i++) { | |
907 | idx = 0; | |
908 | noff = fdt_node_offset_by_compatible(blob, -1, ni[i].compat); | |
909 | while (noff != -FDT_ERR_NOTFOUND) { | |
910 | debug("%s: %s, mtd dev type %d\n", | |
911 | fdt_get_name(blob, noff, 0), | |
912 | ni[i].compat, ni[i].type); | |
913 | dev = device_find(ni[i].type, idx++); | |
914 | if (dev) { | |
915 | if (fdt_node_set_part_info(blob, noff, dev)) | |
916 | return; /* return on error */ | |
917 | } | |
918 | ||
919 | /* Jump to next flash node */ | |
920 | noff = fdt_node_offset_by_compatible(blob, noff, | |
921 | ni[i].compat); | |
922 | } | |
923 | } | |
924 | } | |
925 | #endif | |
49b97d9c KG |
926 | |
927 | void fdt_del_node_and_alias(void *blob, const char *alias) | |
928 | { | |
929 | int off = fdt_path_offset(blob, alias); | |
930 | ||
931 | if (off < 0) | |
932 | return; | |
933 | ||
934 | fdt_del_node(blob, off); | |
935 | ||
936 | off = fdt_path_offset(blob, "/aliases"); | |
937 | fdt_delprop(blob, off, alias); | |
938 | } | |
a0342c08 | 939 | |
a0342c08 KG |
940 | /* Max address size we deal with */ |
941 | #define OF_MAX_ADDR_CELLS 4 | |
a0ae380b | 942 | #define OF_BAD_ADDR FDT_ADDR_T_NONE |
4428f3c8 PM |
943 | #define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \ |
944 | (ns) > 0) | |
a0342c08 KG |
945 | |
946 | /* Debug utility */ | |
947 | #ifdef DEBUG | |
8aa5ec6e | 948 | static void of_dump_addr(const char *s, const fdt32_t *addr, int na) |
a0342c08 KG |
949 | { |
950 | printf("%s", s); | |
951 | while(na--) | |
952 | printf(" %08x", *(addr++)); | |
953 | printf("\n"); | |
954 | } | |
955 | #else | |
8aa5ec6e | 956 | static void of_dump_addr(const char *s, const fdt32_t *addr, int na) { } |
a0342c08 KG |
957 | #endif |
958 | ||
959 | /* Callbacks for bus specific translators */ | |
960 | struct of_bus { | |
961 | const char *name; | |
962 | const char *addresses; | |
6395f318 | 963 | void (*count_cells)(void *blob, int parentoffset, |
a0342c08 | 964 | int *addrc, int *sizec); |
8aa5ec6e | 965 | u64 (*map)(fdt32_t *addr, const fdt32_t *range, |
a0342c08 | 966 | int na, int ns, int pna); |
8aa5ec6e | 967 | int (*translate)(fdt32_t *addr, u64 offset, int na); |
a0342c08 KG |
968 | }; |
969 | ||
970 | /* Default translator (generic bus) */ | |
f43b4356 | 971 | void of_bus_default_count_cells(void *blob, int parentoffset, |
a0342c08 KG |
972 | int *addrc, int *sizec) |
973 | { | |
8aa5ec6e | 974 | const fdt32_t *prop; |
6395f318 | 975 | |
933cdbb4 SG |
976 | if (addrc) |
977 | *addrc = fdt_address_cells(blob, parentoffset); | |
6395f318 SW |
978 | |
979 | if (sizec) { | |
980 | prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL); | |
981 | if (prop) | |
8aa5ec6e | 982 | *sizec = be32_to_cpup(prop); |
6395f318 SW |
983 | else |
984 | *sizec = 1; | |
985 | } | |
a0342c08 KG |
986 | } |
987 | ||
8aa5ec6e | 988 | static u64 of_bus_default_map(fdt32_t *addr, const fdt32_t *range, |
a0342c08 KG |
989 | int na, int ns, int pna) |
990 | { | |
991 | u64 cp, s, da; | |
992 | ||
993 | cp = of_read_number(range, na); | |
994 | s = of_read_number(range + na + pna, ns); | |
995 | da = of_read_number(addr, na); | |
996 | ||
e48f3741 SG |
997 | debug("OF: default map, cp=%" PRIu64 ", s=%" PRIu64 |
998 | ", da=%" PRIu64 "\n", cp, s, da); | |
a0342c08 KG |
999 | |
1000 | if (da < cp || da >= (cp + s)) | |
1001 | return OF_BAD_ADDR; | |
1002 | return da - cp; | |
1003 | } | |
1004 | ||
8aa5ec6e | 1005 | static int of_bus_default_translate(fdt32_t *addr, u64 offset, int na) |
a0342c08 KG |
1006 | { |
1007 | u64 a = of_read_number(addr, na); | |
1008 | memset(addr, 0, na * 4); | |
1009 | a += offset; | |
1010 | if (na > 1) | |
8aa5ec6e KP |
1011 | addr[na - 2] = cpu_to_fdt32(a >> 32); |
1012 | addr[na - 1] = cpu_to_fdt32(a & 0xffffffffu); | |
a0342c08 KG |
1013 | |
1014 | return 0; | |
1015 | } | |
1016 | ||
1017 | /* Array of bus specific translators */ | |
1018 | static struct of_bus of_busses[] = { | |
1019 | /* Default */ | |
1020 | { | |
1021 | .name = "default", | |
1022 | .addresses = "reg", | |
1023 | .count_cells = of_bus_default_count_cells, | |
1024 | .map = of_bus_default_map, | |
1025 | .translate = of_bus_default_translate, | |
1026 | }, | |
1027 | }; | |
1028 | ||
1029 | static int of_translate_one(void * blob, int parent, struct of_bus *bus, | |
8aa5ec6e | 1030 | struct of_bus *pbus, fdt32_t *addr, |
a0342c08 KG |
1031 | int na, int ns, int pna, const char *rprop) |
1032 | { | |
8aa5ec6e | 1033 | const fdt32_t *ranges; |
a0342c08 KG |
1034 | int rlen; |
1035 | int rone; | |
1036 | u64 offset = OF_BAD_ADDR; | |
1037 | ||
1038 | /* Normally, an absence of a "ranges" property means we are | |
1039 | * crossing a non-translatable boundary, and thus the addresses | |
1040 | * below the current not cannot be converted to CPU physical ones. | |
1041 | * Unfortunately, while this is very clear in the spec, it's not | |
1042 | * what Apple understood, and they do have things like /uni-n or | |
1043 | * /ht nodes with no "ranges" property and a lot of perfectly | |
1044 | * useable mapped devices below them. Thus we treat the absence of | |
1045 | * "ranges" as equivalent to an empty "ranges" property which means | |
1046 | * a 1:1 translation at that level. It's up to the caller not to try | |
1047 | * to translate addresses that aren't supposed to be translated in | |
1048 | * the first place. --BenH. | |
1049 | */ | |
8aa5ec6e | 1050 | ranges = fdt_getprop(blob, parent, rprop, &rlen); |
a0342c08 KG |
1051 | if (ranges == NULL || rlen == 0) { |
1052 | offset = of_read_number(addr, na); | |
1053 | memset(addr, 0, pna * 4); | |
1054 | debug("OF: no ranges, 1:1 translation\n"); | |
1055 | goto finish; | |
1056 | } | |
1057 | ||
1058 | debug("OF: walking ranges...\n"); | |
1059 | ||
1060 | /* Now walk through the ranges */ | |
1061 | rlen /= 4; | |
1062 | rone = na + pna + ns; | |
1063 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
1064 | offset = bus->map(addr, ranges, na, ns, pna); | |
1065 | if (offset != OF_BAD_ADDR) | |
1066 | break; | |
1067 | } | |
1068 | if (offset == OF_BAD_ADDR) { | |
1069 | debug("OF: not found !\n"); | |
1070 | return 1; | |
1071 | } | |
1072 | memcpy(addr, ranges + na, 4 * pna); | |
1073 | ||
1074 | finish: | |
1075 | of_dump_addr("OF: parent translation for:", addr, pna); | |
e48f3741 | 1076 | debug("OF: with offset: %" PRIu64 "\n", offset); |
a0342c08 KG |
1077 | |
1078 | /* Translate it into parent bus space */ | |
1079 | return pbus->translate(addr, offset, pna); | |
1080 | } | |
1081 | ||
1082 | /* | |
1083 | * Translate an address from the device-tree into a CPU physical address, | |
1084 | * this walks up the tree and applies the various bus mappings on the | |
1085 | * way. | |
1086 | * | |
1087 | * Note: We consider that crossing any level with #size-cells == 0 to mean | |
1088 | * that translation is impossible (that is we are not dealing with a value | |
1089 | * that can be mapped to a cpu physical address). This is not really specified | |
1090 | * that way, but this is traditionally the way IBM at least do things | |
1091 | */ | |
8aa5ec6e KP |
1092 | static u64 __of_translate_address(void *blob, int node_offset, const fdt32_t *in_addr, |
1093 | const char *rprop) | |
a0342c08 KG |
1094 | { |
1095 | int parent; | |
1096 | struct of_bus *bus, *pbus; | |
8aa5ec6e | 1097 | fdt32_t addr[OF_MAX_ADDR_CELLS]; |
a0342c08 KG |
1098 | int na, ns, pna, pns; |
1099 | u64 result = OF_BAD_ADDR; | |
1100 | ||
1101 | debug("OF: ** translation for device %s **\n", | |
1102 | fdt_get_name(blob, node_offset, NULL)); | |
1103 | ||
1104 | /* Get parent & match bus type */ | |
1105 | parent = fdt_parent_offset(blob, node_offset); | |
1106 | if (parent < 0) | |
1107 | goto bail; | |
1108 | bus = &of_busses[0]; | |
1109 | ||
1110 | /* Cound address cells & copy address locally */ | |
6395f318 | 1111 | bus->count_cells(blob, parent, &na, &ns); |
4428f3c8 | 1112 | if (!OF_CHECK_COUNTS(na, ns)) { |
a0342c08 KG |
1113 | printf("%s: Bad cell count for %s\n", __FUNCTION__, |
1114 | fdt_get_name(blob, node_offset, NULL)); | |
1115 | goto bail; | |
1116 | } | |
1117 | memcpy(addr, in_addr, na * 4); | |
1118 | ||
1119 | debug("OF: bus is %s (na=%d, ns=%d) on %s\n", | |
1120 | bus->name, na, ns, fdt_get_name(blob, parent, NULL)); | |
1121 | of_dump_addr("OF: translating address:", addr, na); | |
1122 | ||
1123 | /* Translate */ | |
1124 | for (;;) { | |
1125 | /* Switch to parent bus */ | |
1126 | node_offset = parent; | |
1127 | parent = fdt_parent_offset(blob, node_offset); | |
1128 | ||
1129 | /* If root, we have finished */ | |
1130 | if (parent < 0) { | |
1131 | debug("OF: reached root node\n"); | |
1132 | result = of_read_number(addr, na); | |
1133 | break; | |
1134 | } | |
1135 | ||
1136 | /* Get new parent bus and counts */ | |
1137 | pbus = &of_busses[0]; | |
6395f318 | 1138 | pbus->count_cells(blob, parent, &pna, &pns); |
4428f3c8 | 1139 | if (!OF_CHECK_COUNTS(pna, pns)) { |
a0342c08 KG |
1140 | printf("%s: Bad cell count for %s\n", __FUNCTION__, |
1141 | fdt_get_name(blob, node_offset, NULL)); | |
1142 | break; | |
1143 | } | |
1144 | ||
1145 | debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n", | |
1146 | pbus->name, pna, pns, fdt_get_name(blob, parent, NULL)); | |
1147 | ||
1148 | /* Apply bus translation */ | |
1149 | if (of_translate_one(blob, node_offset, bus, pbus, | |
1150 | addr, na, ns, pna, rprop)) | |
1151 | break; | |
1152 | ||
1153 | /* Complete the move up one level */ | |
1154 | na = pna; | |
1155 | ns = pns; | |
1156 | bus = pbus; | |
1157 | ||
1158 | of_dump_addr("OF: one level translation:", addr, na); | |
1159 | } | |
1160 | bail: | |
1161 | ||
1162 | return result; | |
1163 | } | |
1164 | ||
8aa5ec6e | 1165 | u64 fdt_translate_address(void *blob, int node_offset, const fdt32_t *in_addr) |
a0342c08 KG |
1166 | { |
1167 | return __of_translate_address(blob, node_offset, in_addr, "ranges"); | |
1168 | } | |
75e73afd KG |
1169 | |
1170 | /** | |
1171 | * fdt_node_offset_by_compat_reg: Find a node that matches compatiable and | |
1172 | * who's reg property matches a physical cpu address | |
1173 | * | |
1174 | * @blob: ptr to device tree | |
1175 | * @compat: compatiable string to match | |
1176 | * @compat_off: property name | |
1177 | * | |
1178 | */ | |
1179 | int fdt_node_offset_by_compat_reg(void *blob, const char *compat, | |
1180 | phys_addr_t compat_off) | |
1181 | { | |
1182 | int len, off = fdt_node_offset_by_compatible(blob, -1, compat); | |
1183 | while (off != -FDT_ERR_NOTFOUND) { | |
8aa5ec6e | 1184 | const fdt32_t *reg = fdt_getprop(blob, off, "reg", &len); |
75e73afd KG |
1185 | if (reg) { |
1186 | if (compat_off == fdt_translate_address(blob, off, reg)) | |
1187 | return off; | |
1188 | } | |
1189 | off = fdt_node_offset_by_compatible(blob, off, compat); | |
1190 | } | |
1191 | ||
1192 | return -FDT_ERR_NOTFOUND; | |
1193 | } | |
1194 | ||
b4b847e9 KG |
1195 | /** |
1196 | * fdt_alloc_phandle: Return next free phandle value | |
1197 | * | |
1198 | * @blob: ptr to device tree | |
1199 | */ | |
1200 | int fdt_alloc_phandle(void *blob) | |
1201 | { | |
b4141195 MY |
1202 | int offset; |
1203 | uint32_t phandle = 0; | |
b4b847e9 KG |
1204 | |
1205 | for (offset = fdt_next_node(blob, -1, NULL); offset >= 0; | |
1206 | offset = fdt_next_node(blob, offset, NULL)) { | |
50bf17bd | 1207 | phandle = max(phandle, fdt_get_phandle(blob, offset)); |
b4b847e9 | 1208 | } |
75e73afd | 1209 | |
b4b847e9 KG |
1210 | return phandle + 1; |
1211 | } | |
beca5a5f | 1212 | |
a8d2a75d | 1213 | /* |
f117c0f0 | 1214 | * fdt_set_phandle: Create a phandle property for the given node |
a8d2a75d GVB |
1215 | * |
1216 | * @fdt: ptr to device tree | |
1217 | * @nodeoffset: node to update | |
1218 | * @phandle: phandle value to set (must be unique) | |
f117c0f0 KG |
1219 | */ |
1220 | int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle) | |
a8d2a75d GVB |
1221 | { |
1222 | int ret; | |
1223 | ||
1224 | #ifdef DEBUG | |
1225 | int off = fdt_node_offset_by_phandle(fdt, phandle); | |
1226 | ||
1227 | if ((off >= 0) && (off != nodeoffset)) { | |
1228 | char buf[64]; | |
1229 | ||
1230 | fdt_get_path(fdt, nodeoffset, buf, sizeof(buf)); | |
1231 | printf("Trying to update node %s with phandle %u ", | |
1232 | buf, phandle); | |
1233 | ||
1234 | fdt_get_path(fdt, off, buf, sizeof(buf)); | |
1235 | printf("that already exists in node %s.\n", buf); | |
1236 | return -FDT_ERR_BADPHANDLE; | |
1237 | } | |
1238 | #endif | |
1239 | ||
1240 | ret = fdt_setprop_cell(fdt, nodeoffset, "phandle", phandle); | |
1241 | if (ret < 0) | |
1242 | return ret; | |
1243 | ||
1244 | /* | |
1245 | * For now, also set the deprecated "linux,phandle" property, so that we | |
1246 | * don't break older kernels. | |
1247 | */ | |
1248 | ret = fdt_setprop_cell(fdt, nodeoffset, "linux,phandle", phandle); | |
1249 | ||
1250 | return ret; | |
1251 | } | |
1252 | ||
10aeabd1 KG |
1253 | /* |
1254 | * fdt_create_phandle: Create a phandle property for the given node | |
1255 | * | |
1256 | * @fdt: ptr to device tree | |
1257 | * @nodeoffset: node to update | |
1258 | */ | |
3c927ccc | 1259 | unsigned int fdt_create_phandle(void *fdt, int nodeoffset) |
10aeabd1 KG |
1260 | { |
1261 | /* see if there is a phandle already */ | |
1262 | int phandle = fdt_get_phandle(fdt, nodeoffset); | |
1263 | ||
1264 | /* if we got 0, means no phandle so create one */ | |
1265 | if (phandle == 0) { | |
3c927ccc TT |
1266 | int ret; |
1267 | ||
10aeabd1 | 1268 | phandle = fdt_alloc_phandle(fdt); |
3c927ccc TT |
1269 | ret = fdt_set_phandle(fdt, nodeoffset, phandle); |
1270 | if (ret < 0) { | |
1271 | printf("Can't set phandle %u: %s\n", phandle, | |
1272 | fdt_strerror(ret)); | |
1273 | return 0; | |
1274 | } | |
10aeabd1 KG |
1275 | } |
1276 | ||
1277 | return phandle; | |
1278 | } | |
1279 | ||
2a523f52 SL |
1280 | /* |
1281 | * fdt_set_node_status: Set status for the given node | |
1282 | * | |
1283 | * @fdt: ptr to device tree | |
1284 | * @nodeoffset: node to update | |
1285 | * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, | |
1286 | * FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE | |
1287 | * @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE | |
1288 | */ | |
1289 | int fdt_set_node_status(void *fdt, int nodeoffset, | |
1290 | enum fdt_status status, unsigned int error_code) | |
1291 | { | |
1292 | char buf[16]; | |
1293 | int ret = 0; | |
1294 | ||
1295 | if (nodeoffset < 0) | |
1296 | return nodeoffset; | |
1297 | ||
1298 | switch (status) { | |
1299 | case FDT_STATUS_OKAY: | |
1300 | ret = fdt_setprop_string(fdt, nodeoffset, "status", "okay"); | |
1301 | break; | |
1302 | case FDT_STATUS_DISABLED: | |
1303 | ret = fdt_setprop_string(fdt, nodeoffset, "status", "disabled"); | |
1304 | break; | |
1305 | case FDT_STATUS_FAIL: | |
1306 | ret = fdt_setprop_string(fdt, nodeoffset, "status", "fail"); | |
1307 | break; | |
1308 | case FDT_STATUS_FAIL_ERROR_CODE: | |
1309 | sprintf(buf, "fail-%d", error_code); | |
1310 | ret = fdt_setprop_string(fdt, nodeoffset, "status", buf); | |
1311 | break; | |
1312 | default: | |
1313 | printf("Invalid fdt status: %x\n", status); | |
1314 | ret = -1; | |
1315 | break; | |
1316 | } | |
1317 | ||
1318 | return ret; | |
1319 | } | |
1320 | ||
1321 | /* | |
1322 | * fdt_set_status_by_alias: Set status for the given node given an alias | |
1323 | * | |
1324 | * @fdt: ptr to device tree | |
1325 | * @alias: alias of node to update | |
1326 | * @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED, | |
1327 | * FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE | |
1328 | * @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE | |
1329 | */ | |
1330 | int fdt_set_status_by_alias(void *fdt, const char* alias, | |
1331 | enum fdt_status status, unsigned int error_code) | |
1332 | { | |
1333 | int offset = fdt_path_offset(fdt, alias); | |
1334 | ||
1335 | return fdt_set_node_status(fdt, offset, status, error_code); | |
1336 | } | |
1337 | ||
096eb3f5 | 1338 | #if defined(CONFIG_VIDEO) || defined(CONFIG_LCD) |
beca5a5f AG |
1339 | int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf) |
1340 | { | |
1341 | int noff; | |
1342 | int ret; | |
1343 | ||
1344 | noff = fdt_node_offset_by_compatible(blob, -1, compat); | |
1345 | if (noff != -FDT_ERR_NOTFOUND) { | |
1346 | debug("%s: %s\n", fdt_get_name(blob, noff, 0), compat); | |
1347 | add_edid: | |
1348 | ret = fdt_setprop(blob, noff, "edid", edid_buf, 128); | |
1349 | if (ret == -FDT_ERR_NOSPACE) { | |
1350 | ret = fdt_increase_size(blob, 512); | |
1351 | if (!ret) | |
1352 | goto add_edid; | |
1353 | else | |
1354 | goto err_size; | |
1355 | } else if (ret < 0) { | |
1356 | printf("Can't add property: %s\n", fdt_strerror(ret)); | |
1357 | return ret; | |
1358 | } | |
1359 | } | |
1360 | return 0; | |
1361 | err_size: | |
1362 | printf("Can't increase blob size: %s\n", fdt_strerror(ret)); | |
1363 | return ret; | |
1364 | } | |
1365 | #endif | |
bb682001 TT |
1366 | |
1367 | /* | |
1368 | * Verify the physical address of device tree node for a given alias | |
1369 | * | |
1370 | * This function locates the device tree node of a given alias, and then | |
1371 | * verifies that the physical address of that device matches the given | |
1372 | * parameter. It displays a message if there is a mismatch. | |
1373 | * | |
1374 | * Returns 1 on success, 0 on failure | |
1375 | */ | |
1376 | int fdt_verify_alias_address(void *fdt, int anode, const char *alias, u64 addr) | |
1377 | { | |
1378 | const char *path; | |
8aa5ec6e | 1379 | const fdt32_t *reg; |
bb682001 TT |
1380 | int node, len; |
1381 | u64 dt_addr; | |
1382 | ||
1383 | path = fdt_getprop(fdt, anode, alias, NULL); | |
1384 | if (!path) { | |
1385 | /* If there's no such alias, then it's not a failure */ | |
1386 | return 1; | |
1387 | } | |
1388 | ||
1389 | node = fdt_path_offset(fdt, path); | |
1390 | if (node < 0) { | |
1391 | printf("Warning: device tree alias '%s' points to invalid " | |
1392 | "node %s.\n", alias, path); | |
1393 | return 0; | |
1394 | } | |
1395 | ||
1396 | reg = fdt_getprop(fdt, node, "reg", &len); | |
1397 | if (!reg) { | |
1398 | printf("Warning: device tree node '%s' has no address.\n", | |
1399 | path); | |
1400 | return 0; | |
1401 | } | |
1402 | ||
1403 | dt_addr = fdt_translate_address(fdt, node, reg); | |
1404 | if (addr != dt_addr) { | |
e48f3741 SG |
1405 | printf("Warning: U-Boot configured device %s at address %" |
1406 | PRIx64 ",\n but the device tree has it address %" | |
1407 | PRIx64 ".\n", alias, addr, dt_addr); | |
bb682001 TT |
1408 | return 0; |
1409 | } | |
1410 | ||
1411 | return 1; | |
1412 | } | |
1413 | ||
1414 | /* | |
1415 | * Returns the base address of an SOC or PCI node | |
1416 | */ | |
1417 | u64 fdt_get_base_address(void *fdt, int node) | |
1418 | { | |
1419 | int size; | |
1420 | u32 naddr; | |
8aa5ec6e | 1421 | const fdt32_t *prop; |
bb682001 | 1422 | |
933cdbb4 | 1423 | naddr = fdt_address_cells(fdt, node); |
bb682001 TT |
1424 | |
1425 | prop = fdt_getprop(fdt, node, "ranges", &size); | |
1426 | ||
1427 | return prop ? fdt_translate_address(fdt, node, prop + naddr) : 0; | |
1428 | } | |
c48e6868 AG |
1429 | |
1430 | /* | |
1431 | * Read a property of size <prop_len>. Currently only supports 1 or 2 cells. | |
1432 | */ | |
1433 | static int fdt_read_prop(const fdt32_t *prop, int prop_len, int cell_off, | |
1434 | uint64_t *val, int cells) | |
1435 | { | |
1436 | const fdt32_t *prop32 = &prop[cell_off]; | |
1437 | const fdt64_t *prop64 = (const fdt64_t *)&prop[cell_off]; | |
1438 | ||
1439 | if ((cell_off + cells) > prop_len) | |
1440 | return -FDT_ERR_NOSPACE; | |
1441 | ||
1442 | switch (cells) { | |
1443 | case 1: | |
1444 | *val = fdt32_to_cpu(*prop32); | |
1445 | break; | |
1446 | case 2: | |
1447 | *val = fdt64_to_cpu(*prop64); | |
1448 | break; | |
1449 | default: | |
1450 | return -FDT_ERR_NOSPACE; | |
1451 | } | |
1452 | ||
1453 | return 0; | |
1454 | } | |
1455 | ||
1456 | /** | |
1457 | * fdt_read_range - Read a node's n'th range property | |
1458 | * | |
1459 | * @fdt: ptr to device tree | |
1460 | * @node: offset of node | |
1461 | * @n: range index | |
1462 | * @child_addr: pointer to storage for the "child address" field | |
1463 | * @addr: pointer to storage for the CPU view translated physical start | |
1464 | * @len: pointer to storage for the range length | |
1465 | * | |
1466 | * Convenience function that reads and interprets a specific range out of | |
1467 | * a number of the "ranges" property array. | |
1468 | */ | |
1469 | int fdt_read_range(void *fdt, int node, int n, uint64_t *child_addr, | |
1470 | uint64_t *addr, uint64_t *len) | |
1471 | { | |
1472 | int pnode = fdt_parent_offset(fdt, node); | |
1473 | const fdt32_t *ranges; | |
1474 | int pacells; | |
1475 | int acells; | |
1476 | int scells; | |
1477 | int ranges_len; | |
1478 | int cell = 0; | |
1479 | int r = 0; | |
1480 | ||
1481 | /* | |
1482 | * The "ranges" property is an array of | |
1483 | * { <child address> <parent address> <size in child address space> } | |
1484 | * | |
1485 | * All 3 elements can span a diffent number of cells. Fetch their size. | |
1486 | */ | |
1487 | pacells = fdt_getprop_u32_default_node(fdt, pnode, 0, "#address-cells", 1); | |
1488 | acells = fdt_getprop_u32_default_node(fdt, node, 0, "#address-cells", 1); | |
1489 | scells = fdt_getprop_u32_default_node(fdt, node, 0, "#size-cells", 1); | |
1490 | ||
1491 | /* Now try to get the ranges property */ | |
1492 | ranges = fdt_getprop(fdt, node, "ranges", &ranges_len); | |
1493 | if (!ranges) | |
1494 | return -FDT_ERR_NOTFOUND; | |
1495 | ranges_len /= sizeof(uint32_t); | |
1496 | ||
1497 | /* Jump to the n'th entry */ | |
1498 | cell = n * (pacells + acells + scells); | |
1499 | ||
1500 | /* Read <child address> */ | |
1501 | if (child_addr) { | |
1502 | r = fdt_read_prop(ranges, ranges_len, cell, child_addr, | |
1503 | acells); | |
1504 | if (r) | |
1505 | return r; | |
1506 | } | |
1507 | cell += acells; | |
1508 | ||
1509 | /* Read <parent address> */ | |
1510 | if (addr) | |
1511 | *addr = fdt_translate_address(fdt, node, ranges + cell); | |
1512 | cell += pacells; | |
1513 | ||
1514 | /* Read <size in child address space> */ | |
1515 | if (len) { | |
1516 | r = fdt_read_prop(ranges, ranges_len, cell, len, scells); | |
1517 | if (r) | |
1518 | return r; | |
1519 | } | |
1520 | ||
1521 | return 0; | |
1522 | } | |
d4f495a8 HG |
1523 | |
1524 | /** | |
1525 | * fdt_setup_simplefb_node - Fill and enable a simplefb node | |
1526 | * | |
1527 | * @fdt: ptr to device tree | |
1528 | * @node: offset of the simplefb node | |
1529 | * @base_address: framebuffer base address | |
1530 | * @width: width in pixels | |
1531 | * @height: height in pixels | |
1532 | * @stride: bytes per line | |
1533 | * @format: pixel format string | |
1534 | * | |
1535 | * Convenience function to fill and enable a simplefb node. | |
1536 | */ | |
1537 | int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width, | |
1538 | u32 height, u32 stride, const char *format) | |
1539 | { | |
1540 | char name[32]; | |
1541 | fdt32_t cells[4]; | |
1542 | int i, addrc, sizec, ret; | |
1543 | ||
1544 | of_bus_default_count_cells(fdt, fdt_parent_offset(fdt, node), | |
1545 | &addrc, &sizec); | |
1546 | i = 0; | |
1547 | if (addrc == 2) | |
1548 | cells[i++] = cpu_to_fdt32(base_address >> 32); | |
1549 | cells[i++] = cpu_to_fdt32(base_address); | |
1550 | if (sizec == 2) | |
1551 | cells[i++] = 0; | |
1552 | cells[i++] = cpu_to_fdt32(height * stride); | |
1553 | ||
1554 | ret = fdt_setprop(fdt, node, "reg", cells, sizeof(cells[0]) * i); | |
1555 | if (ret < 0) | |
1556 | return ret; | |
1557 | ||
c3ec646d | 1558 | snprintf(name, sizeof(name), "framebuffer@%" PRIx64, base_address); |
d4f495a8 HG |
1559 | ret = fdt_set_name(fdt, node, name); |
1560 | if (ret < 0) | |
1561 | return ret; | |
1562 | ||
1563 | ret = fdt_setprop_u32(fdt, node, "width", width); | |
1564 | if (ret < 0) | |
1565 | return ret; | |
1566 | ||
1567 | ret = fdt_setprop_u32(fdt, node, "height", height); | |
1568 | if (ret < 0) | |
1569 | return ret; | |
1570 | ||
1571 | ret = fdt_setprop_u32(fdt, node, "stride", stride); | |
1572 | if (ret < 0) | |
1573 | return ret; | |
1574 | ||
1575 | ret = fdt_setprop_string(fdt, node, "format", format); | |
1576 | if (ret < 0) | |
1577 | return ret; | |
1578 | ||
1579 | ret = fdt_setprop_string(fdt, node, "status", "okay"); | |
1580 | if (ret < 0) | |
1581 | return ret; | |
1582 | ||
1583 | return 0; | |
1584 | } | |
08daa258 TH |
1585 | |
1586 | /* | |
1587 | * Update native-mode in display-timings from display environment variable. | |
1588 | * The node to update are specified by path. | |
1589 | */ | |
1590 | int fdt_fixup_display(void *blob, const char *path, const char *display) | |
1591 | { | |
1592 | int off, toff; | |
1593 | ||
1594 | if (!display || !path) | |
1595 | return -FDT_ERR_NOTFOUND; | |
1596 | ||
1597 | toff = fdt_path_offset(blob, path); | |
1598 | if (toff >= 0) | |
1599 | toff = fdt_subnode_offset(blob, toff, "display-timings"); | |
1600 | if (toff < 0) | |
1601 | return toff; | |
1602 | ||
1603 | for (off = fdt_first_subnode(blob, toff); | |
1604 | off >= 0; | |
1605 | off = fdt_next_subnode(blob, off)) { | |
1606 | uint32_t h = fdt_get_phandle(blob, off); | |
1607 | debug("%s:0x%x\n", fdt_get_name(blob, off, NULL), | |
1608 | fdt32_to_cpu(h)); | |
1609 | if (strcasecmp(fdt_get_name(blob, off, NULL), display) == 0) | |
1610 | return fdt_setprop_u32(blob, toff, "native-mode", h); | |
1611 | } | |
1612 | return toff; | |
1613 | } |