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272cc70b AF |
1 | /* |
2 | * Copyright 2008, Freescale Semiconductor, Inc | |
3 | * Andy Fleming | |
4 | * | |
5 | * Based vaguely on the Linux code | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <config.h> | |
27 | #include <common.h> | |
28 | #include <command.h> | |
29 | #include <mmc.h> | |
30 | #include <part.h> | |
31 | #include <malloc.h> | |
32 | #include <linux/list.h> | |
9b1f942c | 33 | #include <div64.h> |
272cc70b | 34 | |
ce0fbcd2 MW |
35 | /* Set block count limit because of 16 bit register limit on some hardware*/ |
36 | #ifndef CONFIG_SYS_MMC_MAX_BLK_COUNT | |
37 | #define CONFIG_SYS_MMC_MAX_BLK_COUNT 65535 | |
38 | #endif | |
39 | ||
272cc70b AF |
40 | static struct list_head mmc_devices; |
41 | static int cur_dev_num = -1; | |
42 | ||
11fdade2 SB |
43 | int __board_mmc_getcd(u8 *cd, struct mmc *mmc) { |
44 | return -1; | |
45 | } | |
46 | ||
47 | int board_mmc_getcd(u8 *cd, struct mmc *mmc)__attribute__((weak, | |
48 | alias("__board_mmc_getcd"))); | |
49 | ||
272cc70b AF |
50 | int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) |
51 | { | |
5db2fe3a RR |
52 | #ifdef CONFIG_MMC_TRACE |
53 | int ret; | |
54 | int i; | |
55 | u8 *ptr; | |
56 | ||
57 | printf("CMD_SEND:%d\n", cmd->cmdidx); | |
58 | printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); | |
59 | printf("\t\tFLAG\t\t\t %d\n", cmd->flags); | |
60 | ret = mmc->send_cmd(mmc, cmd, data); | |
61 | switch (cmd->resp_type) { | |
62 | case MMC_RSP_NONE: | |
63 | printf("\t\tMMC_RSP_NONE\n"); | |
64 | break; | |
65 | case MMC_RSP_R1: | |
66 | printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", | |
67 | cmd->response[0]); | |
68 | break; | |
69 | case MMC_RSP_R1b: | |
70 | printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", | |
71 | cmd->response[0]); | |
72 | break; | |
73 | case MMC_RSP_R2: | |
74 | printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", | |
75 | cmd->response[0]); | |
76 | printf("\t\t \t\t 0x%08X \n", | |
77 | cmd->response[1]); | |
78 | printf("\t\t \t\t 0x%08X \n", | |
79 | cmd->response[2]); | |
80 | printf("\t\t \t\t 0x%08X \n", | |
81 | cmd->response[3]); | |
82 | printf("\n"); | |
83 | printf("\t\t\t\t\tDUMPING DATA\n"); | |
84 | for (i = 0; i < 4; i++) { | |
85 | int j; | |
86 | printf("\t\t\t\t\t%03d - ", i*4); | |
87 | ptr = &cmd->response[i]; | |
88 | ptr += 3; | |
89 | for (j = 0; j < 4; j++) | |
90 | printf("%02X ", *ptr--); | |
91 | printf("\n"); | |
92 | } | |
93 | break; | |
94 | case MMC_RSP_R3: | |
95 | printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", | |
96 | cmd->response[0]); | |
97 | break; | |
98 | default: | |
99 | printf("\t\tERROR MMC rsp not supported\n"); | |
100 | break; | |
101 | } | |
102 | return ret; | |
103 | #else | |
272cc70b | 104 | return mmc->send_cmd(mmc, cmd, data); |
5db2fe3a | 105 | #endif |
272cc70b AF |
106 | } |
107 | ||
5d4fc8d9 RR |
108 | int mmc_send_status(struct mmc *mmc, int timeout) |
109 | { | |
110 | struct mmc_cmd cmd; | |
111 | int err; | |
112 | #ifdef CONFIG_MMC_TRACE | |
113 | int status; | |
114 | #endif | |
115 | ||
116 | cmd.cmdidx = MMC_CMD_SEND_STATUS; | |
117 | cmd.resp_type = MMC_RSP_R1; | |
118 | cmd.cmdarg = 0; | |
119 | cmd.flags = 0; | |
120 | ||
121 | do { | |
122 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
123 | if (err) | |
124 | return err; | |
125 | else if (cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) | |
126 | break; | |
127 | ||
128 | udelay(1000); | |
129 | ||
130 | if (cmd.response[0] & MMC_STATUS_MASK) { | |
131 | printf("Status Error: 0x%08X\n", cmd.response[0]); | |
132 | return COMM_ERR; | |
133 | } | |
134 | } while (timeout--); | |
135 | ||
5db2fe3a RR |
136 | #ifdef CONFIG_MMC_TRACE |
137 | status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9; | |
138 | printf("CURR STATE:%d\n", status); | |
139 | #endif | |
5d4fc8d9 RR |
140 | if (!timeout) { |
141 | printf("Timeout waiting card ready\n"); | |
142 | return TIMEOUT; | |
143 | } | |
144 | ||
145 | return 0; | |
146 | } | |
147 | ||
272cc70b AF |
148 | int mmc_set_blocklen(struct mmc *mmc, int len) |
149 | { | |
150 | struct mmc_cmd cmd; | |
151 | ||
152 | cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; | |
153 | cmd.resp_type = MMC_RSP_R1; | |
154 | cmd.cmdarg = len; | |
155 | cmd.flags = 0; | |
156 | ||
157 | return mmc_send_cmd(mmc, &cmd, NULL); | |
158 | } | |
159 | ||
160 | struct mmc *find_mmc_device(int dev_num) | |
161 | { | |
162 | struct mmc *m; | |
163 | struct list_head *entry; | |
164 | ||
165 | list_for_each(entry, &mmc_devices) { | |
166 | m = list_entry(entry, struct mmc, link); | |
167 | ||
168 | if (m->block_dev.dev == dev_num) | |
169 | return m; | |
170 | } | |
171 | ||
172 | printf("MMC Device %d not found\n", dev_num); | |
173 | ||
174 | return NULL; | |
175 | } | |
176 | ||
e6f99a56 LW |
177 | static ulong mmc_erase_t(struct mmc *mmc, ulong start, lbaint_t blkcnt) |
178 | { | |
179 | struct mmc_cmd cmd; | |
180 | ulong end; | |
181 | int err, start_cmd, end_cmd; | |
182 | ||
183 | if (mmc->high_capacity) | |
184 | end = start + blkcnt - 1; | |
185 | else { | |
186 | end = (start + blkcnt - 1) * mmc->write_bl_len; | |
187 | start *= mmc->write_bl_len; | |
188 | } | |
189 | ||
190 | if (IS_SD(mmc)) { | |
191 | start_cmd = SD_CMD_ERASE_WR_BLK_START; | |
192 | end_cmd = SD_CMD_ERASE_WR_BLK_END; | |
193 | } else { | |
194 | start_cmd = MMC_CMD_ERASE_GROUP_START; | |
195 | end_cmd = MMC_CMD_ERASE_GROUP_END; | |
196 | } | |
197 | ||
198 | cmd.cmdidx = start_cmd; | |
199 | cmd.cmdarg = start; | |
200 | cmd.resp_type = MMC_RSP_R1; | |
201 | cmd.flags = 0; | |
202 | ||
203 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
204 | if (err) | |
205 | goto err_out; | |
206 | ||
207 | cmd.cmdidx = end_cmd; | |
208 | cmd.cmdarg = end; | |
209 | ||
210 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
211 | if (err) | |
212 | goto err_out; | |
213 | ||
214 | cmd.cmdidx = MMC_CMD_ERASE; | |
215 | cmd.cmdarg = SECURE_ERASE; | |
216 | cmd.resp_type = MMC_RSP_R1b; | |
217 | ||
218 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
219 | if (err) | |
220 | goto err_out; | |
221 | ||
222 | return 0; | |
223 | ||
224 | err_out: | |
225 | puts("mmc erase failed\n"); | |
226 | return err; | |
227 | } | |
228 | ||
229 | static unsigned long | |
230 | mmc_berase(int dev_num, unsigned long start, lbaint_t blkcnt) | |
231 | { | |
232 | int err = 0; | |
233 | struct mmc *mmc = find_mmc_device(dev_num); | |
234 | lbaint_t blk = 0, blk_r = 0; | |
235 | ||
236 | if (!mmc) | |
237 | return -1; | |
238 | ||
239 | if ((start % mmc->erase_grp_size) || (blkcnt % mmc->erase_grp_size)) | |
240 | printf("\n\nCaution! Your devices Erase group is 0x%x\n" | |
241 | "The erase range would be change to 0x%lx~0x%lx\n\n", | |
242 | mmc->erase_grp_size, start & ~(mmc->erase_grp_size - 1), | |
243 | ((start + blkcnt + mmc->erase_grp_size) | |
244 | & ~(mmc->erase_grp_size - 1)) - 1); | |
245 | ||
246 | while (blk < blkcnt) { | |
247 | blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ? | |
248 | mmc->erase_grp_size : (blkcnt - blk); | |
249 | err = mmc_erase_t(mmc, start + blk, blk_r); | |
250 | if (err) | |
251 | break; | |
252 | ||
253 | blk += blk_r; | |
254 | } | |
255 | ||
256 | return blk; | |
257 | } | |
258 | ||
272cc70b | 259 | static ulong |
0158126e | 260 | mmc_write_blocks(struct mmc *mmc, ulong start, lbaint_t blkcnt, const void*src) |
272cc70b AF |
261 | { |
262 | struct mmc_cmd cmd; | |
263 | struct mmc_data data; | |
5d4fc8d9 | 264 | int timeout = 1000; |
272cc70b | 265 | |
d2bf29e3 | 266 | if ((start + blkcnt) > mmc->block_dev.lba) { |
def412b6 | 267 | printf("MMC: block number 0x%lx exceeds max(0x%lx)\n", |
d2bf29e3 LW |
268 | start + blkcnt, mmc->block_dev.lba); |
269 | return 0; | |
270 | } | |
272cc70b AF |
271 | |
272 | if (blkcnt > 1) | |
273 | cmd.cmdidx = MMC_CMD_WRITE_MULTIPLE_BLOCK; | |
274 | else | |
275 | cmd.cmdidx = MMC_CMD_WRITE_SINGLE_BLOCK; | |
276 | ||
277 | if (mmc->high_capacity) | |
278 | cmd.cmdarg = start; | |
279 | else | |
def412b6 | 280 | cmd.cmdarg = start * mmc->write_bl_len; |
272cc70b AF |
281 | |
282 | cmd.resp_type = MMC_RSP_R1; | |
283 | cmd.flags = 0; | |
284 | ||
285 | data.src = src; | |
286 | data.blocks = blkcnt; | |
def412b6 | 287 | data.blocksize = mmc->write_bl_len; |
272cc70b AF |
288 | data.flags = MMC_DATA_WRITE; |
289 | ||
def412b6 SS |
290 | if (mmc_send_cmd(mmc, &cmd, &data)) { |
291 | printf("mmc write failed\n"); | |
292 | return 0; | |
272cc70b AF |
293 | } |
294 | ||
d52ebf10 TC |
295 | /* SPI multiblock writes terminate using a special |
296 | * token, not a STOP_TRANSMISSION request. | |
297 | */ | |
298 | if (!mmc_host_is_spi(mmc) && blkcnt > 1) { | |
272cc70b AF |
299 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; |
300 | cmd.cmdarg = 0; | |
301 | cmd.resp_type = MMC_RSP_R1b; | |
302 | cmd.flags = 0; | |
def412b6 SS |
303 | if (mmc_send_cmd(mmc, &cmd, NULL)) { |
304 | printf("mmc fail to send stop cmd\n"); | |
305 | return 0; | |
0158126e | 306 | } |
5d4fc8d9 RR |
307 | |
308 | /* Waiting for the ready status */ | |
309 | mmc_send_status(mmc, timeout); | |
272cc70b AF |
310 | } |
311 | ||
312 | return blkcnt; | |
313 | } | |
314 | ||
0158126e LW |
315 | static ulong |
316 | mmc_bwrite(int dev_num, ulong start, lbaint_t blkcnt, const void*src) | |
317 | { | |
0158126e LW |
318 | lbaint_t cur, blocks_todo = blkcnt; |
319 | ||
def412b6 | 320 | struct mmc *mmc = find_mmc_device(dev_num); |
0158126e | 321 | if (!mmc) |
def412b6 | 322 | return 0; |
0158126e | 323 | |
def412b6 SS |
324 | if (mmc_set_blocklen(mmc, mmc->write_bl_len)) |
325 | return 0; | |
0158126e LW |
326 | |
327 | do { | |
8feafcc4 | 328 | cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo; |
0158126e | 329 | if(mmc_write_blocks(mmc, start, cur, src) != cur) |
def412b6 | 330 | return 0; |
0158126e LW |
331 | blocks_todo -= cur; |
332 | start += cur; | |
333 | src += cur * mmc->write_bl_len; | |
334 | } while (blocks_todo > 0); | |
335 | ||
336 | return blkcnt; | |
337 | } | |
338 | ||
4a1a06bc | 339 | int mmc_read_blocks(struct mmc *mmc, void *dst, ulong start, lbaint_t blkcnt) |
272cc70b AF |
340 | { |
341 | struct mmc_cmd cmd; | |
342 | struct mmc_data data; | |
5d4fc8d9 | 343 | int timeout = 1000; |
272cc70b | 344 | |
4a1a06bc AS |
345 | if (blkcnt > 1) |
346 | cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; | |
347 | else | |
348 | cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; | |
272cc70b AF |
349 | |
350 | if (mmc->high_capacity) | |
4a1a06bc | 351 | cmd.cmdarg = start; |
272cc70b | 352 | else |
4a1a06bc | 353 | cmd.cmdarg = start * mmc->read_bl_len; |
272cc70b AF |
354 | |
355 | cmd.resp_type = MMC_RSP_R1; | |
356 | cmd.flags = 0; | |
357 | ||
358 | data.dest = dst; | |
4a1a06bc | 359 | data.blocks = blkcnt; |
272cc70b AF |
360 | data.blocksize = mmc->read_bl_len; |
361 | data.flags = MMC_DATA_READ; | |
362 | ||
4a1a06bc AS |
363 | if (mmc_send_cmd(mmc, &cmd, &data)) |
364 | return 0; | |
272cc70b | 365 | |
4a1a06bc AS |
366 | if (blkcnt > 1) { |
367 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; | |
368 | cmd.cmdarg = 0; | |
369 | cmd.resp_type = MMC_RSP_R1b; | |
370 | cmd.flags = 0; | |
371 | if (mmc_send_cmd(mmc, &cmd, NULL)) { | |
372 | printf("mmc fail to send stop cmd\n"); | |
373 | return 0; | |
374 | } | |
5d4fc8d9 RR |
375 | |
376 | /* Waiting for the ready status */ | |
377 | mmc_send_status(mmc, timeout); | |
272cc70b AF |
378 | } |
379 | ||
4a1a06bc | 380 | return blkcnt; |
272cc70b AF |
381 | } |
382 | ||
383 | static ulong mmc_bread(int dev_num, ulong start, lbaint_t blkcnt, void *dst) | |
384 | { | |
4a1a06bc AS |
385 | lbaint_t cur, blocks_todo = blkcnt; |
386 | ||
387 | if (blkcnt == 0) | |
388 | return 0; | |
272cc70b | 389 | |
4a1a06bc | 390 | struct mmc *mmc = find_mmc_device(dev_num); |
272cc70b AF |
391 | if (!mmc) |
392 | return 0; | |
393 | ||
d2bf29e3 | 394 | if ((start + blkcnt) > mmc->block_dev.lba) { |
4a1a06bc | 395 | printf("MMC: block number 0x%lx exceeds max(0x%lx)\n", |
d2bf29e3 LW |
396 | start + blkcnt, mmc->block_dev.lba); |
397 | return 0; | |
398 | } | |
272cc70b | 399 | |
4a1a06bc | 400 | if (mmc_set_blocklen(mmc, mmc->read_bl_len)) |
272cc70b | 401 | return 0; |
272cc70b | 402 | |
4a1a06bc | 403 | do { |
8feafcc4 | 404 | cur = (blocks_todo > mmc->b_max) ? mmc->b_max : blocks_todo; |
4a1a06bc AS |
405 | if(mmc_read_blocks(mmc, dst, start, cur) != cur) |
406 | return 0; | |
407 | blocks_todo -= cur; | |
408 | start += cur; | |
409 | dst += cur * mmc->read_bl_len; | |
410 | } while (blocks_todo > 0); | |
272cc70b AF |
411 | |
412 | return blkcnt; | |
413 | } | |
414 | ||
415 | int mmc_go_idle(struct mmc* mmc) | |
416 | { | |
417 | struct mmc_cmd cmd; | |
418 | int err; | |
419 | ||
420 | udelay(1000); | |
421 | ||
422 | cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; | |
423 | cmd.cmdarg = 0; | |
424 | cmd.resp_type = MMC_RSP_NONE; | |
425 | cmd.flags = 0; | |
426 | ||
427 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
428 | ||
429 | if (err) | |
430 | return err; | |
431 | ||
432 | udelay(2000); | |
433 | ||
434 | return 0; | |
435 | } | |
436 | ||
437 | int | |
438 | sd_send_op_cond(struct mmc *mmc) | |
439 | { | |
440 | int timeout = 1000; | |
441 | int err; | |
442 | struct mmc_cmd cmd; | |
443 | ||
444 | do { | |
445 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
446 | cmd.resp_type = MMC_RSP_R1; | |
447 | cmd.cmdarg = 0; | |
448 | cmd.flags = 0; | |
449 | ||
450 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
451 | ||
452 | if (err) | |
453 | return err; | |
454 | ||
455 | cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; | |
456 | cmd.resp_type = MMC_RSP_R3; | |
250de12b SB |
457 | |
458 | /* | |
459 | * Most cards do not answer if some reserved bits | |
460 | * in the ocr are set. However, Some controller | |
461 | * can set bit 7 (reserved for low voltages), but | |
462 | * how to manage low voltages SD card is not yet | |
463 | * specified. | |
464 | */ | |
d52ebf10 TC |
465 | cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : |
466 | (mmc->voltages & 0xff8000); | |
272cc70b AF |
467 | |
468 | if (mmc->version == SD_VERSION_2) | |
469 | cmd.cmdarg |= OCR_HCS; | |
470 | ||
471 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
472 | ||
473 | if (err) | |
474 | return err; | |
475 | ||
476 | udelay(1000); | |
477 | } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--); | |
478 | ||
479 | if (timeout <= 0) | |
480 | return UNUSABLE_ERR; | |
481 | ||
482 | if (mmc->version != SD_VERSION_2) | |
483 | mmc->version = SD_VERSION_1_0; | |
484 | ||
d52ebf10 TC |
485 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
486 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
487 | cmd.resp_type = MMC_RSP_R3; | |
488 | cmd.cmdarg = 0; | |
489 | cmd.flags = 0; | |
490 | ||
491 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
492 | ||
493 | if (err) | |
494 | return err; | |
495 | } | |
496 | ||
998be3dd | 497 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
498 | |
499 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
500 | mmc->rca = 0; | |
501 | ||
502 | return 0; | |
503 | } | |
504 | ||
505 | int mmc_send_op_cond(struct mmc *mmc) | |
506 | { | |
31cacbab | 507 | int timeout = 10000; |
272cc70b AF |
508 | struct mmc_cmd cmd; |
509 | int err; | |
510 | ||
511 | /* Some cards seem to need this */ | |
512 | mmc_go_idle(mmc); | |
513 | ||
31cacbab RR |
514 | /* Asking to the card its capabilities */ |
515 | cmd.cmdidx = MMC_CMD_SEND_OP_COND; | |
516 | cmd.resp_type = MMC_RSP_R3; | |
517 | cmd.cmdarg = 0; | |
518 | cmd.flags = 0; | |
cd6881b5 | 519 | |
31cacbab | 520 | err = mmc_send_cmd(mmc, &cmd, NULL); |
cd6881b5 | 521 | |
31cacbab RR |
522 | if (err) |
523 | return err; | |
cd6881b5 | 524 | |
31cacbab | 525 | udelay(1000); |
cd6881b5 | 526 | |
272cc70b AF |
527 | do { |
528 | cmd.cmdidx = MMC_CMD_SEND_OP_COND; | |
529 | cmd.resp_type = MMC_RSP_R3; | |
31cacbab RR |
530 | cmd.cmdarg = (mmc_host_is_spi(mmc) ? 0 : |
531 | (mmc->voltages & | |
532 | (cmd.response[0] & OCR_VOLTAGE_MASK)) | | |
533 | (cmd.response[0] & OCR_ACCESS_MODE)); | |
b1f1e821 ŁM |
534 | |
535 | if (mmc->host_caps & MMC_MODE_HC) | |
536 | cmd.cmdarg |= OCR_HCS; | |
537 | ||
272cc70b AF |
538 | cmd.flags = 0; |
539 | ||
540 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
541 | ||
542 | if (err) | |
543 | return err; | |
544 | ||
545 | udelay(1000); | |
546 | } while (!(cmd.response[0] & OCR_BUSY) && timeout--); | |
547 | ||
548 | if (timeout <= 0) | |
549 | return UNUSABLE_ERR; | |
550 | ||
d52ebf10 TC |
551 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
552 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; | |
553 | cmd.resp_type = MMC_RSP_R3; | |
554 | cmd.cmdarg = 0; | |
555 | cmd.flags = 0; | |
556 | ||
557 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
558 | ||
559 | if (err) | |
560 | return err; | |
561 | } | |
562 | ||
272cc70b | 563 | mmc->version = MMC_VERSION_UNKNOWN; |
998be3dd | 564 | mmc->ocr = cmd.response[0]; |
272cc70b AF |
565 | |
566 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); | |
567 | mmc->rca = 0; | |
568 | ||
569 | return 0; | |
570 | } | |
571 | ||
572 | ||
573 | int mmc_send_ext_csd(struct mmc *mmc, char *ext_csd) | |
574 | { | |
575 | struct mmc_cmd cmd; | |
576 | struct mmc_data data; | |
577 | int err; | |
578 | ||
579 | /* Get the Card Status Register */ | |
580 | cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; | |
581 | cmd.resp_type = MMC_RSP_R1; | |
582 | cmd.cmdarg = 0; | |
583 | cmd.flags = 0; | |
584 | ||
585 | data.dest = ext_csd; | |
586 | data.blocks = 1; | |
587 | data.blocksize = 512; | |
588 | data.flags = MMC_DATA_READ; | |
589 | ||
590 | err = mmc_send_cmd(mmc, &cmd, &data); | |
591 | ||
592 | return err; | |
593 | } | |
594 | ||
595 | ||
596 | int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) | |
597 | { | |
598 | struct mmc_cmd cmd; | |
5d4fc8d9 RR |
599 | int timeout = 1000; |
600 | int ret; | |
272cc70b AF |
601 | |
602 | cmd.cmdidx = MMC_CMD_SWITCH; | |
603 | cmd.resp_type = MMC_RSP_R1b; | |
604 | cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | | |
5d4fc8d9 RR |
605 | (index << 16) | |
606 | (value << 8); | |
272cc70b AF |
607 | cmd.flags = 0; |
608 | ||
5d4fc8d9 RR |
609 | ret = mmc_send_cmd(mmc, &cmd, NULL); |
610 | ||
611 | /* Waiting for the ready status */ | |
612 | mmc_send_status(mmc, timeout); | |
613 | ||
614 | return ret; | |
615 | ||
272cc70b AF |
616 | } |
617 | ||
618 | int mmc_change_freq(struct mmc *mmc) | |
619 | { | |
620 | char ext_csd[512]; | |
621 | char cardtype; | |
622 | int err; | |
623 | ||
624 | mmc->card_caps = 0; | |
625 | ||
d52ebf10 TC |
626 | if (mmc_host_is_spi(mmc)) |
627 | return 0; | |
628 | ||
272cc70b AF |
629 | /* Only version 4 supports high-speed */ |
630 | if (mmc->version < MMC_VERSION_4) | |
631 | return 0; | |
632 | ||
633 | mmc->card_caps |= MMC_MODE_4BIT; | |
634 | ||
635 | err = mmc_send_ext_csd(mmc, ext_csd); | |
636 | ||
637 | if (err) | |
638 | return err; | |
639 | ||
272cc70b AF |
640 | cardtype = ext_csd[196] & 0xf; |
641 | ||
642 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); | |
643 | ||
644 | if (err) | |
645 | return err; | |
646 | ||
647 | /* Now check to see that it worked */ | |
648 | err = mmc_send_ext_csd(mmc, ext_csd); | |
649 | ||
650 | if (err) | |
651 | return err; | |
652 | ||
653 | /* No high-speed support */ | |
654 | if (!ext_csd[185]) | |
655 | return 0; | |
656 | ||
657 | /* High Speed is set, there are two types: 52MHz and 26MHz */ | |
658 | if (cardtype & MMC_HS_52MHZ) | |
659 | mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; | |
660 | else | |
661 | mmc->card_caps |= MMC_MODE_HS; | |
662 | ||
663 | return 0; | |
664 | } | |
665 | ||
bc897b1d LW |
666 | int mmc_switch_part(int dev_num, unsigned int part_num) |
667 | { | |
668 | struct mmc *mmc = find_mmc_device(dev_num); | |
669 | ||
670 | if (!mmc) | |
671 | return -1; | |
672 | ||
673 | return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, | |
674 | (mmc->part_config & ~PART_ACCESS_MASK) | |
675 | | (part_num & PART_ACCESS_MASK)); | |
676 | } | |
677 | ||
272cc70b AF |
678 | int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) |
679 | { | |
680 | struct mmc_cmd cmd; | |
681 | struct mmc_data data; | |
682 | ||
683 | /* Switch the frequency */ | |
684 | cmd.cmdidx = SD_CMD_SWITCH_FUNC; | |
685 | cmd.resp_type = MMC_RSP_R1; | |
686 | cmd.cmdarg = (mode << 31) | 0xffffff; | |
687 | cmd.cmdarg &= ~(0xf << (group * 4)); | |
688 | cmd.cmdarg |= value << (group * 4); | |
689 | cmd.flags = 0; | |
690 | ||
691 | data.dest = (char *)resp; | |
692 | data.blocksize = 64; | |
693 | data.blocks = 1; | |
694 | data.flags = MMC_DATA_READ; | |
695 | ||
696 | return mmc_send_cmd(mmc, &cmd, &data); | |
697 | } | |
698 | ||
699 | ||
700 | int sd_change_freq(struct mmc *mmc) | |
701 | { | |
702 | int err; | |
703 | struct mmc_cmd cmd; | |
704 | uint scr[2]; | |
705 | uint switch_status[16]; | |
706 | struct mmc_data data; | |
707 | int timeout; | |
708 | ||
709 | mmc->card_caps = 0; | |
710 | ||
d52ebf10 TC |
711 | if (mmc_host_is_spi(mmc)) |
712 | return 0; | |
713 | ||
272cc70b AF |
714 | /* Read the SCR to find out if this card supports higher speeds */ |
715 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
716 | cmd.resp_type = MMC_RSP_R1; | |
717 | cmd.cmdarg = mmc->rca << 16; | |
718 | cmd.flags = 0; | |
719 | ||
720 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
721 | ||
722 | if (err) | |
723 | return err; | |
724 | ||
725 | cmd.cmdidx = SD_CMD_APP_SEND_SCR; | |
726 | cmd.resp_type = MMC_RSP_R1; | |
727 | cmd.cmdarg = 0; | |
728 | cmd.flags = 0; | |
729 | ||
730 | timeout = 3; | |
731 | ||
732 | retry_scr: | |
733 | data.dest = (char *)&scr; | |
734 | data.blocksize = 8; | |
735 | data.blocks = 1; | |
736 | data.flags = MMC_DATA_READ; | |
737 | ||
738 | err = mmc_send_cmd(mmc, &cmd, &data); | |
739 | ||
740 | if (err) { | |
741 | if (timeout--) | |
742 | goto retry_scr; | |
743 | ||
744 | return err; | |
745 | } | |
746 | ||
4e3d89ba YK |
747 | mmc->scr[0] = __be32_to_cpu(scr[0]); |
748 | mmc->scr[1] = __be32_to_cpu(scr[1]); | |
272cc70b AF |
749 | |
750 | switch ((mmc->scr[0] >> 24) & 0xf) { | |
751 | case 0: | |
752 | mmc->version = SD_VERSION_1_0; | |
753 | break; | |
754 | case 1: | |
755 | mmc->version = SD_VERSION_1_10; | |
756 | break; | |
757 | case 2: | |
758 | mmc->version = SD_VERSION_2; | |
759 | break; | |
760 | default: | |
761 | mmc->version = SD_VERSION_1_0; | |
762 | break; | |
763 | } | |
764 | ||
b44c7083 AS |
765 | if (mmc->scr[0] & SD_DATA_4BIT) |
766 | mmc->card_caps |= MMC_MODE_4BIT; | |
767 | ||
272cc70b AF |
768 | /* Version 1.0 doesn't support switching */ |
769 | if (mmc->version == SD_VERSION_1_0) | |
770 | return 0; | |
771 | ||
772 | timeout = 4; | |
773 | while (timeout--) { | |
774 | err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, | |
775 | (u8 *)&switch_status); | |
776 | ||
777 | if (err) | |
778 | return err; | |
779 | ||
780 | /* The high-speed function is busy. Try again */ | |
4e3d89ba | 781 | if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) |
272cc70b AF |
782 | break; |
783 | } | |
784 | ||
272cc70b | 785 | /* If high-speed isn't supported, we return */ |
4e3d89ba | 786 | if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) |
272cc70b AF |
787 | return 0; |
788 | ||
789 | err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)&switch_status); | |
790 | ||
791 | if (err) | |
792 | return err; | |
793 | ||
4e3d89ba | 794 | if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) |
272cc70b AF |
795 | mmc->card_caps |= MMC_MODE_HS; |
796 | ||
797 | return 0; | |
798 | } | |
799 | ||
800 | /* frequency bases */ | |
801 | /* divided by 10 to be nice to platforms without floating point */ | |
5f837c2c | 802 | static const int fbase[] = { |
272cc70b AF |
803 | 10000, |
804 | 100000, | |
805 | 1000000, | |
806 | 10000000, | |
807 | }; | |
808 | ||
809 | /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice | |
810 | * to platforms without floating point. | |
811 | */ | |
5f837c2c | 812 | static const int multipliers[] = { |
272cc70b AF |
813 | 0, /* reserved */ |
814 | 10, | |
815 | 12, | |
816 | 13, | |
817 | 15, | |
818 | 20, | |
819 | 25, | |
820 | 30, | |
821 | 35, | |
822 | 40, | |
823 | 45, | |
824 | 50, | |
825 | 55, | |
826 | 60, | |
827 | 70, | |
828 | 80, | |
829 | }; | |
830 | ||
831 | void mmc_set_ios(struct mmc *mmc) | |
832 | { | |
833 | mmc->set_ios(mmc); | |
834 | } | |
835 | ||
836 | void mmc_set_clock(struct mmc *mmc, uint clock) | |
837 | { | |
838 | if (clock > mmc->f_max) | |
839 | clock = mmc->f_max; | |
840 | ||
841 | if (clock < mmc->f_min) | |
842 | clock = mmc->f_min; | |
843 | ||
844 | mmc->clock = clock; | |
845 | ||
846 | mmc_set_ios(mmc); | |
847 | } | |
848 | ||
849 | void mmc_set_bus_width(struct mmc *mmc, uint width) | |
850 | { | |
851 | mmc->bus_width = width; | |
852 | ||
853 | mmc_set_ios(mmc); | |
854 | } | |
855 | ||
856 | int mmc_startup(struct mmc *mmc) | |
857 | { | |
858 | int err; | |
859 | uint mult, freq; | |
639b7827 | 860 | u64 cmult, csize, capacity; |
272cc70b | 861 | struct mmc_cmd cmd; |
d23e2c09 | 862 | char ext_csd[512]; |
5d4fc8d9 | 863 | int timeout = 1000; |
272cc70b | 864 | |
d52ebf10 TC |
865 | #ifdef CONFIG_MMC_SPI_CRC_ON |
866 | if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ | |
867 | cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; | |
868 | cmd.resp_type = MMC_RSP_R1; | |
869 | cmd.cmdarg = 1; | |
870 | cmd.flags = 0; | |
871 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
872 | ||
873 | if (err) | |
874 | return err; | |
875 | } | |
876 | #endif | |
877 | ||
272cc70b | 878 | /* Put the Card in Identify Mode */ |
d52ebf10 TC |
879 | cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : |
880 | MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ | |
272cc70b AF |
881 | cmd.resp_type = MMC_RSP_R2; |
882 | cmd.cmdarg = 0; | |
883 | cmd.flags = 0; | |
884 | ||
885 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
886 | ||
887 | if (err) | |
888 | return err; | |
889 | ||
890 | memcpy(mmc->cid, cmd.response, 16); | |
891 | ||
892 | /* | |
893 | * For MMC cards, set the Relative Address. | |
894 | * For SD cards, get the Relatvie Address. | |
895 | * This also puts the cards into Standby State | |
896 | */ | |
d52ebf10 TC |
897 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
898 | cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; | |
899 | cmd.cmdarg = mmc->rca << 16; | |
900 | cmd.resp_type = MMC_RSP_R6; | |
901 | cmd.flags = 0; | |
272cc70b | 902 | |
d52ebf10 | 903 | err = mmc_send_cmd(mmc, &cmd, NULL); |
272cc70b | 904 | |
d52ebf10 TC |
905 | if (err) |
906 | return err; | |
272cc70b | 907 | |
d52ebf10 TC |
908 | if (IS_SD(mmc)) |
909 | mmc->rca = (cmd.response[0] >> 16) & 0xffff; | |
910 | } | |
272cc70b AF |
911 | |
912 | /* Get the Card-Specific Data */ | |
913 | cmd.cmdidx = MMC_CMD_SEND_CSD; | |
914 | cmd.resp_type = MMC_RSP_R2; | |
915 | cmd.cmdarg = mmc->rca << 16; | |
916 | cmd.flags = 0; | |
917 | ||
918 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
919 | ||
5d4fc8d9 RR |
920 | /* Waiting for the ready status */ |
921 | mmc_send_status(mmc, timeout); | |
922 | ||
272cc70b AF |
923 | if (err) |
924 | return err; | |
925 | ||
998be3dd RV |
926 | mmc->csd[0] = cmd.response[0]; |
927 | mmc->csd[1] = cmd.response[1]; | |
928 | mmc->csd[2] = cmd.response[2]; | |
929 | mmc->csd[3] = cmd.response[3]; | |
272cc70b AF |
930 | |
931 | if (mmc->version == MMC_VERSION_UNKNOWN) { | |
0b453ffe | 932 | int version = (cmd.response[0] >> 26) & 0xf; |
272cc70b AF |
933 | |
934 | switch (version) { | |
935 | case 0: | |
936 | mmc->version = MMC_VERSION_1_2; | |
937 | break; | |
938 | case 1: | |
939 | mmc->version = MMC_VERSION_1_4; | |
940 | break; | |
941 | case 2: | |
942 | mmc->version = MMC_VERSION_2_2; | |
943 | break; | |
944 | case 3: | |
945 | mmc->version = MMC_VERSION_3; | |
946 | break; | |
947 | case 4: | |
948 | mmc->version = MMC_VERSION_4; | |
949 | break; | |
950 | default: | |
951 | mmc->version = MMC_VERSION_1_2; | |
952 | break; | |
953 | } | |
954 | } | |
955 | ||
956 | /* divide frequency by 10, since the mults are 10x bigger */ | |
0b453ffe RV |
957 | freq = fbase[(cmd.response[0] & 0x7)]; |
958 | mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; | |
272cc70b AF |
959 | |
960 | mmc->tran_speed = freq * mult; | |
961 | ||
998be3dd | 962 | mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); |
272cc70b AF |
963 | |
964 | if (IS_SD(mmc)) | |
965 | mmc->write_bl_len = mmc->read_bl_len; | |
966 | else | |
998be3dd | 967 | mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); |
272cc70b AF |
968 | |
969 | if (mmc->high_capacity) { | |
970 | csize = (mmc->csd[1] & 0x3f) << 16 | |
971 | | (mmc->csd[2] & 0xffff0000) >> 16; | |
972 | cmult = 8; | |
973 | } else { | |
974 | csize = (mmc->csd[1] & 0x3ff) << 2 | |
975 | | (mmc->csd[2] & 0xc0000000) >> 30; | |
976 | cmult = (mmc->csd[2] & 0x00038000) >> 15; | |
977 | } | |
978 | ||
979 | mmc->capacity = (csize + 1) << (cmult + 2); | |
980 | mmc->capacity *= mmc->read_bl_len; | |
981 | ||
982 | if (mmc->read_bl_len > 512) | |
983 | mmc->read_bl_len = 512; | |
984 | ||
985 | if (mmc->write_bl_len > 512) | |
986 | mmc->write_bl_len = 512; | |
987 | ||
988 | /* Select the card, and put it into Transfer Mode */ | |
d52ebf10 TC |
989 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
990 | cmd.cmdidx = MMC_CMD_SELECT_CARD; | |
991 | cmd.resp_type = MMC_RSP_R1b; | |
992 | cmd.cmdarg = mmc->rca << 16; | |
993 | cmd.flags = 0; | |
994 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
272cc70b | 995 | |
d52ebf10 TC |
996 | if (err) |
997 | return err; | |
998 | } | |
272cc70b | 999 | |
e6f99a56 LW |
1000 | /* |
1001 | * For SD, its erase group is always one sector | |
1002 | */ | |
1003 | mmc->erase_grp_size = 1; | |
bc897b1d | 1004 | mmc->part_config = MMCPART_NOAVAILABLE; |
d23e2c09 SG |
1005 | if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { |
1006 | /* check ext_csd version and capacity */ | |
1007 | err = mmc_send_ext_csd(mmc, ext_csd); | |
1008 | if (!err & (ext_csd[192] >= 2)) { | |
639b7827 YS |
1009 | /* |
1010 | * According to the JEDEC Standard, the value of | |
1011 | * ext_csd's capacity is valid if the value is more | |
1012 | * than 2GB | |
1013 | */ | |
1014 | capacity = ext_csd[212] << 0 | ext_csd[213] << 8 | | |
1015 | ext_csd[214] << 16 | ext_csd[215] << 24; | |
1016 | capacity *= 512; | |
b1f1e821 | 1017 | if ((capacity >> 20) > 2 * 1024) |
639b7827 | 1018 | mmc->capacity = capacity; |
d23e2c09 | 1019 | } |
bc897b1d | 1020 | |
e6f99a56 LW |
1021 | /* |
1022 | * Check whether GROUP_DEF is set, if yes, read out | |
1023 | * group size from ext_csd directly, or calculate | |
1024 | * the group size from the csd value. | |
1025 | */ | |
1026 | if (ext_csd[175]) | |
1027 | mmc->erase_grp_size = ext_csd[224] * 512 * 1024; | |
1028 | else { | |
1029 | int erase_gsz, erase_gmul; | |
1030 | erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; | |
1031 | erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; | |
1032 | mmc->erase_grp_size = (erase_gsz + 1) | |
1033 | * (erase_gmul + 1); | |
1034 | } | |
1035 | ||
bc897b1d LW |
1036 | /* store the partition info of emmc */ |
1037 | if (ext_csd[160] & PART_SUPPORT) | |
1038 | mmc->part_config = ext_csd[179]; | |
d23e2c09 SG |
1039 | } |
1040 | ||
272cc70b AF |
1041 | if (IS_SD(mmc)) |
1042 | err = sd_change_freq(mmc); | |
1043 | else | |
1044 | err = mmc_change_freq(mmc); | |
1045 | ||
1046 | if (err) | |
1047 | return err; | |
1048 | ||
1049 | /* Restrict card's capabilities by what the host can do */ | |
1050 | mmc->card_caps &= mmc->host_caps; | |
1051 | ||
1052 | if (IS_SD(mmc)) { | |
1053 | if (mmc->card_caps & MMC_MODE_4BIT) { | |
1054 | cmd.cmdidx = MMC_CMD_APP_CMD; | |
1055 | cmd.resp_type = MMC_RSP_R1; | |
1056 | cmd.cmdarg = mmc->rca << 16; | |
1057 | cmd.flags = 0; | |
1058 | ||
1059 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1060 | if (err) | |
1061 | return err; | |
1062 | ||
1063 | cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; | |
1064 | cmd.resp_type = MMC_RSP_R1; | |
1065 | cmd.cmdarg = 2; | |
1066 | cmd.flags = 0; | |
1067 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1068 | if (err) | |
1069 | return err; | |
1070 | ||
1071 | mmc_set_bus_width(mmc, 4); | |
1072 | } | |
1073 | ||
1074 | if (mmc->card_caps & MMC_MODE_HS) | |
1075 | mmc_set_clock(mmc, 50000000); | |
1076 | else | |
1077 | mmc_set_clock(mmc, 25000000); | |
1078 | } else { | |
1079 | if (mmc->card_caps & MMC_MODE_4BIT) { | |
1080 | /* Set the card to use 4 bit*/ | |
1081 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, | |
1082 | EXT_CSD_BUS_WIDTH, | |
1083 | EXT_CSD_BUS_WIDTH_4); | |
1084 | ||
1085 | if (err) | |
1086 | return err; | |
1087 | ||
1088 | mmc_set_bus_width(mmc, 4); | |
1089 | } else if (mmc->card_caps & MMC_MODE_8BIT) { | |
1090 | /* Set the card to use 8 bit*/ | |
1091 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, | |
1092 | EXT_CSD_BUS_WIDTH, | |
1093 | EXT_CSD_BUS_WIDTH_8); | |
1094 | ||
1095 | if (err) | |
1096 | return err; | |
1097 | ||
1098 | mmc_set_bus_width(mmc, 8); | |
1099 | } | |
1100 | ||
1101 | if (mmc->card_caps & MMC_MODE_HS) { | |
1102 | if (mmc->card_caps & MMC_MODE_HS_52MHz) | |
1103 | mmc_set_clock(mmc, 52000000); | |
1104 | else | |
1105 | mmc_set_clock(mmc, 26000000); | |
1106 | } else | |
1107 | mmc_set_clock(mmc, 20000000); | |
1108 | } | |
1109 | ||
1110 | /* fill in device description */ | |
1111 | mmc->block_dev.lun = 0; | |
1112 | mmc->block_dev.type = 0; | |
1113 | mmc->block_dev.blksz = mmc->read_bl_len; | |
9b1f942c | 1114 | mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); |
0b453ffe RV |
1115 | sprintf(mmc->block_dev.vendor, "Man %06x Snr %08x", mmc->cid[0] >> 8, |
1116 | (mmc->cid[2] << 8) | (mmc->cid[3] >> 24)); | |
1117 | sprintf(mmc->block_dev.product, "%c%c%c%c%c", mmc->cid[0] & 0xff, | |
1118 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, | |
1119 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff); | |
1120 | sprintf(mmc->block_dev.revision, "%d.%d", mmc->cid[2] >> 28, | |
1121 | (mmc->cid[2] >> 24) & 0xf); | |
272cc70b AF |
1122 | init_part(&mmc->block_dev); |
1123 | ||
1124 | return 0; | |
1125 | } | |
1126 | ||
1127 | int mmc_send_if_cond(struct mmc *mmc) | |
1128 | { | |
1129 | struct mmc_cmd cmd; | |
1130 | int err; | |
1131 | ||
1132 | cmd.cmdidx = SD_CMD_SEND_IF_COND; | |
1133 | /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ | |
1134 | cmd.cmdarg = ((mmc->voltages & 0xff8000) != 0) << 8 | 0xaa; | |
1135 | cmd.resp_type = MMC_RSP_R7; | |
1136 | cmd.flags = 0; | |
1137 | ||
1138 | err = mmc_send_cmd(mmc, &cmd, NULL); | |
1139 | ||
1140 | if (err) | |
1141 | return err; | |
1142 | ||
998be3dd | 1143 | if ((cmd.response[0] & 0xff) != 0xaa) |
272cc70b AF |
1144 | return UNUSABLE_ERR; |
1145 | else | |
1146 | mmc->version = SD_VERSION_2; | |
1147 | ||
1148 | return 0; | |
1149 | } | |
1150 | ||
1151 | int mmc_register(struct mmc *mmc) | |
1152 | { | |
1153 | /* Setup the universal parts of the block interface just once */ | |
1154 | mmc->block_dev.if_type = IF_TYPE_MMC; | |
1155 | mmc->block_dev.dev = cur_dev_num++; | |
1156 | mmc->block_dev.removable = 1; | |
1157 | mmc->block_dev.block_read = mmc_bread; | |
1158 | mmc->block_dev.block_write = mmc_bwrite; | |
e6f99a56 | 1159 | mmc->block_dev.block_erase = mmc_berase; |
8feafcc4 JR |
1160 | if (!mmc->b_max) |
1161 | mmc->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; | |
272cc70b AF |
1162 | |
1163 | INIT_LIST_HEAD (&mmc->link); | |
1164 | ||
1165 | list_add_tail (&mmc->link, &mmc_devices); | |
1166 | ||
1167 | return 0; | |
1168 | } | |
1169 | ||
df3fc526 | 1170 | #ifdef CONFIG_PARTITIONS |
272cc70b AF |
1171 | block_dev_desc_t *mmc_get_dev(int dev) |
1172 | { | |
1173 | struct mmc *mmc = find_mmc_device(dev); | |
1174 | ||
e85649c7 | 1175 | return mmc ? &mmc->block_dev : NULL; |
272cc70b | 1176 | } |
df3fc526 | 1177 | #endif |
272cc70b AF |
1178 | |
1179 | int mmc_init(struct mmc *mmc) | |
1180 | { | |
1181 | int err; | |
1182 | ||
bc897b1d LW |
1183 | if (mmc->has_init) |
1184 | return 0; | |
1185 | ||
272cc70b AF |
1186 | err = mmc->init(mmc); |
1187 | ||
1188 | if (err) | |
1189 | return err; | |
1190 | ||
b86b85e2 IY |
1191 | mmc_set_bus_width(mmc, 1); |
1192 | mmc_set_clock(mmc, 1); | |
1193 | ||
272cc70b AF |
1194 | /* Reset the Card */ |
1195 | err = mmc_go_idle(mmc); | |
1196 | ||
1197 | if (err) | |
1198 | return err; | |
1199 | ||
bc897b1d LW |
1200 | /* The internal partition reset to user partition(0) at every CMD0*/ |
1201 | mmc->part_num = 0; | |
1202 | ||
272cc70b AF |
1203 | /* Test for SD version 2 */ |
1204 | err = mmc_send_if_cond(mmc); | |
1205 | ||
272cc70b AF |
1206 | /* Now try to get the SD card's operating condition */ |
1207 | err = sd_send_op_cond(mmc); | |
1208 | ||
1209 | /* If the command timed out, we check for an MMC card */ | |
1210 | if (err == TIMEOUT) { | |
1211 | err = mmc_send_op_cond(mmc); | |
1212 | ||
1213 | if (err) { | |
1214 | printf("Card did not respond to voltage select!\n"); | |
1215 | return UNUSABLE_ERR; | |
1216 | } | |
1217 | } | |
1218 | ||
bc897b1d LW |
1219 | err = mmc_startup(mmc); |
1220 | if (err) | |
1221 | mmc->has_init = 0; | |
1222 | else | |
1223 | mmc->has_init = 1; | |
1224 | return err; | |
272cc70b AF |
1225 | } |
1226 | ||
1227 | /* | |
1228 | * CPU and board-specific MMC initializations. Aliased function | |
1229 | * signals caller to move on | |
1230 | */ | |
1231 | static int __def_mmc_init(bd_t *bis) | |
1232 | { | |
1233 | return -1; | |
1234 | } | |
1235 | ||
f9a109b3 PT |
1236 | int cpu_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); |
1237 | int board_mmc_init(bd_t *bis) __attribute__((weak, alias("__def_mmc_init"))); | |
272cc70b AF |
1238 | |
1239 | void print_mmc_devices(char separator) | |
1240 | { | |
1241 | struct mmc *m; | |
1242 | struct list_head *entry; | |
1243 | ||
1244 | list_for_each(entry, &mmc_devices) { | |
1245 | m = list_entry(entry, struct mmc, link); | |
1246 | ||
1247 | printf("%s: %d", m->name, m->block_dev.dev); | |
1248 | ||
1249 | if (entry->next != &mmc_devices) | |
1250 | printf("%c ", separator); | |
1251 | } | |
1252 | ||
1253 | printf("\n"); | |
1254 | } | |
1255 | ||
ea6ebe21 LW |
1256 | int get_mmc_num(void) |
1257 | { | |
1258 | return cur_dev_num; | |
1259 | } | |
1260 | ||
272cc70b AF |
1261 | int mmc_initialize(bd_t *bis) |
1262 | { | |
1263 | INIT_LIST_HEAD (&mmc_devices); | |
1264 | cur_dev_num = 0; | |
1265 | ||
1266 | if (board_mmc_init(bis) < 0) | |
1267 | cpu_mmc_init(bis); | |
1268 | ||
1269 | print_mmc_devices(','); | |
1270 | ||
1271 | return 0; | |
1272 | } |