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Commit | Line | Data |
---|---|---|
e85390dc WD |
1 | /* |
2 | * COM1 NS16550 support | |
a47a12be | 3 | * originally from linux source (arch/powerpc/boot/ns16550.c) |
6d0f6bcf | 4 | * modified to use CONFIG_SYS_ISA_MEM and new defines |
e85390dc WD |
5 | */ |
6 | ||
fa54eb12 | 7 | #include <common.h> |
12e431b2 SG |
8 | #include <dm.h> |
9 | #include <errno.h> | |
10 | #include <fdtdec.h> | |
0eb25b61 | 11 | #include <mapmem.h> |
e85390dc | 12 | #include <ns16550.h> |
12e431b2 | 13 | #include <serial.h> |
a1b322a9 | 14 | #include <watchdog.h> |
167cdad1 GR |
15 | #include <linux/types.h> |
16 | #include <asm/io.h> | |
e85390dc | 17 | |
12e431b2 SG |
18 | DECLARE_GLOBAL_DATA_PTR; |
19 | ||
200779e3 DZ |
20 | #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ |
21 | #define UART_MCRVAL (UART_MCR_DTR | \ | |
22 | UART_MCR_RTS) /* RTS/DTR */ | |
23 | #define UART_FCRVAL (UART_FCR_FIFO_EN | \ | |
24 | UART_FCR_RXSR | \ | |
25 | UART_FCR_TXSR) /* Clear & enable FIFOs */ | |
12e431b2 SG |
26 | |
27 | #ifndef CONFIG_DM_SERIAL | |
167cdad1 | 28 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
f8df9d0d SG |
29 | #define serial_out(x, y) outb(x, (ulong)y) |
30 | #define serial_in(y) inb((ulong)y) | |
79df1208 | 31 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0) |
f8df9d0d SG |
32 | #define serial_out(x, y) out_be32(y, x) |
33 | #define serial_in(y) in_be32(y) | |
79df1208 | 34 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0) |
f8df9d0d SG |
35 | #define serial_out(x, y) out_le32(y, x) |
36 | #define serial_in(y) in_le32(y) | |
167cdad1 | 37 | #else |
f8df9d0d SG |
38 | #define serial_out(x, y) writeb(x, y) |
39 | #define serial_in(y) readb(y) | |
167cdad1 | 40 | #endif |
12e431b2 | 41 | #endif /* !CONFIG_DM_SERIAL */ |
e85390dc | 42 | |
7c387646 | 43 | #if defined(CONFIG_SOC_KEYSTONE) |
ef509b90 VA |
44 | #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 |
45 | #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) | |
d57dee57 KM |
46 | #undef UART_MCRVAL |
47 | #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL | |
48 | #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) | |
49 | #else | |
50 | #define UART_MCRVAL (UART_MCR_RTS) | |
51 | #endif | |
ef509b90 VA |
52 | #endif |
53 | ||
a160ea0b PW |
54 | #ifndef CONFIG_SYS_NS16550_IER |
55 | #define CONFIG_SYS_NS16550_IER 0x00 | |
56 | #endif /* CONFIG_SYS_NS16550_IER */ | |
57 | ||
12e431b2 | 58 | #ifdef CONFIG_DM_SERIAL |
12e431b2 | 59 | |
363e6da1 | 60 | static inline void serial_out_shift(void *addr, int shift, int value) |
76571674 | 61 | { |
12e431b2 | 62 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
1f77690e | 63 | outb(value, (ulong)addr); |
12e431b2 SG |
64 | #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) |
65 | out_le32(addr, value); | |
66 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) | |
67 | out_be32(addr, value); | |
90914008 SG |
68 | #elif defined(CONFIG_SYS_NS16550_MEM32) |
69 | writel(value, addr); | |
12e431b2 | 70 | #elif defined(CONFIG_SYS_BIG_ENDIAN) |
76571674 | 71 | writeb(value, addr + (1 << shift) - 1); |
12e431b2 SG |
72 | #else |
73 | writeb(value, addr); | |
74 | #endif | |
75 | } | |
76 | ||
363e6da1 | 77 | static inline int serial_in_shift(void *addr, int shift) |
12e431b2 | 78 | { |
12e431b2 | 79 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
1f77690e | 80 | return inb((ulong)addr); |
12e431b2 SG |
81 | #elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) |
82 | return in_le32(addr); | |
83 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) | |
84 | return in_be32(addr); | |
90914008 SG |
85 | #elif defined(CONFIG_SYS_NS16550_MEM32) |
86 | return readl(addr); | |
12e431b2 | 87 | #elif defined(CONFIG_SYS_BIG_ENDIAN) |
20379c11 | 88 | return readb(addr + (1 << shift) - 1); |
12e431b2 SG |
89 | #else |
90 | return readb(addr); | |
91 | #endif | |
92 | } | |
93 | ||
76571674 SG |
94 | static void ns16550_writeb(NS16550_t port, int offset, int value) |
95 | { | |
96 | struct ns16550_platdata *plat = port->plat; | |
97 | unsigned char *addr; | |
98 | ||
99 | offset *= 1 << plat->reg_shift; | |
100 | addr = map_sysmem(plat->base, 0) + offset; | |
101 | /* | |
102 | * As far as we know it doesn't make sense to support selection of | |
103 | * these options at run-time, so use the existing CONFIG options. | |
104 | */ | |
105 | serial_out_shift(addr, plat->reg_shift, value); | |
106 | } | |
107 | ||
108 | static int ns16550_readb(NS16550_t port, int offset) | |
109 | { | |
110 | struct ns16550_platdata *plat = port->plat; | |
111 | unsigned char *addr; | |
112 | ||
113 | offset *= 1 << plat->reg_shift; | |
114 | addr = map_sysmem(plat->base, 0) + offset; | |
115 | ||
116 | return serial_in_shift(addr, plat->reg_shift); | |
117 | } | |
118 | ||
12e431b2 SG |
119 | /* We can clean these up once everything is moved to driver model */ |
120 | #define serial_out(value, addr) \ | |
363e6da1 SG |
121 | ns16550_writeb(com_port, \ |
122 | (unsigned char *)addr - (unsigned char *)com_port, value) | |
12e431b2 | 123 | #define serial_in(addr) \ |
363e6da1 SG |
124 | ns16550_readb(com_port, \ |
125 | (unsigned char *)addr - (unsigned char *)com_port) | |
12e431b2 SG |
126 | #endif |
127 | ||
21d00436 | 128 | static inline int calc_divisor(NS16550_t port, int clock, int baudrate) |
fa54eb12 SG |
129 | { |
130 | const unsigned int mode_x_div = 16; | |
131 | ||
21d00436 SG |
132 | return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); |
133 | } | |
134 | ||
135 | int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) | |
136 | { | |
fa54eb12 SG |
137 | #ifdef CONFIG_OMAP1510 |
138 | /* If can't cleanly clock 115200 set div to 1 */ | |
139 | if ((clock == 12000000) && (baudrate == 115200)) { | |
140 | port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */ | |
141 | return 1; /* return 1 for base divisor */ | |
142 | } | |
143 | port->osc_12m_sel = 0; /* clear if previsouly set */ | |
144 | #endif | |
145 | ||
21d00436 | 146 | return calc_divisor(port, clock, baudrate); |
fa54eb12 SG |
147 | } |
148 | ||
8bbe33c8 SG |
149 | static void NS16550_setbrg(NS16550_t com_port, int baud_divisor) |
150 | { | |
151 | serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); | |
152 | serial_out(baud_divisor & 0xff, &com_port->dll); | |
153 | serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); | |
154 | serial_out(UART_LCRVAL, &com_port->lcr); | |
155 | } | |
156 | ||
f8df9d0d | 157 | void NS16550_init(NS16550_t com_port, int baud_divisor) |
e85390dc | 158 | { |
956a8bae GG |
159 | #if (defined(CONFIG_SPL_BUILD) && \ |
160 | (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX))) | |
fd2aeac5 | 161 | /* |
956a8bae GG |
162 | * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode |
163 | * before SPL starts only THRE bit is set. We have to empty the | |
164 | * transmitter before initialization starts. | |
fd2aeac5 MH |
165 | */ |
166 | if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) | |
167 | == UART_LSR_THRE) { | |
12e431b2 SG |
168 | if (baud_divisor != -1) |
169 | NS16550_setbrg(com_port, baud_divisor); | |
fd2aeac5 MH |
170 | serial_out(0, &com_port->mdr1); |
171 | } | |
172 | #endif | |
173 | ||
cb55b332 SW |
174 | while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT)) |
175 | ; | |
176 | ||
a160ea0b | 177 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
456ccfdf TR |
178 | #if defined(CONFIG_OMAP) || defined(CONFIG_AM33XX) || \ |
179 | defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) | |
167cdad1 | 180 | serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ |
945af8d7 | 181 | #endif |
167cdad1 GR |
182 | serial_out(UART_MCRVAL, &com_port->mcr); |
183 | serial_out(UART_FCRVAL, &com_port->fcr); | |
12e431b2 SG |
184 | if (baud_divisor != -1) |
185 | NS16550_setbrg(com_port, baud_divisor); | |
8ac22a60 | 186 | #if defined(CONFIG_OMAP) || \ |
6213a68f | 187 | defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \ |
9ed6e412 | 188 | defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) |
5289e83a | 189 | |
f8df9d0d SG |
190 | /* /16 is proper to hit 115200 with 48MHz */ |
191 | serial_out(0, &com_port->mdr1); | |
b4746d8b | 192 | #endif /* CONFIG_OMAP */ |
7c387646 | 193 | #if defined(CONFIG_SOC_KEYSTONE) |
ef509b90 VA |
194 | serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); |
195 | #endif | |
e85390dc WD |
196 | } |
197 | ||
f5675aa5 | 198 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
f8df9d0d | 199 | void NS16550_reinit(NS16550_t com_port, int baud_divisor) |
e85390dc | 200 | { |
a160ea0b | 201 | serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); |
8bbe33c8 | 202 | NS16550_setbrg(com_port, 0); |
167cdad1 GR |
203 | serial_out(UART_MCRVAL, &com_port->mcr); |
204 | serial_out(UART_FCRVAL, &com_port->fcr); | |
8bbe33c8 | 205 | NS16550_setbrg(com_port, baud_divisor); |
e85390dc | 206 | } |
f5675aa5 | 207 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |
e85390dc | 208 | |
f8df9d0d | 209 | void NS16550_putc(NS16550_t com_port, char c) |
e85390dc | 210 | { |
f8df9d0d SG |
211 | while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0) |
212 | ; | |
167cdad1 | 213 | serial_out(c, &com_port->thr); |
1a2d9b30 SR |
214 | |
215 | /* | |
216 | * Call watchdog_reset() upon newline. This is done here in putc | |
217 | * since the environment code uses a single puts() to print the complete | |
218 | * environment upon "printenv". So we can't put this watchdog call | |
219 | * in puts(). | |
220 | */ | |
221 | if (c == '\n') | |
222 | WATCHDOG_RESET(); | |
e85390dc WD |
223 | } |
224 | ||
f5675aa5 | 225 | #ifndef CONFIG_NS16550_MIN_FUNCTIONS |
f8df9d0d | 226 | char NS16550_getc(NS16550_t com_port) |
e85390dc | 227 | { |
167cdad1 | 228 | while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) { |
f2041388 | 229 | #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY) |
232c150a WD |
230 | extern void usbtty_poll(void); |
231 | usbtty_poll(); | |
232 | #endif | |
a1b322a9 | 233 | WATCHDOG_RESET(); |
232c150a | 234 | } |
167cdad1 | 235 | return serial_in(&com_port->rbr); |
e85390dc WD |
236 | } |
237 | ||
f8df9d0d | 238 | int NS16550_tstc(NS16550_t com_port) |
e85390dc | 239 | { |
f8df9d0d | 240 | return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; |
e85390dc WD |
241 | } |
242 | ||
f5675aa5 | 243 | #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ |
12e431b2 | 244 | |
21d00436 SG |
245 | #ifdef CONFIG_DEBUG_UART_NS16550 |
246 | ||
247 | #include <debug_uart.h> | |
248 | ||
249 | void debug_uart_init(void) | |
250 | { | |
251 | struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; | |
252 | int baud_divisor; | |
253 | ||
254 | /* | |
255 | * We copy the code from above because it is already horribly messy. | |
256 | * Trying to refactor to nicely remove the duplication doesn't seem | |
257 | * feasible. The better fix is to move all users of this driver to | |
258 | * driver model. | |
259 | */ | |
260 | baud_divisor = calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, | |
261 | CONFIG_BAUDRATE); | |
dd0b0122 SG |
262 | serial_out_shift(&com_port->ier, CONFIG_DEBUG_UART_SHIFT, |
263 | CONFIG_SYS_NS16550_IER); | |
264 | serial_out_shift(&com_port->mcr, CONFIG_DEBUG_UART_SHIFT, UART_MCRVAL); | |
265 | serial_out_shift(&com_port->fcr, CONFIG_DEBUG_UART_SHIFT, UART_FCRVAL); | |
266 | ||
267 | serial_out_shift(&com_port->lcr, CONFIG_DEBUG_UART_SHIFT, | |
268 | UART_LCR_BKSE | UART_LCRVAL); | |
269 | serial_out_shift(&com_port->dll, CONFIG_DEBUG_UART_SHIFT, | |
270 | baud_divisor & 0xff); | |
271 | serial_out_shift(&com_port->dlm, CONFIG_DEBUG_UART_SHIFT, | |
272 | (baud_divisor >> 8) & 0xff); | |
273 | serial_out_shift(&com_port->lcr, CONFIG_DEBUG_UART_SHIFT, | |
274 | UART_LCRVAL); | |
21d00436 SG |
275 | } |
276 | ||
277 | static inline void _debug_uart_putc(int ch) | |
278 | { | |
279 | struct NS16550 *com_port = (struct NS16550 *)CONFIG_DEBUG_UART_BASE; | |
280 | ||
281 | while (!(serial_in_shift(&com_port->lsr, 0) & UART_LSR_THRE)) | |
282 | ; | |
dd0b0122 | 283 | serial_out_shift(&com_port->thr, CONFIG_DEBUG_UART_SHIFT, ch); |
21d00436 SG |
284 | } |
285 | ||
286 | DEBUG_UART_FUNCS | |
287 | ||
288 | #endif | |
289 | ||
12e431b2 SG |
290 | #ifdef CONFIG_DM_SERIAL |
291 | static int ns16550_serial_putc(struct udevice *dev, const char ch) | |
292 | { | |
293 | struct NS16550 *const com_port = dev_get_priv(dev); | |
294 | ||
295 | if (!(serial_in(&com_port->lsr) & UART_LSR_THRE)) | |
296 | return -EAGAIN; | |
297 | serial_out(ch, &com_port->thr); | |
298 | ||
299 | /* | |
300 | * Call watchdog_reset() upon newline. This is done here in putc | |
301 | * since the environment code uses a single puts() to print the complete | |
302 | * environment upon "printenv". So we can't put this watchdog call | |
303 | * in puts(). | |
304 | */ | |
305 | if (ch == '\n') | |
306 | WATCHDOG_RESET(); | |
307 | ||
308 | return 0; | |
309 | } | |
310 | ||
311 | static int ns16550_serial_pending(struct udevice *dev, bool input) | |
312 | { | |
313 | struct NS16550 *const com_port = dev_get_priv(dev); | |
314 | ||
315 | if (input) | |
316 | return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0; | |
317 | else | |
318 | return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1; | |
319 | } | |
320 | ||
321 | static int ns16550_serial_getc(struct udevice *dev) | |
322 | { | |
323 | struct NS16550 *const com_port = dev_get_priv(dev); | |
324 | ||
aea2be20 | 325 | if (!(serial_in(&com_port->lsr) & UART_LSR_DR)) |
12e431b2 SG |
326 | return -EAGAIN; |
327 | ||
328 | return serial_in(&com_port->rbr); | |
329 | } | |
330 | ||
331 | static int ns16550_serial_setbrg(struct udevice *dev, int baudrate) | |
332 | { | |
333 | struct NS16550 *const com_port = dev_get_priv(dev); | |
334 | struct ns16550_platdata *plat = com_port->plat; | |
335 | int clock_divisor; | |
336 | ||
337 | clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate); | |
338 | ||
339 | NS16550_setbrg(com_port, clock_divisor); | |
340 | ||
341 | return 0; | |
342 | } | |
343 | ||
344 | int ns16550_serial_probe(struct udevice *dev) | |
345 | { | |
346 | struct NS16550 *const com_port = dev_get_priv(dev); | |
347 | ||
11c1a878 | 348 | com_port->plat = dev_get_platdata(dev); |
12e431b2 SG |
349 | NS16550_init(com_port, -1); |
350 | ||
351 | return 0; | |
352 | } | |
353 | ||
11c1a878 | 354 | #ifdef CONFIG_OF_CONTROL |
12e431b2 SG |
355 | int ns16550_serial_ofdata_to_platdata(struct udevice *dev) |
356 | { | |
12e431b2 SG |
357 | struct ns16550_platdata *plat = dev->platdata; |
358 | fdt_addr_t addr; | |
359 | ||
3db886a5 | 360 | /* try Processor Local Bus device first */ |
12e431b2 | 361 | addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); |
3db886a5 BM |
362 | #ifdef CONFIG_PCI |
363 | if (addr == FDT_ADDR_T_NONE) { | |
364 | /* then try pci device */ | |
365 | struct fdt_pci_addr pci_addr; | |
366 | u32 bar; | |
367 | int ret; | |
368 | ||
369 | /* we prefer to use a memory-mapped register */ | |
370 | ret = fdtdec_get_pci_addr(gd->fdt_blob, dev->of_offset, | |
371 | FDT_PCI_SPACE_MEM32, "reg", | |
372 | &pci_addr); | |
373 | if (ret) { | |
374 | /* try if there is any i/o-mapped register */ | |
375 | ret = fdtdec_get_pci_addr(gd->fdt_blob, | |
376 | dev->of_offset, | |
377 | FDT_PCI_SPACE_IO, | |
378 | "reg", &pci_addr); | |
379 | if (ret) | |
380 | return ret; | |
381 | } | |
382 | ||
383 | ret = fdtdec_get_pci_bar32(gd->fdt_blob, dev->of_offset, | |
384 | &pci_addr, &bar); | |
385 | if (ret) | |
386 | return ret; | |
387 | ||
388 | addr = bar; | |
389 | } | |
390 | #endif | |
391 | ||
12e431b2 SG |
392 | if (addr == FDT_ADDR_T_NONE) |
393 | return -EINVAL; | |
394 | ||
167efe01 | 395 | plat->base = addr; |
12e431b2 SG |
396 | plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset, |
397 | "reg-shift", 1); | |
12e431b2 SG |
398 | |
399 | return 0; | |
400 | } | |
11c1a878 | 401 | #endif |
12e431b2 SG |
402 | |
403 | const struct dm_serial_ops ns16550_serial_ops = { | |
404 | .putc = ns16550_serial_putc, | |
405 | .pending = ns16550_serial_pending, | |
406 | .getc = ns16550_serial_getc, | |
407 | .setbrg = ns16550_serial_setbrg, | |
408 | }; | |
409 | #endif /* CONFIG_DM_SERIAL */ |