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Add support for WTK FO300 board (TQM5200 based).
[people/ms/u-boot.git] / include / configs / TQM5200.h
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56523f12 1/*
8f0b7cbe 2 * (C) Copyright 2003-2005
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3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
45a212c4 5 * (C) Copyright 2004-2006
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6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
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30/*
31 * High Level Configuration Options
32 * (easy to change)
33 */
34
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35#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
36#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
37#define CONFIG_TQM5200 1 /* ... on TQM5200 module */
38#undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
56523f12 39
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40/* On a Cameron board or on a FO300 board or ... */
41#if !defined(CONFIG_CAM5200) && !defined(CONFIG_FO300)
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42#define CONFIG_STK52XX 1 /* ... on a STK52XX board */
43#endif
44
45#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
56523f12 46
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47#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
48#define BOOTFLAG_WARM 0x02 /* Software reboot */
56523f12 49
5078cce8 50#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
56523f12 51#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
5078cce8 52# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
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53#endif
54
55/*
56 * Serial console configuration
57 */
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58#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
59#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
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60#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
61
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62#ifdef CONFIG_FO300
63#define CFG_DEVICE_NULLDEV 1 /* enable null device */
64#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
65#define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
66
67#if 0
68#define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
69 /* switch is closed */
70#endif
71
72#undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
73 /* switch is open */
74#endif
75
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76#ifdef CONFIG_STK52XX
77#define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
78#define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
79#define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
80#define CONFIG_PS2MULT_DELAY (CFG_HZ/2) /* Initial delay */
81#define CONFIG_BOARD_EARLY_INIT_R
82#endif /* CONFIG_STK52XX */
56523f12 83
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84/*
85 * PCI Mapping:
86 * 0x40000000 - 0x4fffffff - PCI Memory
87 * 0x50000000 - 0x50ffffff - PCI IO Space
88 */
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89#ifdef CONFIG_STK52XX
90#define CONFIG_PCI 1
56523f12 91#define CONFIG_PCI_PNP 1
31a64923 92/* #define CONFIG_PCI_SCAN_SHOW 1 */
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93
94#define CONFIG_PCI_MEM_BUS 0x40000000
95#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
96#define CONFIG_PCI_MEM_SIZE 0x10000000
97
98#define CONFIG_PCI_IO_BUS 0x50000000
99#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
100#define CONFIG_PCI_IO_SIZE 0x01000000
101
102#define CONFIG_NET_MULTI 1
cd65a3dc 103#define CONFIG_EEPRO100 1
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104#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
105#define CONFIG_NS8382X 1
83e40ba7 106#endif /* CONFIG_STK52XX */
56523f12 107
8f0b7cbe 108#ifdef CONFIG_PCI
7e6bf358 109#define ADD_PCI_CMD CFG_CMD_PCI
8f0b7cbe 110#else
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111#define ADD_PCI_CMD 0
112#endif
56523f12 113
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114/*
115 * Video console
116 */
5078cce8 117#ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
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118#define CONFIG_VIDEO
119#define CONFIG_VIDEO_SM501
120#define CONFIG_VIDEO_SM501_32BPP
121#define CONFIG_CFB_CONSOLE
122#define CONFIG_VIDEO_LOGO
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123
124#ifndef CONFIG_FO300
8f0b7cbe 125#define CONFIG_CONSOLE_EXTRA_INFO
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126#else
127#define CONFIG_VIDEO_BMP_LOGO
128#endif
129
130#define CONFIG_VGA_AS_SINGLE_DEVICE
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131#define CONFIG_VIDEO_SW_CURSOR
132#define CONFIG_SPLASH_SCREEN
83e40ba7 133#define CFG_CONSOLE_IS_IN_ENV
6d3bc9b8 134#endif /* #ifndef CONFIG_TQM5200S */
56523f12 135
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136#ifdef CONFIG_VIDEO
137#define ADD_BMP_CMD CFG_CMD_BMP
138#else
139#define ADD_BMP_CMD 0
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140#endif
141
142/* Partitions */
89c02e2c 143#define CONFIG_MAC_PARTITION
56523f12 144#define CONFIG_DOS_PARTITION
8f0b7cbe 145#define CONFIG_ISO_PARTITION
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146
147/* USB */
6d3bc9b8 148#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
56523f12 149#define CONFIG_USB_OHCI
81050926 150#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
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151#define CONFIG_USB_STORAGE
152#else
81050926 153#define ADD_USB_CMD 0
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154#endif
155
135ae006 156#ifndef CONFIG_CAM5200
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157/* POST support */
158#define CONFIG_POST (CFG_POST_MEMORY | \
159 CFG_POST_CPU | \
160 CFG_POST_I2C)
5078cce8 161#endif
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162
163#ifdef CONFIG_POST
164#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
165/* preserve space for the post_word at end of on-chip SRAM */
166#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
167#else
168#define CFG_CMD_POST_DIAG 0
169#endif
170
171/* IDE */
6d3bc9b8 172#if defined (CONFIG_MINIFAP) || defined (CONFIG_STK52XX) || defined(CONFIG_FO300)
151ab83a 173#define ADD_IDE_CMD (CFG_CMD_IDE | CFG_CMD_FAT | CFG_CMD_EXT2)
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174#else
175#define ADD_IDE_CMD 0
176#endif
177
178/*
179 * Supported commands
180 */
181#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
8f0b7cbe 182 ADD_BMP_CMD | \
151ab83a 183 ADD_IDE_CMD | \
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184 ADD_PCI_CMD | \
185 ADD_USB_CMD | \
151ab83a 186 CFG_CMD_ASKENV | \
56523f12 187 CFG_CMD_DATE | \
151ab83a 188 CFG_CMD_DHCP | \
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189 CFG_CMD_EEPROM | \
190 CFG_CMD_I2C | \
d534f5cc 191 CFG_CMD_JFFS2 | \
56523f12 192 CFG_CMD_MII | \
414eec35 193 CFG_CMD_NFS | \
56523f12 194 CFG_CMD_PING | \
151ab83a 195 CFG_CMD_POST_DIAG | \
414eec35 196 CFG_CMD_REGINFO | \
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197 CFG_CMD_SNTP | \
198 CFG_CMD_BSP)
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199
200/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
201#include <cmd_confdefs.h>
202
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203#define CONFIG_TIMESTAMP /* display image timestamps */
204
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205#if (TEXT_BASE != 0xFFF00000)
206# define CFG_LOWBOOT 1 /* Boot low */
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207#endif
208
209/*
210 * Autobooting
211 */
212#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
213
81050926 214#define CONFIG_PREBOOT "echo;" \
4c4aca81 215 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
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216 "echo"
217
218#undef CONFIG_BOOTARGS
219
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220#ifdef CONFIG_STK52XX
221# if defined(CONFIG_TQM5200_B)
222# if defined(CFG_LOWBOOT)
223# define ENV_UPDT \
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224 "update=protect off FC000000 FC07FFFF;" \
225 "erase FC000000 FC07FFFF;" \
226 "cp.b 200000 FC000000 ${filesize};" \
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227 "protect on FC000000 FC07FFFF\0"
228# else /* highboot */
229# define ENV_UPDT \
230 "update=protect off FFF00000 FFF7FFFF;" \
231 "erase FFF00000 FFF7FFFF;" \
232 "cp.b 200000 FFF00000 ${filesize};" \
233 "protect on FFF00000 FFF7FFFF\0"
234# endif /* CFG_LOWBOOT */
235# else /* !CONFIG_TQM5200_B */
236# define ENV_UPDT \
237 "update=protect off FC000000 FC05FFFF;" \
238 "erase FC000000 FC05FFFF;" \
239 "cp.b 200000 FC000000 ${filesize};" \
240 "protect on FC000000 FC05FFFF\0"
241# endif /* CONFIG_TQM5200_B */
135ae006 242#elif defined (CONFIG_CAM5200)
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243# define ENV_UPDT \
244 "update=protect off FC000000 FC03FFFF;" \
245 "erase FC000000 FC03FFFF;" \
246 "cp.b 200000 FC000000 ${filesize};" \
247 "protect on FC000000 FC03FFFF\0"
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248#elif defined (CONFIG_FO300)
249# define ENV_UPDT \
250 "update=protect off FC000000 FC05FFFF;" \
251 "erase FC000000 FC05FFFF;" \
252 "cp.b 200000 FC000000 ${filesize};" \
253 "protect on FC000000 FC05FFFF\0"
45a212c4 254#else
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255# error "Unknown Carrier Board"
256#endif /* CONFIG_STK52XX */
257
81050926 258#define CONFIG_EXTRA_ENV_SETTINGS \
56523f12 259 "netdev=eth0\0" \
89c02e2c 260 "rootpath=/opt/eldk/ppc_6xx\0" \
56523f12 261 "ramargs=setenv bootargs root=/dev/ram rw\0" \
56523f12 262 "nfsargs=setenv bootargs root=/dev/nfs rw " \
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263 "nfsroot=${serverip}:${rootpath}\0" \
264 "addip=setenv bootargs ${bootargs} " \
265 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
266 ":${hostname}:${netdev}:off panic=1\0" \
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267 "addcons=setenv bootargs ${bootargs} " \
268 "console=ttyS0,${baudrate}\0" \
269 "flash_self=run ramargs addip addcons;" \
fe126d8b 270 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
5078cce8 271 "flash_nfs=run nfsargs addip addcons;" \
fe126d8b 272 "bootm ${kernel_addr}\0" \
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273 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
274 "bootm\0" \
89c02e2c 275 "bootfile=/tftpboot/tqm5200/uImage\0" \
cd65a3dc 276 "u-boot=/tftpboot/tqm5200/u-boot.bin\0" \
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277 "load=tftp 200000 ${u-boot}\0" \
278 ENV_UPDT \
7e6bf358 279 ""
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280
281#define CONFIG_BOOTCOMMAND "run net_nfs"
282
283/*
284 * IPB Bus clocking configuration.
285 */
81050926 286#define CFG_IPBSPEED_133 /* define for 133MHz speed */
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287
288#if defined(CFG_IPBSPEED_133)
289/*
290 * PCI Bus clocking configuration
291 *
292 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
293 * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
294 * been tested with a IPB Bus Clock of 66 MHz.
295 */
296#define CFG_PCISPEED_66 /* define for 66MHz speed */
297#endif
298
299/*
300 * I2C configuration
301 */
302#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
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303#ifdef CONFIG_TQM5200_REV100
304#define CFG_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
56523f12 305#else
8f0b7cbe 306#define CFG_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
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307#endif
308
309/*
310 * I2C clock frequency
311 *
312 * Please notice, that the resulting clock frequency could differ from the
313 * configured value. This is because the I2C clock is derived from system
314 * clock over a frequency divider with only a few divider values. U-boot
315 * calculates the best approximation for CFG_I2C_SPEED. However the calculated
316 * approximation allways lies below the configured value, never above.
317 */
318#define CFG_I2C_SPEED 100000 /* 100 kHz */
319#define CFG_I2C_SLAVE 0x7F
320
321/*
322 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
323 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
324 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
325 * same configuration could be used.
326 */
327#define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */
328#define CFG_I2C_EEPROM_ADDR_LEN 2
329#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
330#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
331
332/*
333 * HW-Monitor configuration on Mini-FAP
334 */
335#if defined (CONFIG_MINIFAP)
336#define CFG_I2C_HWMON_ADDR 0x2C
337#endif
338
339/* List of I2C addresses to be verified by POST */
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340#if defined (CONFIG_MINIFAP)
341#undef I2C_ADDR_LIST
342#define I2C_ADDR_LIST { CFG_I2C_EEPROM_ADDR, \
343 CFG_I2C_HWMON_ADDR, \
344 CFG_I2C_SLAVE }
345#endif
346
347/*
348 * Flash configuration
349 */
978b1096 350#define CFG_FLASH_BASE 0xFC000000
56523f12 351
45a212c4 352/* use CFI flash driver */
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353#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
354#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
355#define CFG_FLASH_BANKS_LIST { CFG_BOOTCS_START }
356#define CFG_FLASH_EMPTY_INFO
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357#define CFG_FLASH_SIZE 0x04000000 /* 64 MByte */
358#define CFG_MAX_FLASH_SECT 512 /* max num of sects on one chip */
f3e06df7 359#define CFG_FLASH_USE_BUFFER_WRITE 1
56523f12 360
135ae006 361#if defined (CONFIG_CAM5200)
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362# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00040000)
363#elif defined(CONFIG_TQM5200_B)
364# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00080000)
45a212c4 365#else
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366# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x00060000)
367#endif
368
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369#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks
370 (= chip selects) */
56523f12 371
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372/* Dynamic MTD partition support */
373#define CONFIG_JFFS2_CMDLINE
374#define MTDIDS_DEFAULT "nor0=TQM5200-0"
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375
376#ifdef CONFIG_STK52XX
377# if defined(CONFIG_TQM5200_B)
378# if defined(CFG_LOWBOOT)
379# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:1m(firmware)," \
380 "1536k(kernel)," \
381 "3584k(small-fs)," \
45a212c4 382 "2m(initrd)," \
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383 "8m(misc)," \
384 "16m(big-fs)"
385# else /* highboot */
386# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:2560k(kernel)," \
387 "3584k(small-fs)," \
388 "2m(initrd)," \
389 "8m(misc)," \
390 "15m(big-fs)," \
391 "1m(firmware)"
392# endif /* CFG_LOWBOOT */
393# else /* !CONFIG_TQM5200_B */
394# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
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395 "1408k(kernel)," \
396 "2m(initrd)," \
397 "4m(small-fs)," \
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398 "8m(misc)," \
399 "16m(big-fs)"
400# endif /* CONFIG_TQM5200_B */
135ae006 401#elif defined (CONFIG_CAM5200)
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402# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:768k(firmware)," \
403 "1792k(kernel)," \
404 "3584k(small-fs)," \
405 "2m(initrd)," \
406 "8m(misc)," \
407 "16m(big-fs)"
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408#elif defined (CONFIG_FO300)
409# define MTDPARTS_DEFAULT "mtdparts=TQM5200-0:640k(firmware)," \
410 "1408k(kernel)," \
411 "2m(initrd)," \
412 "4m(small-fs)," \
413 "8m(misc)," \
414 "16m(big-fs)"
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415#else
416# error "Unknown Carrier Board"
417#endif /* CONFIG_STK52XX */
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418
419/*
420 * Environment settings
421 */
422#define CFG_ENV_IS_IN_FLASH 1
5078cce8 423#define CFG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
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424#if defined(CONFIG_TQM5200_B)
425#define CFG_ENV_SECT_SIZE 0x40000
426#else
56523f12 427#define CFG_ENV_SECT_SIZE 0x20000
5078cce8 428#endif /* CONFIG_TQM5200_B */
89c02e2c 429#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
45a212c4 430#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
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431
432/*
433 * Memory map
434 */
435#define CFG_MBAR 0xF0000000
436#define CFG_SDRAM_BASE 0x00000000
437#define CFG_DEFAULT_MBAR 0x80000000
438
439/* Use ON-Chip SRAM until RAM will be available */
440#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
441#ifdef CONFIG_POST
442/* preserve space for the post_word at end of on-chip SRAM */
443#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
444#else
445#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
446#endif
447
448
449#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
450#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
451#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
452
89c02e2c 453#define CFG_MONITOR_BASE TEXT_BASE
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454#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
455# define CFG_RAMBOOT 1
456#endif
457
135ae006 458#if defined (CONFIG_CAM5200)
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459# define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
460#elif defined(CONFIG_TQM5200_B)
461# define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
45a212c4 462#else
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463# define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
464#endif
465
466#define CFG_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
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467#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
468
469/*
470 * Ethernet configuration
471 */
472#define CONFIG_MPC5xxx_FEC 1
473/*
474 * Define CONFIG_FEC_10MBIT to force FEC at 10Mb
475 */
476/* #define CONFIG_FEC_10MBIT 1 */
477#define CONFIG_PHY_ADDR 0x00
478
479/*
480 * GPIO configuration
481 *
482 * use pin gpio_wkup_6 as second SDRAM chip select (mem_cs1):
483 * Bit 0 (mask: 0x80000000): 1
484 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
8f0b7cbe 485 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
8f0b7cbe 486 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
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487 * Use for REV200 STK52XX boards and FO300 boards. Do not use
488 * with REV100 modules (because, there I2C1 is used as I2C bus)
56523f12 489 * use PSC1 as UART: Bits 28-31 (mask: 0x00000007): 0100
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490 * use PSC2 as CAN: Bits 25:27 (mask: 0x00000030)
491 * 000 -> All PSC2 pins are GIOPs
492 * 001 -> CAN1/2 on PSC2 pins
493 * Use for REV100 STK52xx boards
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494 * 01x -> Use AC97
495 * use PSC3: Bits 20-23 (mask: 0x00000f00)
496 * 1100 -> UART/SPI (on FO300 board)
7e6bf358 497 * use PSC6:
6d3bc9b8 498 * on STK52xx and FO300:
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499 * use as UART. Pins PSC6_0 to PSC6_3 are used.
500 * Bits 9:11 (mask: 0x00700000):
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501 * 101 -> PSC6 : Extended POST test is not available
502 * on MINI-FAP and TQM5200_IB:
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503 * use PSC6_0 to PSC6_3 as GPIO: Bits 9:11 (mask: 0x00700000):
504 * 000 -> PSC6 could not be used as UART, CODEC or IrDA
505 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to enable extended POST
506 * tests.
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507 */
508#if defined (CONFIG_MINIFAP)
8f0b7cbe 509# define CFG_GPS_PORT_CONFIG 0x91000004
7e6bf358 510#elif defined (CONFIG_STK52XX)
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511# if defined (CONFIG_STK52XX_REV100)
512# define CFG_GPS_PORT_CONFIG 0x81500014
513# else /* STK52xx REV200 and above */
514# if defined (CONFIG_TQM5200_REV100)
515# error TQM5200 REV100 not supported on STK52XX REV200 or above
516# else/* TQM5200 REV200 and above */
517# define CFG_GPS_PORT_CONFIG 0x91500004
518# endif
8f0b7cbe 519# endif
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520#elif defined (CONFIG_FO300)
521# define CFG_GPS_PORT_CONFIG 0x91502c24
83e40ba7 522#else /* TMQ5200 Inbetriebnahme-Board */
8f0b7cbe 523# define CFG_GPS_PORT_CONFIG 0x81000004
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524#endif
525
526/*
527 * RTC configuration
528 */
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529#if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
530# define CONFIG_RTC_M41T11 1
531# define CFG_I2C_RTC_ADDR 0x68
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532# define CFG_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
533 year */
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534#else
535# define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
536#endif
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537
538/*
539 * Miscellaneous configurable options
540 */
541#define CFG_LONGHELP /* undef to save memory */
542#define CFG_PROMPT "=> " /* Monitor Command Prompt */
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543
544#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
545#define CFG_PROMPT_HUSH_PS2 "> "
546
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547#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
548#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
549#else
550#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
551#endif
552#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
553#define CFG_MAXARGS 16 /* max number of command args */
554#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
555
556/* Enable an alternate, more extensive memory test */
557#define CFG_ALT_MEMTEST
558
559#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
560#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
561
562#define CFG_LOAD_ADDR 0x100000 /* default load address */
563
564#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
565
566/*
567 * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
568 * which is normally part of the default commands (CFV_CMD_DFL)
569 */
570#define CONFIG_LOOPW
571
572/*
573 * Various low-level settings
574 */
575#if defined(CONFIG_MPC5200)
576#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
577#define CFG_HID0_FINAL HID0_ICE
578#else
579#define CFG_HID0_INIT 0
580#define CFG_HID0_FINAL 0
581#endif
582
583#define CFG_BOOTCS_START CFG_FLASH_BASE
584#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
585#ifdef CFG_PCISPEED_66
586#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
587#else
588#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
589#endif
590#define CFG_CS0_START CFG_FLASH_BASE
591#define CFG_CS0_SIZE CFG_FLASH_SIZE
592
7e6bf358 593#define CONFIG_LAST_STAGE_INIT
7e6bf358 594
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595/*
596 * SRAM - Do not map below 2 GB in address space, because this area is used
597 * for SDRAM autosizing.
598 */
56523f12 599#define CFG_CS2_START 0xE5000000
7e6bf358 600#define CFG_CS2_SIZE 0x100000 /* 1 MByte */
56523f12 601#define CFG_CS2_CFG 0x0004D930
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602
603/*
604 * Grafic controller - Do not map below 2 GB in address space, because this
605 * area is used for SDRAM autosizing.
606 */
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607#define SM501_FB_BASE 0xE0000000
608#define CFG_CS1_START (SM501_FB_BASE)
56523f12 609#define CFG_CS1_SIZE 0x4000000 /* 64 MByte */
89394047 610#define CFG_CS1_CFG 0x8F48FF70
56523f12 611#define SM501_MMIO_BASE CFG_CS1_START + 0x03E00000
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612
613#define CFG_CS_BURST 0x00000000
8f0b7cbe 614#define CFG_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
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615
616#define CFG_RESET_ADDRESS 0xff000000
617
618/*-----------------------------------------------------------------------
619 * USB stuff
620 *-----------------------------------------------------------------------
621 */
622#define CONFIG_USB_CLOCK 0x0001BBBB
623#define CONFIG_USB_CONFIG 0x00001000
624
625/*-----------------------------------------------------------------------
626 * IDE/ATA stuff Supports IDE harddisk
627 *-----------------------------------------------------------------------
628 */
629
81050926 630#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
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632#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
633#undef CONFIG_IDE_LED /* LED for ide not supported */
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81050926 635#define CONFIG_IDE_RESET /* reset for ide supported */
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636#define CONFIG_IDE_PREINIT
637
638#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
8f0b7cbe 639#define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
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640
641#define CFG_ATA_IDE0_OFFSET 0x0000
642
643#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
644
645/* Offset for data I/O */
646#define CFG_ATA_DATA_OFFSET (0x0060)
647
648/* Offset for normal register accesses */
649#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
650
651/* Offset for alternate registers */
652#define CFG_ATA_ALT_OFFSET (0x005C)
653
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654/* Interval between registers */
655#define CFG_ATA_STRIDE 4
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656
657#endif /* __CONFIG_H */