[people/ms/u-boot.git] / include / configs / VCMA9.h

/*
 * (C) Copyright 2002
 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Marius Groeger <mgroeger@sysgo.de>
 * Gary Jennejohn <gj@denx.de>
 * David Mueller <d.mueller@elsoft.ch>
 *
 * Configuation settings for the MPL VCMA9 board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/*
 * If we are developing, we might want to start armboot from ram
 * so we MUST NOT initialize critical regs like mem-timing ...
 */
#define CONFIG_INIT_CRITICAL		/* undef for developing */

/*
 * High Level Configuration Options
 * (easy to change)
 */
#define CONFIG_ARM920T		1	/* This is an ARM920T Core	*/
#define	CONFIG_S3C2410		1	/* in a SAMSUNG S3C2410 SoC     */
#define CONFIG_VCMA9		1	/* on a MPL VCMA9 Board  */

/* input clock of PLL */
#define CONFIG_SYS_CLK_FREQ	12000000/* VCMA9 has 12MHz input clock	*/

#define USE_920T_MMU		1
#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/

#define CONFIG_CMDLINE_TAG	 1	/* enable passing of ATAGs    	*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG	 1

/***********************************************************
 * Command definition
 ***********************************************************/
#define CONFIG_COMMANDS \
			(CONFIG_CMD_DFL	 | \
			CFG_CMD_CACHE	 | \
			CFG_CMD_EEPROM	 | \
			CFG_CMD_I2C	 | \
			CFG_CMD_REGINFO  | \
			CFG_CMD_ELF	 | \
			CFG_CMD_BSP)

/* this must be included after the definiton of CONFIG_COMMANDS */
#include <cmd_confdefs.h>

#define CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
/***********************************************************
 * I2C stuff:
 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
 * address 0x50 with 16bit addressing
 ***********************************************************/
#define CONFIG_HARD_I2C			/* I2C with hardware support */
#define CFG_I2C_SPEED 		100000	/* I2C speed */
#define CFG_I2C_SLAVE 		0x7F	/* I2C slave addr */

#define CFG_I2C_EEPROM_ADDR	0x50
#define CFG_I2C_EEPROM_ADDR_LEN	2
#define CFG_ENV_IS_IN_EEPROM	1	/* use EEPROM for environment vars */
#define CFG_ENV_OFFSET		0x000	/* environment starts at offset 0 */
#define CFG_ENV_SIZE		0x800	/* 2KB should be more than enough */

#undef CFG_I2C_EEPROM_ADDR_OVERFLOW
#define CFG_EEPROM_PAGE_WRITE_BITS 6	/* 64 bytes page write mode on 24C256 */
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10

/*
 * Size of malloc() pool
 */
#define CONFIG_MALLOC_SIZE	(CFG_ENV_SIZE + 128*1024)

#define CFG_MONITOR_LEN		(256 * 1024)
#define CFG_MALLOC_LEN		(128 * 1024)

/*
 * Hardware drivers
 */
#define CONFIG_DRIVER_CS8900	1		/* we have a CS8900 on-board */
#define CS8900_BASE		0x20000300
#define CS8900_BUS16		1 		/* the Linux driver does accesses as shorts */

#define CONFIG_DRIVER_S3C24X0_I2C	1	/* we use the buildin I2C controller */

/*
 * select serial console configuration
 */
#define CONFIG_SERIAL1          1	/* we use SERIAL 1 on VCMA9 */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE

#define CONFIG_BAUDRATE		9600

#define CONFIG_BOOTDELAY	3
#define CONFIG_NETMASK          255.255.255.0
#define CONFIG_IPADDR		10.0.0.110
#define CONFIG_SERVERIP		10.0.0.1

#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE	115200		/* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX	1		/* which serial port to use */
#endif

/*
 * Miscellaneous configurable options
 */
#define	CFG_LONGHELP				/* undef to save memory		*/
#define	CFG_PROMPT		"VCMA9 # "	/* Monitor Command Prompt	*/
#define	CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define	CFG_MAXARGS		16		/* max number of command args	*/
#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/

#define CFG_MEMTEST_START	0x30000000	/* memtest works on	*/
#define CFG_MEMTEST_END		0x33F00000	/* 63 MB in DRAM	*/
#define CFG_ALT_MEMTEST
#define	CFG_LOAD_ADDR		0x33000000	/* default load address	*/


#undef  CFG_CLKS_IN_HZ		/* everything, incl board info, in Hz */

/* we configure PWM Timer 4 to 1us ~ 1MHz */
/*#define	CFG_HZ			1000000 */
#define	CFG_HZ			1562500

/* valid baudrates */
#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }

/*-----------------------------------------------------------------------
 * Stack sizes
 *
 * The stack sizes are set up in start.S using the settings below
 */
#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */
#ifdef CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */
#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */
#endif

/*-----------------------------------------------------------------------
 * Physical Memory Map
 */
#define CONFIG_NR_DRAM_BANKS	1	   /* we have 1 bank of DRAM */
#define PHYS_SDRAM_1		0x30000000 /* SDRAM Bank #1 */
#define PHYS_SDRAM_1_SIZE	0x04000000 /* 64 MB */

#define PHYS_FLASH_1		0x00000000 /* Flash Bank #1 */

#define CFG_FLASH_BASE		PHYS_FLASH_1

/*-----------------------------------------------------------------------
 * FLASH and environment organization
 */

#define CONFIG_AMD_LV400	1	/* uncomment this if you have a LV400 flash */
#if 0
#define CONFIG_AMD_LV800	1	/* uncomment this if you have a LV800 flash */
#endif

#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
#ifdef CONFIG_AMD_LV800
#define PHYS_FLASH_SIZE		0x00100000 /* 1MB */
#define CFG_MAX_FLASH_SECT	(19)	/* max number of sectors on one chip */
#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
#endif
#ifdef CONFIG_AMD_LV400
#define PHYS_FLASH_SIZE		0x00080000 /* 512KB */
#define CFG_MAX_FLASH_SECT	(11)	/* max number of sectors on one chip */
#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x070000) /* addr of environment */
#endif

/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT	(5*CFG_HZ) /* Timeout for Flash Erase */
#define CFG_FLASH_WRITE_TOUT	(5*CFG_HZ) /* Timeout for Flash Write */

#if 0
#define	CFG_ENV_IS_IN_FLASH	1
#define CFG_ENV_SIZE		0x10000	/* Total Size of Environment Sector */
#endif

#define MULTI_PURPOSE_SOCKET_ADDR 0

#endif	/* __CONFIG_H */
Commit	Line	Data
1cb8e980 WD	1	/*
	2	* (C) Copyright 2002
	3	* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
	4	* Marius Groeger <mgroeger@sysgo.de>
	5	* Gary Jennejohn <gj@denx.de>
	6	* David Mueller <d.mueller@elsoft.ch>
	7	*
	8	* Configuation settings for the MPL VCMA9 board.
	9	*
	10	* See file CREDITS for list of people who contributed to this
	11	* project.
	12	*
	13	* This program is free software; you can redistribute it and/or
	14	* modify it under the terms of the GNU General Public License as
	15	* published by the Free Software Foundation; either version 2 of
	16	* the License, or (at your option) any later version.
	17	*
	18	* This program is distributed in the hope that it will be useful,
	19	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	20	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	21	* GNU General Public License for more details.
	22	*
	23	* You should have received a copy of the GNU General Public License
	24	* along with this program; if not, write to the Free Software
	25	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	26	* MA 02111-1307 USA
	27	*/
	28
	29	#ifndef __CONFIG_H
	30	#define __CONFIG_H
	31
	32	/*
	33	* If we are developing, we might want to start armboot from ram
	34	* so we MUST NOT initialize critical regs like mem-timing ...
	35	*/
	36	#define CONFIG_INIT_CRITICAL /* undef for developing */
	37
	38	/*
	39	* High Level Configuration Options
	40	* (easy to change)
	41	*/
	42	#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
	43	#define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */
	44	#define CONFIG_VCMA9 1 /* on a MPL VCMA9 Board */
	45
	46	/* input clock of PLL */
	47	#define CONFIG_SYS_CLK_FREQ 12000000/* VCMA9 has 12MHz input clock */
	48
	49	#define USE_920T_MMU 1
	50	#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
	51
	52	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	53	#define CONFIG_SETUP_MEMORY_TAGS 1
	54	#define CONFIG_INITRD_TAG 1
	55
	56	/***********************************************************
	57	* Command definition
	58	***********************************************************/
	59	#define CONFIG_COMMANDS \
	60	(CONFIG_CMD_DFL \| \
	61	CFG_CMD_CACHE \| \
	62	CFG_CMD_EEPROM \| \
	63	CFG_CMD_I2C \| \
	64	CFG_CMD_REGINFO \| \
65	CFG_CMD_ELF \| \
66	CFG_CMD_BSP)
67
68	/* this must be included after the definiton of CONFIG_COMMANDS */
69	#include <cmd_confdefs.h>
70
71	#define CFG_HUSH_PARSER
72	#define CFG_PROMPT_HUSH_PS2 "> "
73	/***********************************************************
74	* I2C stuff:
75	* the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
76	* address 0x50 with 16bit addressing
77	***********************************************************/
78	#define CONFIG_HARD_I2C /* I2C with hardware support */
79	#define CFG_I2C_SPEED 100000 /* I2C speed */
80	#define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
81
82	#define CFG_I2C_EEPROM_ADDR 0x50
83	#define CFG_I2C_EEPROM_ADDR_LEN 2
84	#define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
85	#define CFG_ENV_OFFSET 0x000 /* environment starts at offset 0 */
86	#define CFG_ENV_SIZE 0x800 /* 2KB should be more than enough */
87
88	#undef CFG_I2C_EEPROM_ADDR_OVERFLOW
89	#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes page write mode on 24C256 */
90	#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
91
92	/*
93	* Size of malloc() pool
94	*/
95	#define CONFIG_MALLOC_SIZE (CFG_ENV_SIZE + 128*1024)
96
97	#define CFG_MONITOR_LEN (256 * 1024)
98	#define CFG_MALLOC_LEN (128 * 1024)
99
100	/*
101	* Hardware drivers
102	*/
103	#define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
104	#define CS8900_BASE 0x20000300
105	#define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
106
107	#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
108
109	/*
110	* select serial console configuration
111	*/
112	#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
113
114	/* allow to overwrite serial and ethaddr */
115	#define CONFIG_ENV_OVERWRITE
116
117	#define CONFIG_BAUDRATE 9600
118
119	#define CONFIG_BOOTDELAY 3
120	#define CONFIG_NETMASK 255.255.255.0
121	#define CONFIG_IPADDR 10.0.0.110
122	#define CONFIG_SERVERIP 10.0.0.1
123
124	#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
125	#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
126	/* what's this ? it's not used anywhere */
127	#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
128	#endif
129
130	/*
131	* Miscellaneous configurable options
132	*/
133	#define CFG_LONGHELP /* undef to save memory */
134	#define CFG_PROMPT "VCMA9 # " /* Monitor Command Prompt */
135	#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
136	#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
137	#define CFG_MAXARGS 16 /* max number of command args */
138	#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
139
140	#define CFG_MEMTEST_START 0x30000000 /* memtest works on */
141	#define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
142	#define CFG_ALT_MEMTEST
143	#define CFG_LOAD_ADDR 0x33000000 /* default load address */
144
145
146	#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
147
148	/* we configure PWM Timer 4 to 1us ~ 1MHz */
149	/#define CFG_HZ 1000000 /
150	#define CFG_HZ 1562500
151
152	/* valid baudrates */
153	#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
154
155	/*-----------------------------------------------------------------------
156	* Stack sizes
157	*
158	* The stack sizes are set up in start.S using the settings below
159	*/
160	#define CONFIG_STACKSIZE (1281024) / regular stack */
161	#ifdef CONFIG_USE_IRQ
162	#define CONFIG_STACKSIZE_IRQ (41024) / IRQ stack */
163	#define CONFIG_STACKSIZE_FIQ (41024) / FIQ stack */
164	#endif
165
166	/*-----------------------------------------------------------------------
167	* Physical Memory Map
168	*/
169	#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
170	#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
171	#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
172
173	#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
174
175	#define CFG_FLASH_BASE PHYS_FLASH_1
176
177	/*-----------------------------------------------------------------------
178	* FLASH and environment organization
179	*/
180
181	#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
182	#if 0
183	#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
184	#endif
185
186	#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
187	#ifdef CONFIG_AMD_LV800
188	#define PHYS_FLASH_SIZE 0x00100000 /* 1MB */
189	#define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
190	#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
191	#endif
192	#ifdef CONFIG_AMD_LV400
193	#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
194	#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
195	#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr of environment */
196	#endif
197
198	/* timeout values are in ticks */
199	#define CFG_FLASH_ERASE_TOUT (5CFG_HZ) / Timeout for Flash Erase */
200	#define CFG_FLASH_WRITE_TOUT (5CFG_HZ) / Timeout for Flash Write */
201
202	#if 0
203	#define CFG_ENV_IS_IN_FLASH 1
204	#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
205	#endif
206
207	#define MULTI_PURPOSE_SOCKET_ADDR 0
208
209	#endif /* __CONFIG_H */