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5289e83a CN |
1 | /* |
2 | * am335x_evm.h | |
3 | * | |
4 | * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License as | |
8 | * published by the Free Software Foundation version 2. | |
9 | * | |
10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
11 | * kind, whether express or implied; without even the implied warranty | |
12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | */ | |
15 | ||
16 | #ifndef __CONFIG_AM335X_EVM_H | |
17 | #define __CONFIG_AM335X_EVM_H | |
18 | ||
f16da746 | 19 | #define CONFIG_AM33XX |
5289e83a | 20 | |
98f92001 | 21 | #include <asm/arch/omap.h> |
5289e83a | 22 | |
93042960 CN |
23 | #define CONFIG_DMA_COHERENT |
24 | #define CONFIG_DMA_COHERENT_SIZE (1 << 20) | |
25 | ||
7bf038ec TR |
26 | #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ |
27 | #define CONFIG_SYS_MALLOC_LEN (1024 << 10) | |
28 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ | |
29 | #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ | |
750b4bfe | 30 | #define CONFIG_SYS_PROMPT "U-Boot# " |
044fc14b | 31 | #define CONFIG_BOARD_LATE_INIT |
5289e83a | 32 | #define CONFIG_SYS_NO_FLASH |
a88f70b9 | 33 | #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */ |
5289e83a CN |
34 | #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM |
35 | ||
7bf038ec | 36 | #define CONFIG_OF_LIBFDT |
d446c903 | 37 | #define CONFIG_CMD_BOOTZ |
7bf038ec TR |
38 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
39 | #define CONFIG_SETUP_MEMORY_TAGS | |
40 | #define CONFIG_INITRD_TAG | |
41 | ||
559eae1c PA |
42 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
43 | ||
7bf038ec TR |
44 | /* commands to include */ |
45 | #include <config_cmd_default.h> | |
46 | ||
5289e83a CN |
47 | #define CONFIG_CMD_ASKENV |
48 | #define CONFIG_VERSION_VARIABLE | |
49 | ||
50 | /* set to negative value for no autoboot */ | |
3580777b | 51 | #define CONFIG_BOOTDELAY 1 |
044fc14b TR |
52 | #define CONFIG_ENV_VARS_UBOOT_CONFIG |
53 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG | |
a32f42f6 | 54 | #ifndef CONFIG_SPL_BUILD |
5289e83a | 55 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
7bf038ec TR |
56 | "loadaddr=0x80200000\0" \ |
57 | "fdtaddr=0x80F80000\0" \ | |
f170899f | 58 | "fdt_high=0xffffffff\0" \ |
7bf038ec | 59 | "rdaddr=0x81000000\0" \ |
951d5827 KK |
60 | "bootdir=/boot\0" \ |
61 | "bootfile=uImage\0" \ | |
044fc14b | 62 | "fdtfile=\0" \ |
7bf038ec TR |
63 | "console=ttyO0,115200n8\0" \ |
64 | "optargs=\0" \ | |
af5666c8 TR |
65 | "mtdids=" MTDIDS_DEFAULT "\0" \ |
66 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ | |
7bf038ec | 67 | "mmcdev=0\0" \ |
3580777b | 68 | "mmcroot=/dev/mmcblk0p2 ro\0" \ |
7bf038ec | 69 | "mmcrootfstype=ext4 rootwait\0" \ |
73a27a84 | 70 | "bootpart=0:2\0" \ |
73c1f4af CM |
71 | "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \ |
72 | "nandrootfstype=ubifs rootwait=1\0" \ | |
73 | "nandsrcaddr=0x280000\0" \ | |
74 | "nandimgsize=0x500000\0" \ | |
abdd178d CM |
75 | "rootpath=/export/rootfs\0" \ |
76 | "nfsopts=nolock\0" \ | |
77 | "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \ | |
78 | "::off\0" \ | |
7bf038ec TR |
79 | "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \ |
80 | "ramrootfstype=ext2\0" \ | |
81 | "mmcargs=setenv bootargs console=${console} " \ | |
82 | "${optargs} " \ | |
83 | "root=${mmcroot} " \ | |
84 | "rootfstype=${mmcrootfstype}\0" \ | |
73c1f4af CM |
85 | "nandargs=setenv bootargs console=${console} " \ |
86 | "${optargs} " \ | |
87 | "root=${nandroot} " \ | |
88 | "rootfstype=${nandrootfstype}\0" \ | |
63ba7c66 CM |
89 | "spiroot=/dev/mtdblock4 rw\0" \ |
90 | "spirootfstype=jffs2\0" \ | |
91 | "spisrcaddr=0xe0000\0" \ | |
92 | "spiimgsize=0x362000\0" \ | |
93 | "spibusno=0\0" \ | |
94 | "spiargs=setenv bootargs console=${console} " \ | |
95 | "${optargs} " \ | |
96 | "root=${spiroot} " \ | |
97 | "rootfstype=${spirootfstype}\0" \ | |
abdd178d CM |
98 | "netargs=setenv bootargs console=${console} " \ |
99 | "${optargs} " \ | |
100 | "root=/dev/nfs " \ | |
101 | "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ | |
102 | "ip=dhcp\0" \ | |
7bf038ec | 103 | "bootenv=uEnv.txt\0" \ |
73a27a84 | 104 | "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ |
7bf038ec TR |
105 | "importbootenv=echo Importing environment from mmc ...; " \ |
106 | "env import -t $loadaddr $filesize\0" \ | |
107 | "ramargs=setenv bootargs console=${console} " \ | |
108 | "${optargs} " \ | |
109 | "root=${ramroot} " \ | |
110 | "rootfstype=${ramrootfstype}\0" \ | |
73a27a84 | 111 | "loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \ |
951d5827 KK |
112 | "loaduimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ |
113 | "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ | |
7bf038ec TR |
114 | "mmcboot=echo Booting from mmc ...; " \ |
115 | "run mmcargs; " \ | |
951d5827 | 116 | "bootm ${loadaddr} - ${fdtaddr}\0" \ |
73c1f4af CM |
117 | "nandboot=echo Booting from nand ...; " \ |
118 | "run nandargs; " \ | |
119 | "nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \ | |
120 | "bootm ${loadaddr}\0" \ | |
63ba7c66 CM |
121 | "spiboot=echo Booting from spi ...; " \ |
122 | "run spiargs; " \ | |
123 | "sf probe ${spibusno}:0; " \ | |
124 | "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \ | |
125 | "bootm ${loadaddr}\0" \ | |
abdd178d CM |
126 | "netboot=echo Booting from network ...; " \ |
127 | "setenv autoload no; " \ | |
128 | "dhcp; " \ | |
129 | "tftp ${loadaddr} ${bootfile}; " \ | |
951d5827 | 130 | "tftp ${fdtaddr} ${fdtfile}; " \ |
abdd178d | 131 | "run netargs; " \ |
951d5827 | 132 | "bootm ${loadaddr} - ${fdtaddr}\0" \ |
7bf038ec TR |
133 | "ramboot=echo Booting from ramdisk ...; " \ |
134 | "run ramargs; " \ | |
951d5827 | 135 | "bootm ${loadaddr} ${rdaddr} ${fdtaddr}\0" \ |
044fc14b TR |
136 | "findfdt="\ |
137 | "if test $board_name = A335BONE; then " \ | |
138 | "setenv fdtfile am335x-bone.dtb; fi; " \ | |
20775906 KK |
139 | "if test $board_name = A335BNLT; then " \ |
140 | "setenv fdtfile am335x-boneblack.dtb; fi; " \ | |
044fc14b TR |
141 | "if test $board_name = A33515BB; then " \ |
142 | "setenv fdtfile am335x-evm.dtb; fi; " \ | |
143 | "if test $board_name = A335X_SK; then " \ | |
144 | "setenv fdtfile am335x-evmsk.dtb; fi\0" \ | |
7bf038ec | 145 | |
a32f42f6 TR |
146 | #endif |
147 | ||
7bf038ec | 148 | #define CONFIG_BOOTCOMMAND \ |
951d5827 | 149 | "run findfdt; " \ |
66968110 | 150 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
7bf038ec TR |
151 | "echo SD/MMC found on device ${mmcdev};" \ |
152 | "if run loadbootenv; then " \ | |
153 | "echo Loaded environment from ${bootenv};" \ | |
154 | "run importbootenv;" \ | |
155 | "fi;" \ | |
156 | "if test -n $uenvcmd; then " \ | |
157 | "echo Running uenvcmd ...;" \ | |
158 | "run uenvcmd;" \ | |
159 | "fi;" \ | |
160 | "if run loaduimage; then " \ | |
951d5827 | 161 | "run loadfdt;" \ |
7bf038ec TR |
162 | "run mmcboot;" \ |
163 | "fi;" \ | |
73c1f4af CM |
164 | "else " \ |
165 | "run nandboot;" \ | |
7bf038ec | 166 | "fi;" \ |
5289e83a CN |
167 | |
168 | /* Clock Defines */ | |
169 | #define V_OSCK 24000000 /* Clock output from T2 */ | |
750b4bfe | 170 | #define V_SCLK (V_OSCK) |
5289e83a | 171 | |
5289e83a CN |
172 | #define CONFIG_CMD_ECHO |
173 | ||
174 | /* max number of command args */ | |
750b4bfe | 175 | #define CONFIG_SYS_MAXARGS 16 |
5289e83a CN |
176 | |
177 | /* Console I/O Buffer Size */ | |
178 | #define CONFIG_SYS_CBSIZE 512 | |
179 | ||
180 | /* Print Buffer Size */ | |
181 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ | |
182 | + sizeof(CONFIG_SYS_PROMPT) + 16) | |
183 | ||
184 | /* Boot Argument Buffer Size */ | |
185 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
186 | ||
187 | /* | |
188 | * memtest works on 8 MB in DRAM after skipping 32MB from | |
189 | * start addr of ram disk | |
190 | */ | |
191 | #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024)) | |
192 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \ | |
193 | + (8 * 1024 * 1024)) | |
194 | ||
5289e83a CN |
195 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ |
196 | #define CONFIG_SYS_HZ 1000 /* 1ms clock */ | |
197 | ||
876bdd6d CN |
198 | #define CONFIG_MMC |
199 | #define CONFIG_GENERIC_MMC | |
200 | #define CONFIG_OMAP_HSMMC | |
201 | #define CONFIG_CMD_MMC | |
202 | #define CONFIG_DOS_PARTITION | |
203 | #define CONFIG_CMD_FAT | |
204 | #define CONFIG_CMD_EXT2 | |
73a27a84 KK |
205 | #define CONFIG_CMD_EXT4 |
206 | #define CONFIG_CMD_FS_GENERIC | |
876bdd6d | 207 | |
a4a99fff TR |
208 | #define CONFIG_SPI |
209 | #define CONFIG_OMAP3_SPI | |
210 | #define CONFIG_MTD_DEVICE | |
211 | #define CONFIG_SPI_FLASH | |
212 | #define CONFIG_SPI_FLASH_WINBOND | |
213 | #define CONFIG_CMD_SF | |
214 | #define CONFIG_SF_DEFAULT_SPEED (24000000) | |
215 | ||
5289e83a CN |
216 | /* Physical Memory Map */ |
217 | #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ | |
218 | #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ | |
5289e83a CN |
219 | #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ |
220 | ||
221 | #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 | |
41aebf81 | 222 | #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ |
5289e83a CN |
223 | GENERATED_GBL_DATA_SIZE) |
224 | /* Platform/Board specific defs */ | |
5289e83a CN |
225 | #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ |
226 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ | |
227 | #define CONFIG_SYS_HZ 1000 | |
228 | ||
229 | /* NS16550 Configuration */ | |
230 | #define CONFIG_SYS_NS16550 | |
231 | #define CONFIG_SYS_NS16550_SERIAL | |
c3f8318f | 232 | #define CONFIG_SERIAL_MULTI |
5289e83a CN |
233 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
234 | #define CONFIG_SYS_NS16550_CLK (48000000) | |
235 | #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */ | |
c3f8318f AB |
236 | #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ |
237 | #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ | |
238 | #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ | |
239 | #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ | |
240 | #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ | |
5289e83a | 241 | |
b4116ede PR |
242 | /* I2C Configuration */ |
243 | #define CONFIG_I2C | |
244 | #define CONFIG_CMD_I2C | |
245 | #define CONFIG_HARD_I2C | |
246 | #define CONFIG_SYS_I2C_SPEED 100000 | |
247 | #define CONFIG_SYS_I2C_SLAVE 1 | |
d3decdeb | 248 | #define CONFIG_I2C_MULTI_BUS |
b4116ede | 249 | #define CONFIG_DRIVER_OMAP24XX_I2C |
726c05d2 | 250 | #define CONFIG_CMD_EEPROM |
a4a99fff | 251 | #define CONFIG_ENV_EEPROM_IS_ON_I2C |
726c05d2 TR |
252 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ |
253 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 | |
254 | #define CONFIG_SYS_I2C_MULTI_EEPROMS | |
b4116ede | 255 | |
308252ad MV |
256 | #define CONFIG_OMAP_GPIO |
257 | ||
5289e83a CN |
258 | #define CONFIG_BAUDRATE 115200 |
259 | #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \ | |
260 | 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 } | |
261 | ||
c3f8318f | 262 | #define CONFIG_ENV_OVERWRITE 1 |
5289e83a CN |
263 | #define CONFIG_SYS_CONSOLE_INFO_QUIET |
264 | ||
265 | #define CONFIG_ENV_IS_NOWHERE | |
266 | ||
8a8f084e CN |
267 | /* Defines for SPL */ |
268 | #define CONFIG_SPL | |
47f7bcae | 269 | #define CONFIG_SPL_FRAMEWORK |
8a8f084e | 270 | #define CONFIG_SPL_TEXT_BASE 0x402F0400 |
6feb4e9d | 271 | #define CONFIG_SPL_MAX_SIZE (101 * 1024) |
41aebf81 | 272 | #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR |
8a8f084e CN |
273 | |
274 | #define CONFIG_SPL_BSS_START_ADDR 0x80000000 | |
275 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ | |
276 | ||
277 | #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ | |
278 | #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ | |
279 | #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 | |
280 | #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" | |
281 | #define CONFIG_SPL_MMC_SUPPORT | |
282 | #define CONFIG_SPL_FAT_SUPPORT | |
b4116ede | 283 | #define CONFIG_SPL_I2C_SUPPORT |
8a8f084e CN |
284 | |
285 | #define CONFIG_SPL_LIBCOMMON_SUPPORT | |
286 | #define CONFIG_SPL_LIBDISK_SUPPORT | |
287 | #define CONFIG_SPL_LIBGENERIC_SUPPORT | |
288 | #define CONFIG_SPL_SERIAL_SUPPORT | |
16e41c85 | 289 | #define CONFIG_SPL_GPIO_SUPPORT |
763cf0a3 | 290 | #define CONFIG_SPL_YMODEM_SUPPORT |
6feb4e9d IY |
291 | #define CONFIG_SPL_NET_SUPPORT |
292 | #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL" | |
293 | #define CONFIG_SPL_ETH_SUPPORT | |
69916bcf TR |
294 | #define CONFIG_SPL_SPI_SUPPORT |
295 | #define CONFIG_SPL_SPI_FLASH_SUPPORT | |
296 | #define CONFIG_SPL_SPI_LOAD | |
297 | #define CONFIG_SPL_SPI_BUS 0 | |
298 | #define CONFIG_SPL_SPI_CS 0 | |
4adfcd68 | 299 | #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000 |
c0e66793 | 300 | #define CONFIG_SPL_MUSB_NEW_SUPPORT |
65cdd643 | 301 | #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" |
8a8f084e | 302 | |
b4606c6c IY |
303 | #define CONFIG_SPL_BOARD_INIT |
304 | #define CONFIG_SPL_NAND_AM33XX_BCH | |
305 | #define CONFIG_SPL_NAND_SUPPORT | |
79f38777 AA |
306 | #define CONFIG_SPL_NAND_BASE |
307 | #define CONFIG_SPL_NAND_DRIVERS | |
308 | #define CONFIG_SPL_NAND_ECC | |
b4606c6c IY |
309 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
310 | #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ | |
311 | CONFIG_SYS_NAND_PAGE_SIZE) | |
312 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 | |
313 | #define CONFIG_SYS_NAND_OOBSIZE 64 | |
314 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) | |
315 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS | |
316 | #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ | |
317 | 10, 11, 12, 13, 14, 15, 16, 17, \ | |
318 | 18, 19, 20, 21, 22, 23, 24, 25, \ | |
319 | 26, 27, 28, 29, 30, 31, 32, 33, \ | |
320 | 34, 35, 36, 37, 38, 39, 40, 41, \ | |
321 | 42, 43, 44, 45, 46, 47, 48, 49, \ | |
322 | 50, 51, 52, 53, 54, 55, 56, 57, } | |
323 | ||
324 | #define CONFIG_SYS_NAND_ECCSIZE 512 | |
325 | #define CONFIG_SYS_NAND_ECCBYTES 14 | |
326 | ||
327 | #define CONFIG_SYS_NAND_ECCSTEPS 4 | |
328 | #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ | |
329 | CONFIG_SYS_NAND_ECCSTEPS) | |
330 | ||
331 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE | |
332 | ||
333 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 | |
334 | ||
8a8f084e CN |
335 | /* |
336 | * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM | |
337 | * 64 bytes before this address should be set aside for u-boot.img's | |
338 | * header. That is 0x800FFFC0--0x80100000 should not be used for any | |
339 | * other needs. | |
340 | */ | |
341 | #define CONFIG_SYS_TEXT_BASE 0x80800000 | |
342 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 | |
343 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 | |
344 | ||
345 | /* Since SPL did pll and ddr initialization for us, | |
346 | * we don't need to do it twice. | |
347 | */ | |
348 | #ifndef CONFIG_SPL_BUILD | |
349 | #define CONFIG_SKIP_LOWLEVEL_INIT | |
350 | #endif | |
5289e83a | 351 | |
d2aa1154 IY |
352 | /* |
353 | * USB configuration | |
354 | */ | |
355 | #define CONFIG_USB_MUSB_DSPS | |
356 | #define CONFIG_ARCH_MISC_INIT | |
357 | #define CONFIG_MUSB_GADGET | |
358 | #define CONFIG_MUSB_PIO_ONLY | |
359 | #define CONFIG_USB_GADGET_DUALSPEED | |
360 | #define CONFIG_MUSB_HOST | |
361 | #define CONFIG_AM335X_USB0 | |
362 | #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL | |
363 | #define CONFIG_AM335X_USB1 | |
364 | #define CONFIG_AM335X_USB1_MODE MUSB_HOST | |
365 | ||
366 | #ifdef CONFIG_MUSB_HOST | |
367 | #define CONFIG_CMD_USB | |
368 | #define CONFIG_USB_STORAGE | |
369 | #endif | |
370 | ||
371 | #ifdef CONFIG_MUSB_GADGET | |
372 | #define CONFIG_USB_ETHER | |
373 | #define CONFIG_USB_ETH_RNDIS | |
c0e66793 | 374 | #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00" |
d2aa1154 IY |
375 | #endif /* CONFIG_MUSB_GADGET */ |
376 | ||
c0e66793 IY |
377 | #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT) |
378 | /* disable host part of MUSB in SPL */ | |
379 | #undef CONFIG_MUSB_HOST | |
380 | /* | |
98bc1228 | 381 | * Disable CPSW SPL support so we fit within the 101KiB limit. |
c0e66793 IY |
382 | */ |
383 | #undef CONFIG_SPL_ETH_SUPPORT | |
c0e66793 IY |
384 | #endif |
385 | ||
4adfcd68 TR |
386 | /* |
387 | * Default to using SPI for environment, etc. We have multiple copies | |
388 | * of SPL as the ROM will check these locations. | |
389 | * 0x0 - 0x20000 : First copy of SPL | |
390 | * 0x20000 - 0x40000 : Second copy of SPL | |
391 | * 0x40000 - 0x60000 : Third copy of SPL | |
392 | * 0x60000 - 0x80000 : Fourth copy of SPL | |
393 | * 0x80000 - 0xDF000 : U-Boot | |
394 | * 0xDF000 - 0xE0000 : U-Boot Environment | |
395 | * 0xE0000 - 0x442000 : Linux Kernel | |
396 | * 0x442000 - 0x800000 : Userland | |
397 | */ | |
398 | #if defined(CONFIG_SPI_BOOT) | |
399 | # undef CONFIG_ENV_IS_NOWHERE | |
400 | # define CONFIG_ENV_IS_IN_SPI_FLASH | |
401 | # define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED | |
402 | # define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */ | |
403 | # define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */ | |
404 | #endif /* SPI support */ | |
405 | ||
d2aa1154 IY |
406 | /* Unsupported features */ |
407 | #undef CONFIG_USE_IRQ | |
408 | ||
93042960 CN |
409 | #define CONFIG_CMD_NET |
410 | #define CONFIG_CMD_DHCP | |
411 | #define CONFIG_CMD_PING | |
412 | #define CONFIG_DRIVER_TI_CPSW | |
413 | #define CONFIG_MII | |
414 | #define CONFIG_BOOTP_DEFAULT | |
415 | #define CONFIG_BOOTP_DNS | |
416 | #define CONFIG_BOOTP_DNS2 | |
417 | #define CONFIG_BOOTP_SEND_HOSTNAME | |
418 | #define CONFIG_BOOTP_GATEWAY | |
419 | #define CONFIG_BOOTP_SUBNETMASK | |
420 | #define CONFIG_NET_RETRY_COUNT 10 | |
421 | #define CONFIG_NET_MULTI | |
422 | #define CONFIG_PHY_GIGE | |
423 | #define CONFIG_PHYLIB | |
cdd0729e | 424 | #define CONFIG_PHY_ADDR 0 |
c44080b2 | 425 | #define CONFIG_PHY_SMSC |
93042960 | 426 | |
98b5c269 IY |
427 | #define CONFIG_NAND |
428 | /* NAND support */ | |
429 | #ifdef CONFIG_NAND | |
430 | #define CONFIG_CMD_NAND | |
af5666c8 TR |
431 | #define CONFIG_CMD_MTDPARTS |
432 | #define MTDIDS_DEFAULT "nand0=omap2-nand.0" | |
433 | #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:128k(SPL)," \ | |
434 | "128k(SPL.backup1)," \ | |
435 | "128k(SPL.backup2)," \ | |
436 | "128k(SPL.backup3),1920k(u-boot)," \ | |
437 | "128k(u-boot-env),5m(kernel),-(rootfs)" | |
98b5c269 IY |
438 | #define CONFIG_NAND_OMAP_GPMC |
439 | #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 | |
440 | #define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */ | |
441 | /* to access nand at */ | |
442 | /* CS0 */ | |
b4606c6c IY |
443 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND |
444 | devices */ | |
4adfcd68 | 445 | #if !defined(CONFIG_SPI_BOOT) |
b4606c6c IY |
446 | #undef CONFIG_ENV_IS_NOWHERE |
447 | #define CONFIG_ENV_IS_IN_NAND | |
448 | #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */ | |
449 | #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ | |
450 | #endif | |
4adfcd68 | 451 | #endif |
98b5c269 | 452 | |
5289e83a | 453 | #endif /* ! __CONFIG_AM335X_EVM_H */ |