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1/*
2 * am335x_evm.h
3 *
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16#ifndef __CONFIG_AM335X_EVM_H
17#define __CONFIG_AM335X_EVM_H
18
f16da746 19#define CONFIG_AM33XX
5289e83a 20
98f92001 21#include <asm/arch/omap.h>
5289e83a 22
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23#define CONFIG_DMA_COHERENT
24#define CONFIG_DMA_COHERENT_SIZE (1 << 20)
25
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26#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
27#define CONFIG_SYS_MALLOC_LEN (1024 << 10)
28#define CONFIG_SYS_LONGHELP /* undef to save memory */
29#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
750b4bfe 30#define CONFIG_SYS_PROMPT "U-Boot# "
044fc14b 31#define CONFIG_BOARD_LATE_INIT
5289e83a 32#define CONFIG_SYS_NO_FLASH
a88f70b9 33#define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
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34#define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
35
7bf038ec 36#define CONFIG_OF_LIBFDT
d446c903 37#define CONFIG_CMD_BOOTZ
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38#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
39#define CONFIG_SETUP_MEMORY_TAGS
40#define CONFIG_INITRD_TAG
41
42/* commands to include */
43#include <config_cmd_default.h>
44
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45#define CONFIG_CMD_ASKENV
46#define CONFIG_VERSION_VARIABLE
47
48/* set to negative value for no autoboot */
3580777b 49#define CONFIG_BOOTDELAY 1
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50#define CONFIG_ENV_VARS_UBOOT_CONFIG
51#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
a32f42f6 52#ifndef CONFIG_SPL_BUILD
5289e83a 53#define CONFIG_EXTRA_ENV_SETTINGS \
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54 "loadaddr=0x80200000\0" \
55 "fdtaddr=0x80F80000\0" \
f170899f 56 "fdt_high=0xffffffff\0" \
7bf038ec 57 "rdaddr=0x81000000\0" \
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58 "bootdir=/boot\0" \
59 "bootfile=uImage\0" \
044fc14b 60 "fdtfile=\0" \
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61 "console=ttyO0,115200n8\0" \
62 "optargs=\0" \
63 "mmcdev=0\0" \
3580777b 64 "mmcroot=/dev/mmcblk0p2 ro\0" \
7bf038ec 65 "mmcrootfstype=ext4 rootwait\0" \
73a27a84 66 "bootpart=0:2\0" \
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67 "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
68 "nandrootfstype=ubifs rootwait=1\0" \
69 "nandsrcaddr=0x280000\0" \
70 "nandimgsize=0x500000\0" \
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71 "rootpath=/export/rootfs\0" \
72 "nfsopts=nolock\0" \
73 "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
74 "::off\0" \
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75 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
76 "ramrootfstype=ext2\0" \
77 "mmcargs=setenv bootargs console=${console} " \
78 "${optargs} " \
79 "root=${mmcroot} " \
80 "rootfstype=${mmcrootfstype}\0" \
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81 "nandargs=setenv bootargs console=${console} " \
82 "${optargs} " \
83 "root=${nandroot} " \
84 "rootfstype=${nandrootfstype}\0" \
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85 "spiroot=/dev/mtdblock4 rw\0" \
86 "spirootfstype=jffs2\0" \
87 "spisrcaddr=0xe0000\0" \
88 "spiimgsize=0x362000\0" \
89 "spibusno=0\0" \
90 "spiargs=setenv bootargs console=${console} " \
91 "${optargs} " \
92 "root=${spiroot} " \
93 "rootfstype=${spirootfstype}\0" \
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94 "netargs=setenv bootargs console=${console} " \
95 "${optargs} " \
96 "root=/dev/nfs " \
97 "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
98 "ip=dhcp\0" \
7bf038ec 99 "bootenv=uEnv.txt\0" \
73a27a84 100 "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
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101 "importbootenv=echo Importing environment from mmc ...; " \
102 "env import -t $loadaddr $filesize\0" \
103 "ramargs=setenv bootargs console=${console} " \
104 "${optargs} " \
105 "root=${ramroot} " \
106 "rootfstype=${ramrootfstype}\0" \
73a27a84 107 "loadramdisk=load mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
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108 "loaduimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
109 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
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110 "mmcboot=echo Booting from mmc ...; " \
111 "run mmcargs; " \
951d5827 112 "bootm ${loadaddr} - ${fdtaddr}\0" \
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113 "nandboot=echo Booting from nand ...; " \
114 "run nandargs; " \
115 "nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \
116 "bootm ${loadaddr}\0" \
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117 "spiboot=echo Booting from spi ...; " \
118 "run spiargs; " \
119 "sf probe ${spibusno}:0; " \
120 "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \
121 "bootm ${loadaddr}\0" \
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122 "netboot=echo Booting from network ...; " \
123 "setenv autoload no; " \
124 "dhcp; " \
125 "tftp ${loadaddr} ${bootfile}; " \
951d5827 126 "tftp ${fdtaddr} ${fdtfile}; " \
abdd178d 127 "run netargs; " \
951d5827 128 "bootm ${loadaddr} - ${fdtaddr}\0" \
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129 "ramboot=echo Booting from ramdisk ...; " \
130 "run ramargs; " \
951d5827 131 "bootm ${loadaddr} ${rdaddr} ${fdtaddr}\0" \
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132 "findfdt="\
133 "if test $board_name = A335BONE; then " \
134 "setenv fdtfile am335x-bone.dtb; fi; " \
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135 "if test $board_name = A335BNLT; then " \
136 "setenv fdtfile am335x-boneblack.dtb; fi; " \
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137 "if test $board_name = A33515BB; then " \
138 "setenv fdtfile am335x-evm.dtb; fi; " \
139 "if test $board_name = A335X_SK; then " \
140 "setenv fdtfile am335x-evmsk.dtb; fi\0" \
7bf038ec 141
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142#endif
143
7bf038ec 144#define CONFIG_BOOTCOMMAND \
951d5827 145 "run findfdt; " \
66968110 146 "mmc dev ${mmcdev}; if mmc rescan; then " \
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147 "echo SD/MMC found on device ${mmcdev};" \
148 "if run loadbootenv; then " \
149 "echo Loaded environment from ${bootenv};" \
150 "run importbootenv;" \
151 "fi;" \
152 "if test -n $uenvcmd; then " \
153 "echo Running uenvcmd ...;" \
154 "run uenvcmd;" \
155 "fi;" \
156 "if run loaduimage; then " \
951d5827 157 "run loadfdt;" \
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158 "run mmcboot;" \
159 "fi;" \
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160 "else " \
161 "run nandboot;" \
7bf038ec 162 "fi;" \
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163
164/* Clock Defines */
165#define V_OSCK 24000000 /* Clock output from T2 */
750b4bfe 166#define V_SCLK (V_OSCK)
5289e83a 167
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168#define CONFIG_CMD_ECHO
169
170/* max number of command args */
750b4bfe 171#define CONFIG_SYS_MAXARGS 16
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172
173/* Console I/O Buffer Size */
174#define CONFIG_SYS_CBSIZE 512
175
176/* Print Buffer Size */
177#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
178 + sizeof(CONFIG_SYS_PROMPT) + 16)
179
180/* Boot Argument Buffer Size */
181#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
182
183/*
184 * memtest works on 8 MB in DRAM after skipping 32MB from
185 * start addr of ram disk
186 */
187#define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024))
188#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
189 + (8 * 1024 * 1024))
190
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191#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
192#define CONFIG_SYS_HZ 1000 /* 1ms clock */
193
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194#define CONFIG_MMC
195#define CONFIG_GENERIC_MMC
196#define CONFIG_OMAP_HSMMC
197#define CONFIG_CMD_MMC
198#define CONFIG_DOS_PARTITION
199#define CONFIG_CMD_FAT
200#define CONFIG_CMD_EXT2
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201#define CONFIG_CMD_EXT4
202#define CONFIG_CMD_FS_GENERIC
876bdd6d 203
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204#define CONFIG_SPI
205#define CONFIG_OMAP3_SPI
206#define CONFIG_MTD_DEVICE
207#define CONFIG_SPI_FLASH
208#define CONFIG_SPI_FLASH_WINBOND
209#define CONFIG_CMD_SF
210#define CONFIG_SF_DEFAULT_SPEED (24000000)
211
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212 /* Physical Memory Map */
213#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
214#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
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215#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
216
217#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
41aebf81 218#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
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219 GENERATED_GBL_DATA_SIZE)
220 /* Platform/Board specific defs */
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221#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
222#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
223#define CONFIG_SYS_HZ 1000
224
225/* NS16550 Configuration */
226#define CONFIG_SYS_NS16550
227#define CONFIG_SYS_NS16550_SERIAL
c3f8318f 228#define CONFIG_SERIAL_MULTI
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229#define CONFIG_SYS_NS16550_REG_SIZE (-4)
230#define CONFIG_SYS_NS16550_CLK (48000000)
231#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
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232#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
233#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
234#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
235#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
236#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
5289e83a 237
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238/* I2C Configuration */
239#define CONFIG_I2C
240#define CONFIG_CMD_I2C
241#define CONFIG_HARD_I2C
242#define CONFIG_SYS_I2C_SPEED 100000
243#define CONFIG_SYS_I2C_SLAVE 1
d3decdeb 244#define CONFIG_I2C_MULTI_BUS
b4116ede 245#define CONFIG_DRIVER_OMAP24XX_I2C
726c05d2 246#define CONFIG_CMD_EEPROM
a4a99fff 247#define CONFIG_ENV_EEPROM_IS_ON_I2C
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248#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
249#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
250#define CONFIG_SYS_I2C_MULTI_EEPROMS
b4116ede 251
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252#define CONFIG_OMAP_GPIO
253
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254#define CONFIG_BAUDRATE 115200
255#define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
2564800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
257
c3f8318f 258#define CONFIG_ENV_OVERWRITE 1
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259#define CONFIG_SYS_CONSOLE_INFO_QUIET
260
261#define CONFIG_ENV_IS_NOWHERE
262
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263/* Defines for SPL */
264#define CONFIG_SPL
47f7bcae 265#define CONFIG_SPL_FRAMEWORK
8a8f084e 266#define CONFIG_SPL_TEXT_BASE 0x402F0400
6feb4e9d 267#define CONFIG_SPL_MAX_SIZE (101 * 1024)
41aebf81 268#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
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269
270#define CONFIG_SPL_BSS_START_ADDR 0x80000000
271#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
272
273#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
274#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
275#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
276#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
277#define CONFIG_SPL_MMC_SUPPORT
278#define CONFIG_SPL_FAT_SUPPORT
b4116ede 279#define CONFIG_SPL_I2C_SUPPORT
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280
281#define CONFIG_SPL_LIBCOMMON_SUPPORT
282#define CONFIG_SPL_LIBDISK_SUPPORT
283#define CONFIG_SPL_LIBGENERIC_SUPPORT
284#define CONFIG_SPL_SERIAL_SUPPORT
16e41c85 285#define CONFIG_SPL_GPIO_SUPPORT
763cf0a3 286#define CONFIG_SPL_YMODEM_SUPPORT
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287#define CONFIG_SPL_NET_SUPPORT
288#define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
289#define CONFIG_SPL_ETH_SUPPORT
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290#define CONFIG_SPL_SPI_SUPPORT
291#define CONFIG_SPL_SPI_FLASH_SUPPORT
292#define CONFIG_SPL_SPI_LOAD
293#define CONFIG_SPL_SPI_BUS 0
294#define CONFIG_SPL_SPI_CS 0
4adfcd68 295#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000
c0e66793 296#define CONFIG_SPL_MUSB_NEW_SUPPORT
65cdd643 297#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
8a8f084e 298
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299#define CONFIG_SPL_BOARD_INIT
300#define CONFIG_SPL_NAND_AM33XX_BCH
301#define CONFIG_SPL_NAND_SUPPORT
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302#define CONFIG_SPL_NAND_BASE
303#define CONFIG_SPL_NAND_DRIVERS
304#define CONFIG_SPL_NAND_ECC
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305#define CONFIG_SYS_NAND_5_ADDR_CYCLE
306#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
307 CONFIG_SYS_NAND_PAGE_SIZE)
308#define CONFIG_SYS_NAND_PAGE_SIZE 2048
309#define CONFIG_SYS_NAND_OOBSIZE 64
310#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
311#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
312#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
313 10, 11, 12, 13, 14, 15, 16, 17, \
314 18, 19, 20, 21, 22, 23, 24, 25, \
315 26, 27, 28, 29, 30, 31, 32, 33, \
316 34, 35, 36, 37, 38, 39, 40, 41, \
317 42, 43, 44, 45, 46, 47, 48, 49, \
318 50, 51, 52, 53, 54, 55, 56, 57, }
319
320#define CONFIG_SYS_NAND_ECCSIZE 512
321#define CONFIG_SYS_NAND_ECCBYTES 14
322
323#define CONFIG_SYS_NAND_ECCSTEPS 4
324#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
325 CONFIG_SYS_NAND_ECCSTEPS)
326
327#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
328
329#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
330
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331/*
332 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
333 * 64 bytes before this address should be set aside for u-boot.img's
334 * header. That is 0x800FFFC0--0x80100000 should not be used for any
335 * other needs.
336 */
337#define CONFIG_SYS_TEXT_BASE 0x80800000
338#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
339#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
340
341/* Since SPL did pll and ddr initialization for us,
342 * we don't need to do it twice.
343 */
344#ifndef CONFIG_SPL_BUILD
345#define CONFIG_SKIP_LOWLEVEL_INIT
346#endif
5289e83a 347
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348/*
349 * USB configuration
350 */
351#define CONFIG_USB_MUSB_DSPS
352#define CONFIG_ARCH_MISC_INIT
353#define CONFIG_MUSB_GADGET
354#define CONFIG_MUSB_PIO_ONLY
355#define CONFIG_USB_GADGET_DUALSPEED
356#define CONFIG_MUSB_HOST
357#define CONFIG_AM335X_USB0
358#define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
359#define CONFIG_AM335X_USB1
360#define CONFIG_AM335X_USB1_MODE MUSB_HOST
361
362#ifdef CONFIG_MUSB_HOST
363#define CONFIG_CMD_USB
364#define CONFIG_USB_STORAGE
365#endif
366
367#ifdef CONFIG_MUSB_GADGET
368#define CONFIG_USB_ETHER
369#define CONFIG_USB_ETH_RNDIS
c0e66793 370#define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
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371#endif /* CONFIG_MUSB_GADGET */
372
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373#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
374/* disable host part of MUSB in SPL */
375#undef CONFIG_MUSB_HOST
376/*
98bc1228 377 * Disable CPSW SPL support so we fit within the 101KiB limit.
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378 */
379#undef CONFIG_SPL_ETH_SUPPORT
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380#endif
381
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382/*
383 * Default to using SPI for environment, etc. We have multiple copies
384 * of SPL as the ROM will check these locations.
385 * 0x0 - 0x20000 : First copy of SPL
386 * 0x20000 - 0x40000 : Second copy of SPL
387 * 0x40000 - 0x60000 : Third copy of SPL
388 * 0x60000 - 0x80000 : Fourth copy of SPL
389 * 0x80000 - 0xDF000 : U-Boot
390 * 0xDF000 - 0xE0000 : U-Boot Environment
391 * 0xE0000 - 0x442000 : Linux Kernel
392 * 0x442000 - 0x800000 : Userland
393 */
394#if defined(CONFIG_SPI_BOOT)
395# undef CONFIG_ENV_IS_NOWHERE
396# define CONFIG_ENV_IS_IN_SPI_FLASH
397# define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
398# define CONFIG_ENV_OFFSET (892 << 10) /* 892 KiB in */
399# define CONFIG_ENV_SECT_SIZE (4 << 10) /* 4 KB sectors */
400#endif /* SPI support */
401
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402/* Unsupported features */
403#undef CONFIG_USE_IRQ
404
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405#define CONFIG_CMD_NET
406#define CONFIG_CMD_DHCP
407#define CONFIG_CMD_PING
408#define CONFIG_DRIVER_TI_CPSW
409#define CONFIG_MII
410#define CONFIG_BOOTP_DEFAULT
411#define CONFIG_BOOTP_DNS
412#define CONFIG_BOOTP_DNS2
413#define CONFIG_BOOTP_SEND_HOSTNAME
414#define CONFIG_BOOTP_GATEWAY
415#define CONFIG_BOOTP_SUBNETMASK
416#define CONFIG_NET_RETRY_COUNT 10
417#define CONFIG_NET_MULTI
418#define CONFIG_PHY_GIGE
419#define CONFIG_PHYLIB
cdd0729e 420#define CONFIG_PHY_ADDR 0
c44080b2 421#define CONFIG_PHY_SMSC
93042960 422
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423#define CONFIG_NAND
424/* NAND support */
425#ifdef CONFIG_NAND
426#define CONFIG_CMD_NAND
427#define CONFIG_NAND_OMAP_GPMC
428#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
429#define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */
430 /* to access nand at */
431 /* CS0 */
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432#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND
433 devices */
4adfcd68 434#if !defined(CONFIG_SPI_BOOT)
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435#undef CONFIG_ENV_IS_NOWHERE
436#define CONFIG_ENV_IS_IN_NAND
437#define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
438#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
439#endif
4adfcd68 440#endif
98b5c269 441
5289e83a 442#endif /* ! __CONFIG_AM335X_EVM_H */