[people/ms/u-boot.git] / include / configs / am3517_evm.h

/*
 * am3517_evm.h - Default configuration for AM3517 EVM board.
 *
 * Author: Vaibhav Hiremath <hvaibhav@ti.com>
 *
 * Based on omap3_evm_config.h
 *
 * Copyright (C) 2010 Texas Instruments Incorporated
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

/* High Level Configuration Options */

#define CONFIG_OMAP
#define CONFIG_OMAP_COMMON

#define CONFIG_SYS_CACHELINE_SIZE	64

#define CONFIG_SYS_NO_FLASH

#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */

/* Common ARM Erratas */
#define CONFIG_ARM_ERRATA_454179
#define CONFIG_ARM_ERRATA_430973
#define CONFIG_ARM_ERRATA_621766

#define CONFIG_EMIF4	/* The chip has EMIF4 controller */

/*
 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
 * 64 bytes before this address should be set aside for u-boot.img's
 * header. That is 0x800FFFC0--0x80100000 should not be used for any
 * other needs.
 */
#define CONFIG_SYS_TEXT_BASE		0x80100000
#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000

#include <asm/arch/cpu.h>		/* get chip and board defs */
#include <asm/arch/omap.h>

/* Display CPU and Board information */
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define CONFIG_MISC_INIT_R
#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_REVISION_TAG

/* Clock Defines */
#define V_OSCK			26000000	/* Clock output from T2 */
#define V_SCLK			(V_OSCK >> 1)

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(16 << 20)

/* Hardware drivers */

/* OMAP GPIO configuration */
#define CONFIG_OMAP_GPIO

/* NS16550 Configuration */
#define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK

/* select serial console configuration */
#define CONFIG_CONS_INDEX		3
#define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
#define CONFIG_SERIAL3			3	/* UART3 on AM3517 EVM */

/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE			115200
#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
					115200}

/* SD/MMC */
#define CONFIG_MMC
#define CONFIG_GENERIC_MMC
#define CONFIG_OMAP_HSMMC
#define CONFIG_DOS_PARTITION

/*
 * USB configuration
 * Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
 * Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
 */
#define CONFIG_USB_MUSB_AM35X
#define CONFIG_USB_MUSB_HOST
#define CONFIG_USB_MUSB_PIO_ONLY

#ifdef CONFIG_USB_MUSB_AM35X

#ifdef CONFIG_USB_MUSB_HOST
#define CONFIG_CMD_USB

#define CONFIG_USB_STORAGE
#define CONGIG_CMD_STORAGE

#ifdef CONFIG_USB_KEYBOARD
#define CONFIG_SYS_USB_EVENT_POLL
#define CONFIG_PREBOOT "usb start"
#endif /* CONFIG_USB_KEYBOARD */

#endif /* CONFIG_USB_MUSB_HOST */

#ifdef CONFIG_USB_MUSB_GADGET
#define CONFIG_USB_GADGET_DUALSPEED
#define CONFIG_USB_ETHER
#define CONFIG_USB_ETH_RNDIS
#endif /* CONFIG_USB_MUSB_GADGET */

#endif /* CONFIG_USB_MUSB_AM35X */

/* commands to include */
#define CONFIG_CMD_NAND
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_FAT
#define CONFIG_CMD_EXT2
#define CONFIG_CMD_EXT4
#define CONFIG_CMD_EXT4_WRITE
#define CONFIG_CMD_FS_GENERIC
#define CONFIG_CMD_PART
#define CONFIG_CMD_ASKENV
#define CONFIG_CMD_BOOTZ
#define CONFIG_CMD_I2C
#define CONFIG_CMD_MMC
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
#define CONFIG_CMD_MTDPARTS

/* I2C */
#define CONFIG_SYS_I2C
#define CONFIG_SYS_OMAP24_I2C_SPEED	100000
#define CONFIG_SYS_OMAP24_I2C_SLAVE	1
#define CONFIG_SYS_I2C_OMAP34XX

/* Ethernet */
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_DRIVER_TI_EMAC_USE_RMII
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_NET_RETRY_COUNT		10

/* Board NAND Info. */
#ifdef CONFIG_NAND
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_GPMC_PREFETCH
#define CONFIG_BCH
#define CONFIG_CMD_UBI			/* UBI-formated MTD partition support */
#define CONFIG_CMD_UBIFS		/* Read-only UBI volume operations */
#define CONFIG_RBTREE			/* required by CONFIG_CMD_UBI */
#define CONFIG_LZO			/* required by CONFIG_CMD_UBIFS */
#define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
							/* to access nand */
#define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
							/* to access */
							/* nand at CS0 */
#define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of */
							/* NAND devices */
#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_PAGE_SIZE	2048
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS		{ 2,  3,  4,  5,  6,  7,  8,  9, 10, \
					 11, 12, 13, 14, 16, 17, 18, 19, 20, \
					 21, 22, 23, 24, 25, 26, 27, 28, 30, \
					 31, 32, 33, 34, 35, 36, 37, 38, 39, \
					 40, 41, 42, 44, 45, 46, 47, 48, 49, \
					 50, 51, 52, 53, 54, 55, 56 }

#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	13
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
#define CONFIG_SYS_NAND_MAX_OOBFREE	2
#define CONFIG_SYS_NAND_MAX_ECCPOS	56
#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
#define CONFIG_MTD_PARTITIONS		/* required for UBI partition support */
#define CONFIG_MTD_DEVICE		/* needed for mtdparts commands */
/* NAND block size is 128 KiB.  Synchronize these values with
 * corresponding Device Tree entries in Linux:
 *  MLO(SPL)             4 * NAND_BLOCK_SIZE = 512 KiB  @ 0x000000
 *  U-Boot              15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
 *  U-Boot environment   2 * NAND_BLOCK_SIZE = 256 KiB  @ 0x260000
 *  Kernel              64 * NAND_BLOCK_SIZE = 8 MiB    @ 0x2A0000
 *  DTB                  4 * NAND_BLOCK_SIZE = 512 KiB  @ 0xAA0000
 *  RootFS              Remaining Flash Space           @ 0xB20000
 */
#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:"	\
	"512k(MLO),"					\
	"1920k(u-boot),"				\
	"256k(u-boot-env),"				\
	"8m(kernel),"					\
	"512k(dtb),"					\
	"-(rootfs)"
#else
#define MTDIDS_DEFAULT
#define MTDPARTS_DEFAULT
#endif /* CONFIG_NAND */

/* Environment information */
#define CONFIG_BOOTDELAY	10

#define CONFIG_BOOTFILE		"uImage"

#define CONFIG_EXTRA_ENV_SETTINGS \
	"loadaddr=0x82000000\0" \
	"console=ttyO2,115200n8\0" \
	"fdtfile=am3517-evm.dtb\0" \
	"fdtaddr=0x82C00000\0" \
	"vram=16M\0" \
	"bootenv=uEnv.txt\0" \
	"cmdline=\0" \
	"optargs=\0" \
	"mtdids=" MTDIDS_DEFAULT "\0" \
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"mmcdev=0\0" \
	"mmcpart=1\0" \
	"mmcroot=/dev/mmcblk0p2 rw\0" \
	"mmcrootfstype=ext4 rootwait fixrtc\0" \
	"mmcargs=setenv bootargs console=${console} " \
		"${mtdparts} " \
		"${optargs} " \
		"root=${mmcroot} " \
		"rootfstype=${mmcrootfstype} " \
		"${cmdline}\0" \
	"nandargs=setenv bootargs console=${console} " \
		"${mtdparts} " \
		"${optargs} " \
		"root=ubi0:rootfs rw ubi.mtd=rootfs " \
		"rootfstype=ubifs rootwait " \
		"${cmdline}\0" \
	"loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
	"importbootenv=echo Importing environment from mmc ...; " \
		"env import -t ${loadaddr} ${filesize}\0" \
	"bootscript=echo Running bootscript from mmc ...; " \
		"source ${loadaddr}\0" \
	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
	"mmcboot=echo Booting from mmc ...; " \
		"run mmcargs; " \
		"bootz ${loadaddr} - ${fdtaddr}\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"nand read ${loadaddr} 2a0000 800000; " \
		"nand read ${fdtaddr} aa0000 80000; " \
		"bootm ${loadaddr} - ${fdtaddr}\0" \

#define CONFIG_BOOTCOMMAND \
	"mmc dev ${mmcdev}; if mmc rescan; then " \
		"echo SD/MMC found on device $mmcdev; " \
		"if run loadbootenv; then " \
			"run importbootenv; " \
		"fi; " \
		"echo Checking if uenvcmd is set ...; " \
		"if test -n $uenvcmd; then " \
			"echo Running uenvcmd ...; " \
			"run uenvcmd; " \
		"fi; " \
		"echo Running default loadimage ...; " \
		"setenv bootfile zImage; " \
		"if run loadimage; then " \
			"run loadfdt; " \
			"run mmcboot; " \
		"fi; " \
	"else run nandboot; fi"

/* Miscellaneous configurable options */
#define CONFIG_AUTO_COMPLETE
#define CONFIG_CMDLINE_EDITING
#define CONFIG_VERSION_VARIABLE
#define CONFIG_SYS_LONGHELP
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_PARTITION_UUIDS

/* We set the max number of command args high to avoid HUSH bugs. */
#define CONFIG_SYS_MAXARGS		64

/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE		512
/* Print Buffer Size */
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE \
					+ sizeof(CONFIG_SYS_PROMPT) + 16)
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE

/* memtest works on */
#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
					0x01F00000) /* 31MB */

#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
								/* address */

/*
 * AM3517 has 12 GP timers, they can be driven by the system clock
 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 * This rate is divided by a local divisor.
 */
#define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */

/* Physical Memory Map */
#define PHYS_SDRAM_1			OMAP34XX_SDRC_CS0
#define PHYS_SDRAM_2			OMAP34XX_SDRC_CS1
#define CONFIG_SYS_CS0_SIZE		(256 * 1024 * 1024)
#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
#define CONFIG_SYS_INIT_RAM_SIZE	0x800
#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
					 CONFIG_SYS_INIT_RAM_SIZE - \
					 GENERATED_GBL_DATA_SIZE)

/* FLASH and environment organization */

/* **** PISMO SUPPORT *** */
#define CONFIG_SYS_MAX_FLASH_SECT	520	/* max number of sectors */
						/* on one chip */
#define CONFIG_SYS_MAX_FLASH_BANKS	2	/* max number of flash banks */
#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */

#if defined(CONFIG_NAND)
#define CONFIG_SYS_FLASH_BASE		NAND_BASE
#endif

/* Monitor at start of flash */
#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE

#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
#define CONFIG_ENV_SIZE			CONFIG_SYS_ENV_SECT_SIZE
#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
#define CONFIG_ENV_ADDR			SMNAND_ENV_OFFSET
#define CONFIG_ENV_IS_IN_NAND

/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SPL_NAND_SIMPLE
#define CONFIG_SPL_TEXT_BASE		0x40200000
#define CONFIG_SPL_MAX_SIZE		(64 * 1024)

#define CONFIG_SPL_BSS_START_ADDR	0x80000000
#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */

#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"

#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBDISK_SUPPORT
#define CONFIG_SPL_I2C_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_MMC_SUPPORT
#define CONFIG_SPL_FAT_SUPPORT
#define CONFIG_SPL_SERIAL_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_ECC
#define CONFIG_SPL_MTD_SUPPORT
#define CONFIG_SPL_POWER_SUPPORT
#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"

#endif /* __CONFIG_H */
Commit	Line	Data
ed01e45c VH	1	/*
	2	* am3517_evm.h - Default configuration for AM3517 EVM board.
	3	*
	4	* Author: Vaibhav Hiremath <hvaibhav@ti.com>
	5	*
	6	* Based on omap3_evm_config.h
	7	*
	8	* Copyright (C) 2010 Texas Instruments Incorporated
	9	*
1a459660	10	* SPDX-License-Identifier: GPL-2.0+
ed01e45c VH	11	*/
	12
	13	#ifndef __CONFIG_H
	14	#define __CONFIG_H
	15
3f53e619	16	/* High Level Configuration Options */
3709844f	17
3f53e619	18	#define CONFIG_OMAP
806d2792	19	#define CONFIG_OMAP_COMMON
3f53e619 DW	20
	21	#define CONFIG_SYS_CACHELINE_SIZE 64
	22
	23	#define CONFIG_SYS_NO_FLASH
	24
	25	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
	26
c6f90e14 NM	27	/* Common ARM Erratas */
	28	#define CONFIG_ARM_ERRATA_454179
	29	#define CONFIG_ARM_ERRATA_430973
	30	#define CONFIG_ARM_ERRATA_621766
ed01e45c	31
1a5038ca	32	#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
ed01e45c	33
3f53e619 DW	34	/*
	35	* 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
	36	* 64 bytes before this address should be set aside for u-boot.img's
	37	* header. That is 0x800FFFC0--0x80100000 should not be used for any
	38	* other needs.
	39	*/
	40	#define CONFIG_SYS_TEXT_BASE 0x80100000
	41	#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
	42	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
	43
ed01e45c	44	#include <asm/arch/cpu.h> /* get chip and board defs */
987ec585	45	#include <asm/arch/omap.h>
ed01e45c	46
3f53e619 DW	47	/* Display CPU and Board information */
	48	#define CONFIG_DISPLAY_CPUINFO
	49	#define CONFIG_DISPLAY_BOARDINFO
3f53e619 DW	50	#define CONFIG_MISC_INIT_R
	51	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	52	#define CONFIG_SETUP_MEMORY_TAGS
	53	#define CONFIG_INITRD_TAG
	54	#define CONFIG_REVISION_TAG
ed01e45c VH	55
	56	/* Clock Defines */
	57	#define V_OSCK 26000000 /* Clock output from T2 */
	58	#define V_SCLK (V_OSCK >> 1)
	59
3f53e619 DW	60	/* Size of malloc() pool */
3f53e619 DW	61	#define CONFIG_SYS_MALLOC_LEN (16 << 20)
ed01e45c	62
3f53e619	63	/* Hardware drivers */
ed01e45c	64
3f53e619	65	/* OMAP GPIO configuration */
6a1df373 YY	66	#define CONFIG_OMAP_GPIO
6a1df373 YY	67
3f53e619	68	/* NS16550 Configuration */
ed01e45c	69	#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
ed01e45c VH	70	#define CONFIG_SYS_NS16550_SERIAL
	71	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
	72	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
	73
3f53e619	74	/* select serial console configuration */
ed01e45c VH	75	#define CONFIG_CONS_INDEX 3
	76	#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
	77	#define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
	78
	79	/* allow to overwrite serial and ethaddr */
	80	#define CONFIG_ENV_OVERWRITE
	81	#define CONFIG_BAUDRATE 115200
	82	#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
	83	115200}
3f53e619 DW	84
	85	/* SD/MMC */
	86	#define CONFIG_MMC
	87	#define CONFIG_GENERIC_MMC
	88	#define CONFIG_OMAP_HSMMC
	89	#define CONFIG_DOS_PARTITION
ed01e45c	90
7dc27b05 AKG	91	/*
7dc27b05 AKG	92	* USB configuration
95de1e2f PK	93	* Enable CONFIG_USB_MUSB_HOST for Host functionalities MSC, keyboard
95de1e2f PK	94	* Enable CONFIG_USB_MUSB_GADGET for Device functionalities.
7dc27b05	95	*/
88919ff7	96	#define CONFIG_USB_MUSB_AM35X
95de1e2f PK	97	#define CONFIG_USB_MUSB_HOST
95de1e2f PK	98	#define CONFIG_USB_MUSB_PIO_ONLY
7dc27b05	99
88919ff7	100	#ifdef CONFIG_USB_MUSB_AM35X
7dc27b05	101
95de1e2f	102	#ifdef CONFIG_USB_MUSB_HOST
7dc27b05 AKG	103	#define CONFIG_CMD_USB
	104
	105	#define CONFIG_USB_STORAGE
	106	#define CONGIG_CMD_STORAGE
7dc27b05 AKG	107
	108	#ifdef CONFIG_USB_KEYBOARD
	109	#define CONFIG_SYS_USB_EVENT_POLL
	110	#define CONFIG_PREBOOT "usb start"
	111	#endif /* CONFIG_USB_KEYBOARD */
	112
95de1e2f	113	#endif /* CONFIG_USB_MUSB_HOST */
88919ff7	114
95de1e2f	115	#ifdef CONFIG_USB_MUSB_GADGET
88919ff7 IY	116	#define CONFIG_USB_GADGET_DUALSPEED
	117	#define CONFIG_USB_ETHER
	118	#define CONFIG_USB_ETH_RNDIS
95de1e2f	119	#endif /* CONFIG_USB_MUSB_GADGET */
88919ff7 IY	120
88919ff7 IY	121	#endif /* CONFIG_USB_MUSB_AM35X */
7dc27b05	122
ed01e45c	123	/* commands to include */
3f53e619 DW	124	#define CONFIG_CMD_NAND
	125	#define CONFIG_CMD_CACHE
	126	#define CONFIG_CMD_FAT
	127	#define CONFIG_CMD_EXT2
45776e36 DW	128	#define CONFIG_CMD_EXT4
45776e36 DW	129	#define CONFIG_CMD_EXT4_WRITE
3f53e619 DW	130	#define CONFIG_CMD_FS_GENERIC
	131	#define CONFIG_CMD_PART
	132	#define CONFIG_CMD_ASKENV
45776e36	133	#define CONFIG_CMD_BOOTZ
3f53e619 DW	134	#define CONFIG_CMD_I2C
3f53e619 DW	135	#define CONFIG_CMD_MMC
ed01e45c	136	#define CONFIG_CMD_DHCP
3f53e619 DW	137	#define CONFIG_CMD_PING
3f53e619 DW	138	#define CONFIG_CMD_MTDPARTS
ed01e45c	139
3f53e619	140	/* I2C */
6789e84e HS	141	#define CONFIG_SYS_I2C
	142	#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
	143	#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
	144	#define CONFIG_SYS_I2C_OMAP34XX
ed01e45c	145
3f53e619	146	/* Ethernet */
18a02e80 TR	147	#define CONFIG_DRIVER_TI_EMAC
	148	#define CONFIG_DRIVER_TI_EMAC_USE_RMII
	149	#define CONFIG_MII
	150	#define CONFIG_BOOTP_DEFAULT
	151	#define CONFIG_BOOTP_DNS
	152	#define CONFIG_BOOTP_DNS2
	153	#define CONFIG_BOOTP_SEND_HOSTNAME
	154	#define CONFIG_NET_RETRY_COUNT 10
	155
3f53e619 DW	156	/* Board NAND Info. */
	157	#ifdef CONFIG_NAND
	158	#define CONFIG_NAND_OMAP_GPMC
	159	#define CONFIG_NAND_OMAP_GPMC_PREFETCH
	160	#define CONFIG_BCH
	161	#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
	162	#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
	163	#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
	164	#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
ed01e45c VH	165	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
	166	/* to access nand */
	167	#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
	168	/* to access */
	169	/* nand at CS0 */
ed01e45c VH	170	#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
ed01e45c VH	171	/* NAND devices */
3f53e619 DW	172	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
	173	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	174	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	175	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	176	#define CONFIG_SYS_NAND_OOBSIZE 64
	177	#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
	178	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	179	#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, 10, \
	180	11, 12, 13, 14, 16, 17, 18, 19, 20, \
	181	21, 22, 23, 24, 25, 26, 27, 28, 30, \
	182	31, 32, 33, 34, 35, 36, 37, 38, 39, \
	183	40, 41, 42, 44, 45, 46, 47, 48, 49, \
	184	50, 51, 52, 53, 54, 55, 56 }
	185
	186	#define CONFIG_SYS_NAND_ECCSIZE 512
	187	#define CONFIG_SYS_NAND_ECCBYTES 13
	188	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
	189	#define CONFIG_SYS_NAND_MAX_OOBFREE 2
	190	#define CONFIG_SYS_NAND_MAX_ECCPOS 56
	191	#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
	192	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
	193	#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
	194	#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
	195	/* NAND block size is 128 KiB. Synchronize these values with
	196	* corresponding Device Tree entries in Linux:
	197	* MLO(SPL) 4 * NAND_BLOCK_SIZE = 512 KiB @ 0x000000
	198	* U-Boot 15 * NAND_BLOCK_SIZE = 1920 KiB @ 0x080000
	199	* U-Boot environment 2 * NAND_BLOCK_SIZE = 256 KiB @ 0x260000
	200	* Kernel 64 * NAND_BLOCK_SIZE = 8 MiB @ 0x2A0000
	201	* DTB 4 * NAND_BLOCK_SIZE = 512 KiB @ 0xAA0000
	202	* RootFS Remaining Flash Space @ 0xB20000
	203	*/
	204	#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
	205	#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:" \
	206	"512k(MLO)," \
	207	"1920k(u-boot)," \
	208	"256k(u-boot-env)," \
	209	"8m(kernel)," \
	210	"512k(dtb)," \
	211	"-(rootfs)"
	212	#else
	213	#define MTDIDS_DEFAULT
	214	#define MTDPARTS_DEFAULT
	215	#endif /* CONFIG_NAND */
ed01e45c VH	216
	217	/* Environment information */
	218	#define CONFIG_BOOTDELAY 10
	219
b3f44c21	220	#define CONFIG_BOOTFILE "uImage"
ed01e45c VH	221
	222	#define CONFIG_EXTRA_ENV_SETTINGS \
	223	"loadaddr=0x82000000\0" \
49473ada	224	"console=ttyO2,115200n8\0" \
45776e36 DW	225	"fdtfile=am3517-evm.dtb\0" \
	226	"fdtaddr=0x82C00000\0" \
	227	"vram=16M\0" \
	228	"bootenv=uEnv.txt\0" \
	229	"cmdline=\0" \
	230	"optargs=\0" \
3f53e619 DW	231	"mtdids=" MTDIDS_DEFAULT "\0" \
3f53e619 DW	232	"mtdparts=" MTDPARTS_DEFAULT "\0" \
122e6e0a	233	"mmcdev=0\0" \
45776e36 DW	234	"mmcpart=1\0" \
	235	"mmcroot=/dev/mmcblk0p2 rw\0" \
	236	"mmcrootfstype=ext4 rootwait fixrtc\0" \
ed01e45c	237	"mmcargs=setenv bootargs console=${console} " \
3f53e619	238	"${mtdparts} " \
45776e36 DW	239	"${optargs} " \
	240	"root=${mmcroot} " \
	241	"rootfstype=${mmcrootfstype} " \
	242	"${cmdline}\0" \
ed01e45c	243	"nandargs=setenv bootargs console=${console} " \
3f53e619 DW	244	"${mtdparts} " \
	245	"${optargs} " \
	246	"root=ubi0:rootfs rw ubi.mtd=rootfs " \
	247	"rootfstype=ubifs rootwait " \
	248	"${cmdline}\0" \
45776e36 DW	249	"loadbootenv=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootenv}\0"\
	250	"importbootenv=echo Importing environment from mmc ...; " \
	251	"env import -t ${loadaddr} ${filesize}\0" \
ed01e45c VH	252	"bootscript=echo Running bootscript from mmc ...; " \
ed01e45c VH	253	"source ${loadaddr}\0" \
45776e36 DW	254	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${bootfile}\0" \
45776e36 DW	255	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdtaddr} ${fdtfile}\0" \
ed01e45c VH	256	"mmcboot=echo Booting from mmc ...; " \
ed01e45c VH	257	"run mmcargs; " \
45776e36	258	"bootz ${loadaddr} - ${fdtaddr}\0" \
ed01e45c VH	259	"nandboot=echo Booting from nand ...; " \
ed01e45c VH	260	"run nandargs; " \
3f53e619 DW	261	"nand read ${loadaddr} 2a0000 800000; " \
	262	"nand read ${fdtaddr} aa0000 80000; " \
	263	"bootm ${loadaddr} - ${fdtaddr}\0" \
ed01e45c VH	264
ed01e45c VH	265	#define CONFIG_BOOTCOMMAND \
66968110	266	"mmc dev ${mmcdev}; if mmc rescan; then " \
45776e36 DW	267	"echo SD/MMC found on device $mmcdev; " \
	268	"if run loadbootenv; then " \
	269	"run importbootenv; " \
	270	"fi; " \
	271	"echo Checking if uenvcmd is set ...; " \
	272	"if test -n $uenvcmd; then " \
	273	"echo Running uenvcmd ...; " \
	274	"run uenvcmd; " \
	275	"fi; " \
	276	"echo Running default loadimage ...; " \
	277	"setenv bootfile zImage; " \
	278	"if run loadimage; then " \
	279	"run loadfdt; " \
	280	"run mmcboot; " \
ed01e45c VH	281	"fi; " \
	282	"else run nandboot; fi"
	283
3f53e619 DW	284	/* Miscellaneous configurable options */
	285	#define CONFIG_AUTO_COMPLETE
	286	#define CONFIG_CMDLINE_EDITING
	287	#define CONFIG_VERSION_VARIABLE
	288	#define CONFIG_SYS_LONGHELP
	289	#define CONFIG_SYS_HUSH_PARSER
	290	#define CONFIG_PARTITION_UUIDS
	291
	292	/* We set the max number of command args high to avoid HUSH bugs. */
	293	#define CONFIG_SYS_MAXARGS 64
	294
	295	/* Console I/O Buffer Size */
	296	#define CONFIG_SYS_CBSIZE 512
ed01e45c	297	/* Print Buffer Size */
3f53e619 DW	298	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
3f53e619 DW	299	+ sizeof(CONFIG_SYS_PROMPT) + 16)
ed01e45c	300	/* Boot Argument Buffer Size */
3f53e619 DW	301	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
3f53e619 DW	302
ed01e45c VH	303	/* memtest works on */
	304	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
	305	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
	306	0x01F00000) /* 31MB */
	307
	308	#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
	309	/* address */
	310
	311	/*
	312	* AM3517 has 12 GP timers, they can be driven by the system clock
	313	* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
	314	* This rate is divided by a local divisor.
	315	*/
	316	#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
	317	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
ed01e45c	318
3f53e619 DW	319	/* Physical Memory Map */
	320	#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
	321	#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
	322	#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
	323	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
	324	#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
	325	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
	326	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
	327	CONFIG_SYS_INIT_RAM_SIZE - \
	328	GENERATED_GBL_DATA_SIZE)
ed01e45c	329
3f53e619	330	/* FLASH and environment organization */
ed01e45c VH	331
ed01e45c VH	332	/* ** PISMO SUPPORT * */
ed01e45c VH	333	#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
	334	/* on one chip */
	335	#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
	336	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
	337
3f53e619	338	#if defined(CONFIG_NAND)
222a3113	339	#define CONFIG_SYS_FLASH_BASE NAND_BASE
6cbec7b3	340	#endif
ed01e45c VH	341
	342	/* Monitor at start of flash */
	343	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
	344
6cbec7b3	345	#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
3f53e619 DW	346	#define CONFIG_ENV_SIZE CONFIG_SYS_ENV_SECT_SIZE
3f53e619 DW	347	#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
6cbec7b3 LC	348	#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
6cbec7b3 LC	349	#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
3f53e619	350	#define CONFIG_ENV_IS_IN_NAND
5059a2a4 TR	351
5059a2a4 TR	352	/* Defines for SPL */
47f7bcae	353	#define CONFIG_SPL_FRAMEWORK
d7cb93b2	354	#define CONFIG_SPL_BOARD_INIT
5059a2a4	355	#define CONFIG_SPL_NAND_SIMPLE
138daa7b DW	356	#define CONFIG_SPL_TEXT_BASE 0x40200000
138daa7b DW	357	#define CONFIG_SPL_MAX_SIZE (64 * 1024)
5059a2a4 TR	358
	359	#define CONFIG_SPL_BSS_START_ADDR 0x80000000
	360	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
	361
	362	#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
	363	#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
e2ccdf89	364	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
3f53e619	365	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
5059a2a4 TR	366
	367	#define CONFIG_SPL_LIBCOMMON_SUPPORT
	368	#define CONFIG_SPL_LIBDISK_SUPPORT
	369	#define CONFIG_SPL_I2C_SUPPORT
	370	#define CONFIG_SPL_LIBGENERIC_SUPPORT
	371	#define CONFIG_SPL_MMC_SUPPORT
	372	#define CONFIG_SPL_FAT_SUPPORT
	373	#define CONFIG_SPL_SERIAL_SUPPORT
	374	#define CONFIG_SPL_NAND_SUPPORT
6f2f01b9 SW	375	#define CONFIG_SPL_NAND_BASE
	376	#define CONFIG_SPL_NAND_DRIVERS
	377	#define CONFIG_SPL_NAND_ECC
3f53e619	378	#define CONFIG_SPL_MTD_SUPPORT
5059a2a4 TR	379	#define CONFIG_SPL_POWER_SUPPORT
	380	#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
	381
ed01e45c	382	#endif /* __CONFIG_H */