[people/ms/u-boot.git] / include / configs / am43xx_evm.h

/*
 * am43xx_evm.h
 *
 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_AM43XX_EVM_H
#define __CONFIG_AM43XX_EVM_H

#define CONFIG_BOARD_LATE_INIT
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_MAX_RAM_BANK_SIZE	(1024 << 21)	/* 2GB */
#define CONFIG_SYS_TIMERBASE		0x48040000	/* Use Timer2 */

#include <asm/arch/omap.h>

/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_CLK		48000000
#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
#define CONFIG_SYS_NS16550_SERIAL
#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
#endif

/* I2C Configuration */
#define CONFIG_CMD_EEPROM
#define CONFIG_ENV_EEPROM_IS_ON_I2C
#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2

/* Power */
#define CONFIG_POWER
#define CONFIG_POWER_I2C
#define CONFIG_POWER_TPS65218
#define CONFIG_POWER_TPS62362

/* SPL defines. */
#define CONFIG_SPL_TEXT_BASE		CONFIG_ISW_ENTRY_ADDR
#define CONFIG_SYS_SPL_ARGS_ADDR	(CONFIG_SYS_SDRAM_BASE + \
					 (128 << 20))

/* Enabling L2 Cache */
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_PL310_BASE	0x48242000

/*
 * Since SPL did pll and ddr initialization for us,
 * we don't need to do it twice.
 */
#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT)
#define CONFIG_SKIP_LOWLEVEL_INIT
#endif

/*
 * When building U-Boot such that there is no previous loader
 * we need to call board_early_init_f.  This is taken care of in
 * s_init when we have SPL used.
 */
#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && !defined(CONFIG_SPL)
#define CONFIG_BOARD_EARLY_INIT_F
#endif

/* Now bring in the rest of the common code. */
#include <configs/ti_armv7_omap.h>

/* Always 64 KiB env size */
#define CONFIG_ENV_SIZE			(64 << 10)

#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

/* Clock Defines */
#define V_OSCK				24000000  /* Clock output from T2 */
#define V_SCLK				(V_OSCK)

/* NS16550 Configuration */
#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */

#define CONFIG_ENV_IS_IN_FAT
#define FAT_ENV_INTERFACE		"mmc"
#define FAT_ENV_DEVICE_AND_PART		"0:1"
#define FAT_ENV_FILE			"uboot.env"
#define CONFIG_FAT_WRITE

#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"

/* SPL USB Support */

#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
#define CONFIG_SYS_USB_FAT_BOOT_PARTITION		1
#define CONFIG_USB_XHCI_OMAP
#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2

#define CONFIG_OMAP_USB_PHY
#define CONFIG_AM437X_USB2PHY2_HOST
#endif

#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USBETH_SUPPORT)
#undef CONFIG_USB_DWC3_PHY_OMAP
#undef CONFIG_USB_DWC3_OMAP
#undef CONFIG_USB_DWC3
#undef CONFIG_USB_DWC3_GADGET

#undef CONFIG_USB_GADGET_DOWNLOAD
#undef CONFIG_USB_GADGET_VBUS_DRAW
#undef CONFIG_G_DNL_MANUFACTURER
#undef CONFIG_G_DNL_VENDOR_NUM
#undef CONFIG_G_DNL_PRODUCT_NUM
#undef CONFIG_USB_GADGET_DUALSPEED
#endif

/*
 * Disable MMC DM for SPL build and can be re-enabled after adding
 * DM support in SPL
 */
#ifdef CONFIG_SPL_BUILD
#undef CONFIG_DM_MMC
#undef CONFIG_DM_SPI
#undef CONFIG_DM_SPI_FLASH
#undef CONFIG_TIMER
#endif

#ifndef CONFIG_SPL_BUILD
/* USB Device Firmware Update support */

#define DFU_ALT_INFO_MMC \
	"dfu_alt_info_mmc=" \
	"boot part 0 1;" \
	"rootfs part 0 2;" \
	"MLO fat 0 1;" \
	"spl-os-args fat 0 1;" \
	"spl-os-image fat 0 1;" \
	"u-boot.img fat 0 1;" \
	"uEnv.txt fat 0 1\0"

#define DFU_ALT_INFO_EMMC \
	"dfu_alt_info_emmc=" \
	"MLO raw 0x100 0x100 mmcpart 0;" \
	"u-boot.img raw 0x300 0x1000 mmcpart 0\0"

#define DFU_ALT_INFO_RAM \
	"dfu_alt_info_ram=" \
	"kernel ram 0x80200000 0x4000000;" \
	"fdt ram 0x80f80000 0x80000;" \
	"ramdisk ram 0x81000000 0x4000000\0"

#define DFU_ALT_INFO_QSPI \
	"dfu_alt_info_qspi=" \
	"u-boot.bin raw 0x0 0x080000;" \
	"u-boot.backup raw 0x080000 0x080000;" \
	"u-boot-spl-os raw 0x100000 0x010000;" \
	"u-boot-env raw 0x110000 0x010000;" \
	"u-boot-env.backup raw 0x120000 0x010000;" \
	"kernel raw 0x130000 0x800000\0"

#define DFUARGS \
	"dfu_bufsiz=0x10000\0" \
	DFU_ALT_INFO_MMC \
	DFU_ALT_INFO_EMMC \
	DFU_ALT_INFO_RAM \
	DFU_ALT_INFO_QSPI
#else
#define DFUARGS
#endif

#ifdef CONFIG_QSPI_BOOT
#ifndef CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_TEXT_BASE		CONFIG_ISW_ENTRY_ADDR
#endif
#undef CONFIG_ENV_IS_IN_FAT
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
#define CONFIG_ENV_SECT_SIZE           (64 << 10) /* 64 KB sectors */
#define CONFIG_ENV_OFFSET              0x110000
#define CONFIG_ENV_OFFSET_REDUND       0x120000
#ifdef MTDIDS_DEFAULT
#undef MTDIDS_DEFAULT
#endif
#ifdef MTDPARTS_DEFAULT
#undef MTDPARTS_DEFAULT
#endif
#define MTDPARTS_DEFAULT		"mtdparts=qspi.0:512k(QSPI.u-boot)," \
					"512k(QSPI.u-boot.backup)," \
					"512k(QSPI.u-boot-spl-os)," \
					"64k(QSPI.u-boot-env)," \
					"64k(QSPI.u-boot-env.backup)," \
					"8m(QSPI.kernel)," \
					"-(QSPI.file-system)"
#endif

/* SPI */
#undef CONFIG_OMAP3_SPI
#define CONFIG_TI_SPI_MMAP
#define CONFIG_QSPI_SEL_GPIO                   48
#define CONFIG_SF_DEFAULT_SPEED                48000000
#define CONFIG_SF_DEFAULT_MODE                 SPI_MODE_3
#define CONFIG_QSPI_QUAD_SUPPORT
#define CONFIG_TI_EDMA3

/* Enhance our eMMC support / experience. */
#define CONFIG_CMD_GPT
#define CONFIG_EFI_PARTITION

#ifndef CONFIG_SPL_BUILD
#define CONFIG_EXTRA_ENV_SETTINGS \
	DEFAULT_LINUX_BOOT_ENV \
	DEFAULT_MMC_TI_ARGS \
	"fdtfile=undefined\0" \
	"bootpart=0:2\0" \
	"bootdir=/boot\0" \
	"bootfile=zImage\0" \
	"console=ttyO0,115200n8\0" \
	"partitions=" \
		"uuid_disk=${uuid_gpt_disk};" \
		"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
	"optargs=\0" \
	"usbroot=/dev/sda2 rw\0" \
	"usbrootfstype=ext4 rootwait\0" \
	"usbdev=0\0" \
	"ramroot=/dev/ram0 rw\0" \
	"ramrootfstype=ext2\0" \
	"usbargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${usbroot} " \
		"rootfstype=${usbrootfstype}\0" \
	"ramargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${ramroot} " \
		"rootfstype=${ramrootfstype}\0" \
	"loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \
	"loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
	"loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
	"mmcboot=mmc dev ${mmcdev}; " \
		"setenv devnum ${mmcdev}; " \
		"setenv devtype mmc; " \
		"if mmc rescan; then " \
			"echo SD/MMC found on device ${devnum};" \
			"if run loadimage; then " \
				"run loadfdt; " \
				"echo Booting from mmc${mmcdev} ...; " \
				"run args_mmc; " \
				"bootz ${loadaddr} - ${fdtaddr}; " \
			"fi;" \
		"fi;\0" \
	"usbboot=" \
		"setenv devnum ${usbdev}; " \
		"setenv devtype usb; " \
		"usb start ${usbdev}; " \
		"if usb dev ${usbdev}; then " \
			"if run loadbootenv; then " \
				"echo Loaded environment from ${bootenv};" \
				"run importbootenv;" \
			"fi;" \
			"if test -n $uenvcmd; then " \
				"echo Running uenvcmd ...;" \
				"run uenvcmd;" \
			"fi;" \
			"if run loadimage; then " \
				"run loadfdt; " \
				"echo Booting from usb ${usbdev}...; " \
				"run usbargs;" \
				"bootz ${loadaddr} - ${fdtaddr}; " \
			"fi;" \
		"fi\0" \
		"fi;" \
		"usb stop ${usbdev};\0" \
	"findfdt="\
		"if test $board_name = AM43EPOS; then " \
			"setenv fdtfile am43x-epos-evm.dtb; fi; " \
		"if test $board_name = AM43__GP; then " \
			"setenv fdtfile am437x-gp-evm.dtb; fi; " \
		"if test $board_name = AM43XXHS; then " \
			"setenv fdtfile am437x-gp-evm.dtb; fi; " \
		"if test $board_name = AM43__SK; then " \
			"setenv fdtfile am437x-sk-evm.dtb; fi; " \
		"if test $board_name = AM43_IDK; then " \
			"setenv fdtfile am437x-idk-evm.dtb; fi; " \
		"if test $fdtfile = undefined; then " \
			"echo WARNING: Could not determine device tree; fi; \0" \
	NANDARGS \
	NETARGS \
	DFUARGS \

#define CONFIG_BOOTCOMMAND \
	"run findfdt; " \
	"run envboot;" \
	"run mmcboot;" \
	"run usbboot;" \
	NANDBOOT \

#endif

#ifndef CONFIG_SPL_BUILD
/* CPSW Ethernet */
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTP_DNS2
#define CONFIG_BOOTP_SEND_HOSTNAME
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_NET_RETRY_COUNT		10
#define CONFIG_PHY_GIGE
#endif

#define CONFIG_DRIVER_TI_CPSW
#define CONFIG_PHYLIB
#define PHY_ANEG_TIMEOUT	8000 /* PHY needs longer aneg time at 1G */

#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ETH_SUPPORT)
#undef CONFIG_ENV_IS_IN_FAT
#define CONFIG_ENV_IS_NOWHERE
#endif

#define CONFIG_SYS_RX_ETH_BUFFER	64

/* NAND support */
#ifdef CONFIG_NAND
/* NAND: device related configs */
#define CONFIG_SYS_NAND_PAGE_SIZE	4096
#define CONFIG_SYS_NAND_OOBSIZE		224
#define CONFIG_SYS_NAND_BLOCK_SIZE	(256*1024)
#define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
					 CONFIG_SYS_NAND_PAGE_SIZE)
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
/* NAND: driver related configs */
#define CONFIG_NAND_OMAP_GPMC
#define CONFIG_NAND_OMAP_ELM
#define CONFIG_SYS_NAND_ONFI_DETECTION
#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH16_CODE_HW
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
#define CONFIG_SYS_NAND_ECCPOS	{ 2, 3, 4, 5, 6, 7, 8, 9, \
				10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
				20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
				30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
				40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
				50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
				60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
				70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
				80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
				90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
			100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
			110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
			120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
			130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
			140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
			150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
			160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
			170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
			180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
			190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
			200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
			}
#define CONFIG_SYS_NAND_ECCSIZE		512
#define CONFIG_SYS_NAND_ECCBYTES	26
#define MTDIDS_DEFAULT			"nand0=nand.0"
#define MTDPARTS_DEFAULT		"mtdparts=nand.0:" \
					"256k(NAND.SPL)," \
					"256k(NAND.SPL.backup1)," \
					"256k(NAND.SPL.backup2)," \
					"256k(NAND.SPL.backup3)," \
					"512k(NAND.u-boot-spl-os)," \
					"1m(NAND.u-boot)," \
					"256k(NAND.u-boot-env)," \
					"256k(NAND.u-boot-env.backup1)," \
					"7m(NAND.kernel)," \
					"-(NAND.file-system)"
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x00180000
/* NAND: SPL related configs */
#ifdef CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_NAND_AM33XX_BCH
#endif
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_CMD_SPL_NAND_OFS		0x00100000 /* os parameters */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00300000 /* kernel offset */
#define CONFIG_CMD_SPL_WRITE_SIZE	CONFIG_SYS_NAND_BLOCK_SIZE
#endif
#define NANDARGS \
	"mtdids=" MTDIDS_DEFAULT "\0" \
	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	"nandargs=setenv bootargs console=${console} " \
		"${optargs} " \
		"root=${nandroot} " \
		"rootfstype=${nandrootfstype}\0" \
	"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \
	"nandrootfstype=ubifs rootwait=1\0" \
	"nandboot=echo Booting from nand ...; " \
		"run nandargs; " \
		"nand read ${fdtaddr} NAND.u-boot-spl-os; " \
		"nand read ${loadaddr} NAND.kernel; " \
		"bootz ${loadaddr} - ${fdtaddr}\0"
#define NANDBOOT			"run nandboot; "
#else /* !CONFIG_NAND */
#define NANDARGS
#define NANDBOOT
#endif /* CONFIG_NAND */

#endif	/* __CONFIG_AM43XX_EVM_H */
Commit	Line	Data
8d0afcd7 LV	1	/*
	2	* am43xx_evm.h
	3	*
	4	* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
	5	*
	6	* SPDX-License-Identifier: GPL-2.0+
	7	*/
	8
	9	#ifndef __CONFIG_AM43XX_EVM_H
	10	#define __CONFIG_AM43XX_EVM_H
	11
369cbe1e LV	12	#define CONFIG_BOARD_LATE_INIT
369cbe1e LV	13	#define CONFIG_ARCH_CPU_INIT
42da5adf	14	#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 21) /* 2GB */
8d0afcd7	15	#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
369cbe1e LV	16
369cbe1e LV	17	#include <asm/arch/omap.h>
8d0afcd7 LV	18
8d0afcd7 LV	19	/* NS16550 Configuration */
c7b9686d	20	#define CONFIG_SYS_NS16550_CLK 48000000
2a429d23	21	#if defined(CONFIG_SPL_BUILD) \|\| !defined(CONFIG_DM_SERIAL)
8d0afcd7	22	#define CONFIG_SYS_NS16550_SERIAL
2a429d23	23	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
2a429d23	24	#endif
8d0afcd7	25
9f1a8cd3 SN	26	/* I2C Configuration */
	27	#define CONFIG_CMD_EEPROM
	28	#define CONFIG_ENV_EEPROM_IS_ON_I2C
	29	#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
	30	#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
9f1a8cd3	31
83bad102	32	/* Power */
7aa5598a TR	33	#define CONFIG_POWER
7aa5598a TR	34	#define CONFIG_POWER_I2C
83bad102	35	#define CONFIG_POWER_TPS65218
403d70ab	36	#define CONFIG_POWER_TPS62362
83bad102	37
369cbe1e	38	/* SPL defines. */
9aac7d0e	39	#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR
d3289aac TR	40	#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
d3289aac TR	41	(128 << 20))
8d0afcd7	42
573b020e LV	43	/* Enabling L2 Cache */
	44	#define CONFIG_SYS_L2_PL310
	45	#define CONFIG_SYS_PL310_BASE 0x48242000
573b020e	46
8d0afcd7	47	/*
369cbe1e LV	48	* Since SPL did pll and ddr initialization for us,
369cbe1e LV	49	* we don't need to do it twice.
8d0afcd7	50	*/
7a5f71bc	51	#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT)
8d0afcd7 LV	52	#define CONFIG_SKIP_LOWLEVEL_INIT
	53	#endif
	54
196311dc TR	55	/*
	56	* When building U-Boot such that there is no previous loader
	57	* we need to call board_early_init_f. This is taken care of in
	58	* s_init when we have SPL used.
	59	*/
	60	#if !defined(CONFIG_SKIP_LOWLEVEL_INIT) && !defined(CONFIG_SPL)
	61	#define CONFIG_BOARD_EARLY_INIT_F
	62	#endif
	63
369cbe1e	64	/* Now bring in the rest of the common code. */
9a0f4004	65	#include <configs/ti_armv7_omap.h>
8d0afcd7	66
7a5f71bc SP	67	/* Always 64 KiB env size */
7a5f71bc SP	68	#define CONFIG_ENV_SIZE (64 << 10)
8d0afcd7	69
369cbe1e	70	#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
8d0afcd7	71
369cbe1e LV	72	/* Clock Defines */
	73	#define V_OSCK 24000000 /* Clock output from T2 */
	74	#define V_SCLK (V_OSCK)
8d0afcd7	75
369cbe1e LV	76	/* NS16550 Configuration */
	77	#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
	78
76bfd162 FB	79	#define CONFIG_ENV_IS_IN_FAT
	80	#define FAT_ENV_INTERFACE "mmc"
	81	#define FAT_ENV_DEVICE_AND_PART "0:1"
	82	#define FAT_ENV_FILE "uboot.env"
	83	#define CONFIG_FAT_WRITE
369cbe1e LV	84
369cbe1e LV	85	#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
8d0afcd7	86
2b36fe57	87	/* SPL USB Support */
2b36fe57	88
592bc5e2 M	89	#if defined(CONFIG_SPL_USB_HOST_SUPPORT) \|\| !defined(CONFIG_SPL_BUILD)
592bc5e2 M	90	#define CONFIG_SYS_USB_FAT_BOOT_PARTITION 1
3d799c7f	91	#define CONFIG_USB_XHCI_OMAP
3d799c7f DM	92	#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
	93
	94	#define CONFIG_OMAP_USB_PHY
	95	#define CONFIG_AM437X_USB2PHY2_HOST
aee119bd	96	#endif
3d799c7f	97
a59a77f8	98	#if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_SPL_USBETH_SUPPORT)
b142729d	99	#undef CONFIG_USB_DWC3_PHY_OMAP
c16bf621	100	#undef CONFIG_USB_DWC3_OMAP
3457bbaf	101	#undef CONFIG_USB_DWC3
65403f30	102	#undef CONFIG_USB_DWC3_GADGET
3457bbaf	103
aaa4a9e3	104	#undef CONFIG_USB_GADGET_DOWNLOAD
a59a77f8	105	#undef CONFIG_USB_GADGET_VBUS_DRAW
e6c0bc06 SP	106	#undef CONFIG_G_DNL_MANUFACTURER
	107	#undef CONFIG_G_DNL_VENDOR_NUM
	108	#undef CONFIG_G_DNL_PRODUCT_NUM
3457bbaf	109	#undef CONFIG_USB_GADGET_DUALSPEED
a59a77f8 SP	110	#endif
a59a77f8 SP	111
8aff39e3 M	112	/*
	113	* Disable MMC DM for SPL build and can be re-enabled after adding
	114	* DM support in SPL
	115	*/
	116	#ifdef CONFIG_SPL_BUILD
	117	#undef CONFIG_DM_MMC
49f85b67 M	118	#undef CONFIG_DM_SPI
49f85b67 M	119	#undef CONFIG_DM_SPI_FLASH
1ce32ba7	120	#undef CONFIG_TIMER
8aff39e3 M	121	#endif
8aff39e3 M	122
a69e2c22 KVA	123	#ifndef CONFIG_SPL_BUILD
a69e2c22 KVA	124	/* USB Device Firmware Update support */
a69e2c22	125
a69e2c22 KVA	126	#define DFU_ALT_INFO_MMC \
	127	"dfu_alt_info_mmc=" \
	128	"boot part 0 1;" \
	129	"rootfs part 0 2;" \
	130	"MLO fat 0 1;" \
	131	"spl-os-args fat 0 1;" \
	132	"spl-os-image fat 0 1;" \
	133	"u-boot.img fat 0 1;" \
	134	"uEnv.txt fat 0 1\0"
	135
	136	#define DFU_ALT_INFO_EMMC \
	137	"dfu_alt_info_emmc=" \
	138	"MLO raw 0x100 0x100 mmcpart 0;" \
	139	"u-boot.img raw 0x300 0x1000 mmcpart 0\0"
	140
a69e2c22 KVA	141	#define DFU_ALT_INFO_RAM \
	142	"dfu_alt_info_ram=" \
	143	"kernel ram 0x80200000 0x4000000;" \
	144	"fdt ram 0x80f80000 0x80000;" \
	145	"ramdisk ram 0x81000000 0x4000000\0"
	146
42d1b818 V	147	#define DFU_ALT_INFO_QSPI \
	148	"dfu_alt_info_qspi=" \
	149	"u-boot.bin raw 0x0 0x080000;" \
	150	"u-boot.backup raw 0x080000 0x080000;" \
	151	"u-boot-spl-os raw 0x100000 0x010000;" \
	152	"u-boot-env raw 0x110000 0x010000;" \
	153	"u-boot-env.backup raw 0x120000 0x010000;" \
	154	"kernel raw 0x130000 0x800000\0"
	155
a69e2c22 KVA	156	#define DFUARGS \
	157	"dfu_bufsiz=0x10000\0" \
	158	DFU_ALT_INFO_MMC \
	159	DFU_ALT_INFO_EMMC \
42d1b818 V	160	DFU_ALT_INFO_RAM \
42d1b818 V	161	DFU_ALT_INFO_QSPI
a69e2c22 KVA	162	#else
	163	#define DFUARGS
	164	#endif
	165
7a5f71bc	166	#ifdef CONFIG_QSPI_BOOT
9aac7d0e MS	167	#ifndef CONFIG_SYS_TEXT_BASE
	168	#define CONFIG_SYS_TEXT_BASE CONFIG_ISW_ENTRY_ADDR
	169	#endif
76bfd162	170	#undef CONFIG_ENV_IS_IN_FAT
7a5f71bc SP	171	#define CONFIG_ENV_IS_IN_SPI_FLASH
	172	#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
	173	#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
	174	#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */
	175	#define CONFIG_ENV_OFFSET 0x110000
	176	#define CONFIG_ENV_OFFSET_REDUND 0x120000
	177	#ifdef MTDIDS_DEFAULT
	178	#undef MTDIDS_DEFAULT
	179	#endif
	180	#ifdef MTDPARTS_DEFAULT
	181	#undef MTDPARTS_DEFAULT
	182	#endif
	183	#define MTDPARTS_DEFAULT "mtdparts=qspi.0:512k(QSPI.u-boot)," \
	184	"512k(QSPI.u-boot.backup)," \
	185	"512k(QSPI.u-boot-spl-os)," \
	186	"64k(QSPI.u-boot-env)," \
	187	"64k(QSPI.u-boot-env.backup)," \
	188	"8m(QSPI.kernel)," \
	189	"-(QSPI.file-system)"
	190	#endif
	191
ea4c7a83 SP	192	/* SPI */
ea4c7a83 SP	193	#undef CONFIG_OMAP3_SPI
ea4c7a83 SP	194	#define CONFIG_TI_SPI_MMAP
	195	#define CONFIG_QSPI_SEL_GPIO 48
	196	#define CONFIG_SF_DEFAULT_SPEED 48000000
46f7bb00	197	#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
2d134597 V	198	#define CONFIG_QSPI_QUAD_SUPPORT
2d134597 V	199	#define CONFIG_TI_EDMA3
ea4c7a83	200
0f1b0443 TR	201	/* Enhance our eMMC support / experience. */
	202	#define CONFIG_CMD_GPT
	203	#define CONFIG_EFI_PARTITION
0f1b0443	204
1564dba7 LV	205	#ifndef CONFIG_SPL_BUILD
1564dba7 LV	206	#define CONFIG_EXTRA_ENV_SETTINGS \
fb3ad9bd	207	DEFAULT_LINUX_BOOT_ENV \
85d17be3	208	DEFAULT_MMC_TI_ARGS \
1564dba7 LV	209	"fdtfile=undefined\0" \
	210	"bootpart=0:2\0" \
	211	"bootdir=/boot\0" \
	212	"bootfile=zImage\0" \
	213	"console=ttyO0,115200n8\0" \
0f1b0443 TR	214	"partitions=" \
	215	"uuid_disk=${uuid_gpt_disk};" \
	216	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
1564dba7	217	"optargs=\0" \
2b36fe57 DM	218	"usbroot=/dev/sda2 rw\0" \
	219	"usbrootfstype=ext4 rootwait\0" \
	220	"usbdev=0\0" \
bea0fd5e	221	"ramroot=/dev/ram0 rw\0" \
1564dba7	222	"ramrootfstype=ext2\0" \
2b36fe57 DM	223	"usbargs=setenv bootargs console=${console} " \
	224	"${optargs} " \
	225	"root=${usbroot} " \
	226	"rootfstype=${usbrootfstype}\0" \
1564dba7 LV	227	"ramargs=setenv bootargs console=${console} " \
	228	"${optargs} " \
	229	"root=${ramroot} " \
	230	"rootfstype=${ramrootfstype}\0" \
2b36fe57 DM	231	"loadramdisk=load ${devtype} ${devnum} ${rdaddr} ramdisk.gz\0" \
	232	"loadimage=load ${devtype} ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
	233	"loadfdt=load ${devtype} ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
1564dba7	234	"mmcboot=mmc dev ${mmcdev}; " \
2b36fe57	235	"setenv devnum ${mmcdev}; " \
fa03834f	236	"setenv devtype mmc; " \
1564dba7	237	"if mmc rescan; then " \
2b36fe57	238	"echo SD/MMC found on device ${devnum};" \
1564dba7 LV	239	"if run loadimage; then " \
	240	"run loadfdt; " \
	241	"echo Booting from mmc${mmcdev} ...; " \
85d17be3	242	"run args_mmc; " \
1564dba7 LV	243	"bootz ${loadaddr} - ${fdtaddr}; " \
	244	"fi;" \
	245	"fi;\0" \
2b36fe57 DM	246	"usbboot=" \
	247	"setenv devnum ${usbdev}; " \
	248	"setenv devtype usb; " \
	249	"usb start ${usbdev}; " \
	250	"if usb dev ${usbdev}; then " \
	251	"if run loadbootenv; then " \
	252	"echo Loaded environment from ${bootenv};" \
	253	"run importbootenv;" \
	254	"fi;" \
	255	"if test -n $uenvcmd; then " \
	256	"echo Running uenvcmd ...;" \
	257	"run uenvcmd;" \
	258	"fi;" \
	259	"if run loadimage; then " \
	260	"run loadfdt; " \
	261	"echo Booting from usb ${usbdev}...; " \
	262	"run usbargs;" \
	263	"bootz ${loadaddr} - ${fdtaddr}; " \
	264	"fi;" \
	265	"fi\0" \
bf0385d7 KVA	266	"fi;" \
bf0385d7 KVA	267	"usb stop ${usbdev};\0" \
1564dba7 LV	268	"findfdt="\
	269	"if test $board_name = AM43EPOS; then " \
	270	"setenv fdtfile am43x-epos-evm.dtb; fi; " \
	271	"if test $board_name = AM43__GP; then " \
	272	"setenv fdtfile am437x-gp-evm.dtb; fi; " \
a5051b72 MS	273	"if test $board_name = AM43XXHS; then " \
a5051b72 MS	274	"setenv fdtfile am437x-gp-evm.dtb; fi; " \
9cb9f333 FB	275	"if test $board_name = AM43__SK; then " \
9cb9f333 FB	276	"setenv fdtfile am437x-sk-evm.dtb; fi; " \
403d70ab FB	277	"if test $board_name = AM43_IDK; then " \
403d70ab FB	278	"setenv fdtfile am437x-idk-evm.dtb; fi; " \
1564dba7	279	"if test $fdtfile = undefined; then " \
a69e2c22	280	"echo WARNING: Could not determine device tree; fi; \0" \
0ad5eaa4	281	NANDARGS \
2320866b	282	NETARGS \
a69e2c22	283	DFUARGS \
1564dba7 LV	284
	285	#define CONFIG_BOOTCOMMAND \
	286	"run findfdt; " \
18c534bb	287	"run envboot;" \
2b36fe57	288	"run mmcboot;" \
0ad5eaa4 TR	289	"run usbboot;" \
0ad5eaa4 TR	290	NANDBOOT \
1564dba7	291
3a3939bf M	292	#endif
3a3939bf M	293
f4787eab	294	#ifndef CONFIG_SPL_BUILD
4cdd7fda	295	/* CPSW Ethernet */
4cdd7fda M	296	#define CONFIG_MII
	297	#define CONFIG_BOOTP_DEFAULT
	298	#define CONFIG_BOOTP_DNS
	299	#define CONFIG_BOOTP_DNS2
	300	#define CONFIG_BOOTP_SEND_HOSTNAME
	301	#define CONFIG_BOOTP_GATEWAY
	302	#define CONFIG_BOOTP_SUBNETMASK
	303	#define CONFIG_NET_RETRY_COUNT 10
4cdd7fda	304	#define CONFIG_PHY_GIGE
f4787eab M	305	#endif
	306
	307	#define CONFIG_DRIVER_TI_CPSW
4cdd7fda	308	#define CONFIG_PHYLIB
d9da26ec	309	#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
3a3939bf	310
f4787eab M	311	#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_ETH_SUPPORT)
	312	#undef CONFIG_ENV_IS_IN_FAT
	313	#define CONFIG_ENV_IS_NOWHERE
f4787eab M	314	#endif
f4787eab M	315
4cdd7fda	316	#define CONFIG_SYS_RX_ETH_BUFFER 64
4cdd7fda	317
e53ad4b4	318	/* NAND support */
	319	#ifdef CONFIG_NAND
	320	/* NAND: device related configs */
	321	#define CONFIG_SYS_NAND_PAGE_SIZE 4096
	322	#define CONFIG_SYS_NAND_OOBSIZE 224
	323	#define CONFIG_SYS_NAND_BLOCK_SIZE (256*1024)
	324	#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
	325	CONFIG_SYS_NAND_PAGE_SIZE)
	326	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	327	/* NAND: driver related configs */
	328	#define CONFIG_NAND_OMAP_GPMC
	329	#define CONFIG_NAND_OMAP_ELM
	330	#define CONFIG_SYS_NAND_ONFI_DETECTION
	331	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH16_CODE_HW
	332	#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
	333	#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
	334	10, 11, 12, 13, 14, 15, 16, 17, 18, 19, \
	335	20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
	336	30, 31, 32, 33, 34, 35, 36, 37, 38, 39, \
	337	40, 41, 42, 43, 44, 45, 46, 47, 48, 49, \
	338	50, 51, 52, 53, 54, 55, 56, 57, 58, 59, \
	339	60, 61, 62, 63, 64, 65, 66, 67, 68, 69, \
	340	70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
	341	80, 81, 82, 83, 84, 85, 86, 87, 88, 89, \
	342	90, 91, 92, 93, 94, 95, 96, 97, 98, 99, \
	343	100, 101, 102, 103, 104, 105, 106, 107, 108, 109, \
	344	110, 111, 112, 113, 114, 115, 116, 117, 118, 119, \
	345	120, 121, 122, 123, 124, 125, 126, 127, 128, 129, \
	346	130, 131, 132, 133, 134, 135, 136, 137, 138, 139, \
	347	140, 141, 142, 143, 144, 145, 146, 147, 148, 149, \
	348	150, 151, 152, 153, 154, 155, 156, 157, 158, 159, \
	349	160, 161, 162, 163, 164, 165, 166, 167, 168, 169, \
	350	170, 171, 172, 173, 174, 175, 176, 177, 178, 179, \
	351	180, 181, 182, 183, 184, 185, 186, 187, 188, 189, \
	352	190, 191, 192, 193, 194, 195, 196, 197, 198, 199, \
	353	200, 201, 202, 203, 204, 205, 206, 207, 208, 209, \
	354	}
	355	#define CONFIG_SYS_NAND_ECCSIZE 512
	356	#define CONFIG_SYS_NAND_ECCBYTES 26
	357	#define MTDIDS_DEFAULT "nand0=nand.0"
	358	#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \
	359	"256k(NAND.SPL)," \
	360	"256k(NAND.SPL.backup1)," \
	361	"256k(NAND.SPL.backup2)," \
	362	"256k(NAND.SPL.backup3)," \
	363	"512k(NAND.u-boot-spl-os)," \
	364	"1m(NAND.u-boot)," \
	365	"256k(NAND.u-boot-env)," \
	366	"256k(NAND.u-boot-env.backup1)," \
	367	"7m(NAND.kernel)," \
9ddef489	368	"-(NAND.file-system)"
e53ad4b4	369	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00180000
	370	/* NAND: SPL related configs */
	371	#ifdef CONFIG_SPL_NAND_SUPPORT
	372	#define CONFIG_SPL_NAND_AM33XX_BCH
	373	#endif
	374	/* NAND: SPL falcon mode configs */
	375	#ifdef CONFIG_SPL_OS_BOOT
	376	#define CONFIG_CMD_SPL_NAND_OFS 0x00100000 /* os parameters */
	377	#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */
	378	#define CONFIG_CMD_SPL_WRITE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
	379	#endif
0ad5eaa4 TR	380	#define NANDARGS \
	381	"mtdids=" MTDIDS_DEFAULT "\0" \
	382	"mtdparts=" MTDPARTS_DEFAULT "\0" \
	383	"nandargs=setenv bootargs console=${console} " \
	384	"${optargs} " \
	385	"root=${nandroot} " \
	386	"rootfstype=${nandrootfstype}\0" \
	387	"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \
	388	"nandrootfstype=ubifs rootwait=1\0" \
	389	"nandboot=echo Booting from nand ...; " \
	390	"run nandargs; " \
	391	"nand read ${fdtaddr} NAND.u-boot-spl-os; " \
	392	"nand read ${loadaddr} NAND.kernel; " \
	393	"bootz ${loadaddr} - ${fdtaddr}\0"
	394	#define NANDBOOT "run nandboot; "
	395	#else /* !CONFIG_NAND */
	396	#define NANDARGS
	397	#define NANDBOOT
	398	#endif /* CONFIG_NAND */
e53ad4b4	399
8d0afcd7	400	#endif /* __CONFIG_AM43XX_EVM_H */