[people/ms/u-boot.git] / include / configs / at91sam9rlek.h

/*
 * (C) Copyright 2007-2008
 * Stelian Pop <stelian@popies.net>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Configuation settings for the AT91SAM9RLEK board.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/hardware.h>

#define CONFIG_SYS_TEXT_BASE		0x21F00000

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* main clock xtal */
#define CONFIG_SYS_HZ			1000

#define CONFIG_AT91SAM9RLEK		1	/* It's an AT91SAM9RLEK Board */

#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SKIP_LOWLEVEL_INIT
#define CONFIG_BOARD_EARLY_INIT_F

#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1

#define CONFIG_DISPLAY_CPUINFO

#define CONFIG_ATMEL_LEGACY
#define CONFIG_AT91_GPIO		1
#define CONFIG_AT91_GPIO_PULLUP		1

/*
 * Hardware drivers
 */

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define CONFIG_USART_ID			ATMEL_ID_SYS
#define CONFIG_BAUDRATE			115200

/* LCD */
#define CONFIG_LCD			1
#define LCD_BPP				LCD_COLOR8
#define CONFIG_LCD_LOGO			1
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO			1
#define CONFIG_LCD_INFO_BELOW_LOGO	1
#define CONFIG_SYS_WHITE_ON_BLACK	1
#define CONFIG_ATMEL_LCD		1
#define CONFIG_ATMEL_LCD_RGB565		1
/* Let board_init_f handle the framebuffer allocation */
#undef CONFIG_FB_ADDR
#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1


/* LED */
#define CONFIG_AT91_LED
#define	CONFIG_RED_LED		AT91_PIN_PD14	/* this is the power led */
#define	CONFIG_GREEN_LED	AT91_PIN_PD15	/* this is the user1 led */
#define	CONFIG_YELLOW_LED	AT91_PIN_PD16	/* this is the user2 led */

#define CONFIG_BOOTDELAY	3

/*
 * Command line configuration.
 */
#include <config_cmd_default.h>
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_LOADS
#undef CONFIG_CMD_NET
#undef CONFIG_CMD_NFS
#undef CONFIG_CMD_SOURCE
#undef CONFIG_CMD_USB

#define CONFIG_CMD_NAND			1

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE		0x04000000

#define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH			1
#define CONFIG_SYS_SPI_WRITE_TOUT		(5*CONFIG_SYS_HZ)
#define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
#define AT91_SPI_CLK				15000000
#define DATAFLASH_TCSS				(0x1a << 16)
#define DATAFLASH_TCHS				(0x1 << 24)

/* NOR flash - not present */
#define CONFIG_SYS_NO_FLASH			1

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE		1
#define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8			1
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PB6
#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PD17

#endif

/* Ethernet - not present */

/* USB - not supported */

#define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */

#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END			0x23e00000

#ifdef CONFIG_SYS_USE_DATAFLASH

/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_ENV_IS_IN_DATAFLASH	1
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
#define CONFIG_ENV_OFFSET		0x4200
#define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE		0x4200
#define CONFIG_BOOTCOMMAND	"cp.b 0xC0084000 0x22000000 0x210000; bootm"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"root=/dev/mtdblock0 " \
				"mtdparts=atmel_nand:-(root) "\
				"rw rootfstype=jffs2"

#else /* CONFIG_SYS_USE_NANDFLASH */

/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND		1
#define CONFIG_ENV_OFFSET		0x60000
#define CONFIG_ENV_OFFSET_REDUND	0x80000
#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0xA0000 0x200000; bootm"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"root=/dev/mtdblock5 " \
				"mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
				"rw rootfstype=jffs2"

#endif

#define CONFIG_SYS_PROMPT		"U-Boot> "
#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP		1
#define CONFIG_CMDLINE_EDITING		1
#define CONFIG_AUTO_COMPLETE

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)

#endif
Commit	Line	Data
2118ebb4 SP	1	/*
2118ebb4 SP	2	* (C) Copyright 2007-2008
c9e798d3	3	* Stelian Pop <stelian@popies.net>
2118ebb4 SP	4	* Lead Tech Design <www.leadtechdesign.com>
	5	*
	6	* Configuation settings for the AT91SAM9RLEK board.
	7	*
	8	* See file CREDITS for list of people who contributed to this
	9	* project.
	10	*
	11	* This program is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of
	14	* the License, or (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	24	* MA 02111-1307 USA
	25	*/
	26
	27	#ifndef __CONFIG_H
	28	#define __CONFIG_H
	29
21d671d0 XH	30	#include <asm/hardware.h>
	31
	32	#define CONFIG_SYS_TEXT_BASE 0x21F00000
425de62d	33
2118ebb4	34	/* ARM asynchronous clock */
21d671d0 XH	35	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
	36	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
	37	#define CONFIG_SYS_HZ 1000
	38
	39	#define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */
2118ebb4	40
dc39ae95	41	#define CONFIG_ARCH_CPU_INIT
21d671d0 XH	42	#define CONFIG_SKIP_LOWLEVEL_INIT
21d671d0 XH	43	#define CONFIG_BOARD_EARLY_INIT_F
2118ebb4	44
21d671d0 XH	45	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	46	#define CONFIG_SETUP_MEMORY_TAGS 1
	47	#define CONFIG_INITRD_TAG 1
2118ebb4	48
21d671d0 XH	49	#define CONFIG_DISPLAY_CPUINFO
	50
	51	#define CONFIG_ATMEL_LEGACY
	52	#define CONFIG_AT91_GPIO 1
	53	#define CONFIG_AT91_GPIO_PULLUP 1
2118ebb4 SP	54
	55	/*
	56	* Hardware drivers
	57	*/
21d671d0 XH	58
	59	/* serial console */
	60	#define CONFIG_ATMEL_USART
	61	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	62	#define CONFIG_USART_ID ATMEL_ID_SYS
	63	#define CONFIG_BAUDRATE 115200
2118ebb4	64
761c70b8 SP	65	/* LCD */
	66	#define CONFIG_LCD 1
	67	#define LCD_BPP LCD_COLOR8
	68	#define CONFIG_LCD_LOGO 1
	69	#undef LCD_TEST_PATTERN
	70	#define CONFIG_LCD_INFO 1
	71	#define CONFIG_LCD_INFO_BELOW_LOGO 1
21d671d0	72	#define CONFIG_SYS_WHITE_ON_BLACK 1
761c70b8 SP	73	#define CONFIG_ATMEL_LCD 1
761c70b8 SP	74	#define CONFIG_ATMEL_LCD_RGB565 1
21d671d0 XH	75	/* Let board_init_f handle the framebuffer allocation */
	76	#undef CONFIG_FB_ADDR
	77	#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
	78
761c70b8	79
a484b00b JCPV	80	/* LED */
	81	#define CONFIG_AT91_LED
	82	#define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */
	83	#define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */
	84	#define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */
	85
2118ebb4 SP	86	#define CONFIG_BOOTDELAY 3
2118ebb4 SP	87
2118ebb4 SP	88	/*
	89	* Command line configuration.
	90	*/
	91	#include <config_cmd_default.h>
	92	#undef CONFIG_CMD_BDI
2118ebb4	93	#undef CONFIG_CMD_FPGA
74de7aef	94	#undef CONFIG_CMD_IMI
2118ebb4	95	#undef CONFIG_CMD_IMLS
74de7aef	96	#undef CONFIG_CMD_LOADS
2118ebb4	97	#undef CONFIG_CMD_NET
21d671d0	98	#undef CONFIG_CMD_NFS
74de7aef	99	#undef CONFIG_CMD_SOURCE
2118ebb4 SP	100	#undef CONFIG_CMD_USB
2118ebb4 SP	101
21d671d0	102	#define CONFIG_CMD_NAND 1
2118ebb4 SP	103
	104	/* SDRAM */
	105	#define CONFIG_NR_DRAM_BANKS 1
21d671d0 XH	106	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
	107	#define CONFIG_SYS_SDRAM_SIZE 0x04000000
	108
	109	#define CONFIG_SYS_INIT_SP_ADDR \
	110	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
2118ebb4 SP	111
2118ebb4 SP	112	/* DataFlash */
4758ebdd	113	#define CONFIG_ATMEL_DATAFLASH_SPI
21d671d0	114	#define CONFIG_HAS_DATAFLASH 1
6d0f6bcf JCPV	115	#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
	116	#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
	117	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
21d671d0 XH	118	#define AT91_SPI_CLK 15000000
	119	#define DATAFLASH_TCSS (0x1a << 16)
	120	#define DATAFLASH_TCHS (0x1 << 24)
2118ebb4 SP	121
2118ebb4 SP	122	/* NOR flash - not present */
6d0f6bcf	123	#define CONFIG_SYS_NO_FLASH 1
2118ebb4 SP	124
2118ebb4 SP	125	/* NAND flash */
74c076d6 JCPV	126	#ifdef CONFIG_CMD_NAND
74c076d6 JCPV	127	#define CONFIG_NAND_ATMEL
6d0f6bcf	128	#define CONFIG_SYS_MAX_NAND_DEVICE 1
21d671d0	129	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
6d0f6bcf	130	#define CONFIG_SYS_NAND_DBW_8 1
74c076d6 JCPV	131	/* our ALE is AD21 */
	132	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	133	/* our CLE is AD22 */
	134	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	135	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
	136	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
2eb99ca8	137
74c076d6	138	#endif
2118ebb4 SP	139
	140	/* Ethernet - not present */
	141
	142	/* USB - not supported */
	143
6d0f6bcf	144	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
2118ebb4	145
21d671d0	146	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
6d0f6bcf	147	#define CONFIG_SYS_MEMTEST_END 0x23e00000
2118ebb4	148
6d0f6bcf	149	#ifdef CONFIG_SYS_USE_DATAFLASH
2118ebb4 SP	150
2118ebb4 SP	151	/* bootstrap + u-boot + env + linux in dataflash on CS0 */
057c849c	152	#define CONFIG_ENV_IS_IN_DATAFLASH 1
6d0f6bcf	153	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
0e8d1586	154	#define CONFIG_ENV_OFFSET 0x4200
6d0f6bcf	155	#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
0e8d1586	156	#define CONFIG_ENV_SIZE 0x4200
e139cb31	157	#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
2118ebb4 SP	158	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
2118ebb4 SP	159	"root=/dev/mtdblock0 " \
918319c7	160	"mtdparts=atmel_nand:-(root) "\
2118ebb4 SP	161	"rw rootfstype=jffs2"
2118ebb4 SP	162
6d0f6bcf	163	#else /* CONFIG_SYS_USE_NANDFLASH */
2118ebb4 SP	164
2118ebb4 SP	165	/* bootstrap + u-boot + env + linux in nandflash */
21d671d0	166	#define CONFIG_ENV_IS_IN_NAND 1
0e8d1586 JCPV	167	#define CONFIG_ENV_OFFSET 0x60000
	168	#define CONFIG_ENV_OFFSET_REDUND 0x80000
	169	#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
2118ebb4 SP	170	#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
	171	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
	172	"root=/dev/mtdblock5 " \
918319c7	173	"mtdparts=atmel_nand:128k(bootstrap)ro,256k(uboot)ro,128k(env1)ro,128k(env2)ro,2M(linux),-(root) " \
2118ebb4 SP	174	"rw rootfstype=jffs2"
	175
	176	#endif
	177
6d0f6bcf JCPV	178	#define CONFIG_SYS_PROMPT "U-Boot> "
	179	#define CONFIG_SYS_CBSIZE 256
	180	#define CONFIG_SYS_MAXARGS 16
	181	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
	182	#define CONFIG_SYS_LONGHELP 1
21d671d0	183	#define CONFIG_CMDLINE_EDITING 1
e139cb31	184	#define CONFIG_AUTO_COMPLETE
2118ebb4	185
2118ebb4 SP	186	/*
	187	* Size of malloc() pool
	188	*/
21d671d0	189	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
2118ebb4	190
2118ebb4	191	#endif