[people/ms/u-boot.git] / include / configs / at91sam9rlek.h

/*
 * (C) Copyright 2007-2008
 * Stelian Pop <stelian@popies.net>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Configuation settings for the AT91SAM9RLEK board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/hardware.h>

#define CONFIG_SYS_TEXT_BASE		0x21F00000

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* main clock xtal */

#define CONFIG_AT91SAM9RLEK		1	/* It's an AT91SAM9RLEK Board */

#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SKIP_LOWLEVEL_INIT

#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1

#define CONFIG_ATMEL_LEGACY

/*
 * Hardware drivers
 */

/* LCD */
#define LCD_BPP				LCD_COLOR8
#define CONFIG_LCD_LOGO			1
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO			1
#define CONFIG_LCD_INFO_BELOW_LOGO	1
#define CONFIG_ATMEL_LCD		1
#define CONFIG_ATMEL_LCD_RGB565		1
/* Let board_init_f handle the framebuffer allocation */
#undef CONFIG_FB_ADDR

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE		0x04000000

#define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH			1
#define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
#define AT91_SPI_CLK				15000000
#define DATAFLASH_TCSS				(0x1a << 16)
#define DATAFLASH_TCHS				(0x1 << 24)

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE		1
#define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8			1
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PB6
#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PD17

#endif

/* Ethernet - not present */

/* USB - not supported */

#define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */

#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END			0x23e00000

#ifdef CONFIG_SYS_USE_DATAFLASH

/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
#define CONFIG_ENV_OFFSET		0x4200
#define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE		0x4200
#define CONFIG_BOOTCOMMAND	"cp.b 0xC0084000 0x22000000 0x210000; bootm"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"root=/dev/mtdblock0 " \
				"mtdparts=atmel_nand:-(root) "\
				"rw rootfstype=jffs2"

#elif CONFIG_SYS_USE_NANDFLASH

/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_OFFSET		0x120000
#define CONFIG_ENV_OFFSET_REDUND	0x100000
#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x600000; "	\
				"nand read 0x21000000 0x180000 0x80000; "	\
				"bootz 0x22000000 - 0x21000000"
#define CONFIG_BOOTARGS		\
				"console=ttyS0,115200 earlyprintk "				\
				"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
				"256K(env),256k(env_redundant),256k(spare),"			\
				"512k(dtb),6M(kernel)ro,-(rootfs) "				\
				"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"

#else /* CONFIG_SYS_USE_MMC */

/* bootstrap + u-boot + env + linux in mmc */
#define CONFIG_ENV_SIZE		0x4000
#define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
				"fatload mmc 0:1 0x22000000 zImage; " \
				"bootz 0x22000000 - 0x21000000"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"mtdparts=atmel_nand:" \
				"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
				"root=/dev/mmcblk0p2 rw rootwait"
#endif

#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_LONGHELP		1
#define CONFIG_CMDLINE_EDITING		1
#define CONFIG_AUTO_COMPLETE

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)

#endif
Commit	Line	Data
2118ebb4 SP	1	/*
2118ebb4 SP	2	* (C) Copyright 2007-2008
c9e798d3	3	* Stelian Pop <stelian@popies.net>
2118ebb4 SP	4	* Lead Tech Design <www.leadtechdesign.com>
	5	*
	6	* Configuation settings for the AT91SAM9RLEK board.
	7	*
1a459660	8	* SPDX-License-Identifier: GPL-2.0+
2118ebb4 SP	9	*/
	10
	11	#ifndef __CONFIG_H
	12	#define __CONFIG_H
	13
21d671d0 XH	14	#include <asm/hardware.h>
	15
	16	#define CONFIG_SYS_TEXT_BASE 0x21F00000
425de62d	17
2118ebb4	18	/* ARM asynchronous clock */
21d671d0 XH	19	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
21d671d0 XH	20	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
21d671d0 XH	21
21d671d0 XH	22	#define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */
2118ebb4	23
dc39ae95	24	#define CONFIG_ARCH_CPU_INIT
21d671d0	25	#define CONFIG_SKIP_LOWLEVEL_INIT
2118ebb4	26
21d671d0 XH	27	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	28	#define CONFIG_SETUP_MEMORY_TAGS 1
	29	#define CONFIG_INITRD_TAG 1
2118ebb4	30
21d671d0	31	#define CONFIG_ATMEL_LEGACY
2118ebb4 SP	32
	33	/*
	34	* Hardware drivers
	35	*/
21d671d0	36
761c70b8	37	/* LCD */
761c70b8 SP	38	#define LCD_BPP LCD_COLOR8
	39	#define CONFIG_LCD_LOGO 1
	40	#undef LCD_TEST_PATTERN
	41	#define CONFIG_LCD_INFO 1
	42	#define CONFIG_LCD_INFO_BELOW_LOGO 1
761c70b8 SP	43	#define CONFIG_ATMEL_LCD 1
761c70b8 SP	44	#define CONFIG_ATMEL_LCD_RGB565 1
21d671d0 XH	45	/* Let board_init_f handle the framebuffer allocation */
21d671d0 XH	46	#undef CONFIG_FB_ADDR
21d671d0	47
2118ebb4 SP	48	/* SDRAM */
2118ebb4 SP	49	#define CONFIG_NR_DRAM_BANKS 1
21d671d0 XH	50	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
	51	#define CONFIG_SYS_SDRAM_SIZE 0x04000000
	52
	53	#define CONFIG_SYS_INIT_SP_ADDR \
2011dca2	54	(ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
2118ebb4 SP	55
2118ebb4 SP	56	/* DataFlash */
4758ebdd	57	#define CONFIG_ATMEL_DATAFLASH_SPI
21d671d0	58	#define CONFIG_HAS_DATAFLASH 1
6d0f6bcf JCPV	59	#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
6d0f6bcf JCPV	60	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
21d671d0 XH	61	#define AT91_SPI_CLK 15000000
	62	#define DATAFLASH_TCSS (0x1a << 16)
	63	#define DATAFLASH_TCHS (0x1 << 24)
2118ebb4	64
2118ebb4	65	/* NAND flash */
74c076d6 JCPV	66	#ifdef CONFIG_CMD_NAND
74c076d6 JCPV	67	#define CONFIG_NAND_ATMEL
6d0f6bcf	68	#define CONFIG_SYS_MAX_NAND_DEVICE 1
21d671d0	69	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
6d0f6bcf	70	#define CONFIG_SYS_NAND_DBW_8 1
74c076d6 JCPV	71	/* our ALE is AD21 */
	72	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	73	/* our CLE is AD22 */
	74	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	75	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
	76	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
2eb99ca8	77
74c076d6	78	#endif
2118ebb4 SP	79
	80	/* Ethernet - not present */
	81
	82	/* USB - not supported */
	83
6d0f6bcf	84	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
2118ebb4	85
21d671d0	86	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
6d0f6bcf	87	#define CONFIG_SYS_MEMTEST_END 0x23e00000
2118ebb4	88
6d0f6bcf	89	#ifdef CONFIG_SYS_USE_DATAFLASH
2118ebb4 SP	90
2118ebb4 SP	91	/* bootstrap + u-boot + env + linux in dataflash on CS0 */
6d0f6bcf	92	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
0e8d1586	93	#define CONFIG_ENV_OFFSET 0x4200
6d0f6bcf	94	#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
0e8d1586	95	#define CONFIG_ENV_SIZE 0x4200
e139cb31	96	#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
2118ebb4 SP	97	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
2118ebb4 SP	98	"root=/dev/mtdblock0 " \
918319c7	99	"mtdparts=atmel_nand:-(root) "\
2118ebb4 SP	100	"rw rootfstype=jffs2"
2118ebb4 SP	101
0b128434	102	#elif CONFIG_SYS_USE_NANDFLASH
2118ebb4 SP	103
2118ebb4 SP	104	/* bootstrap + u-boot + env + linux in nandflash */
2011dca2	105	#define CONFIG_ENV_OFFSET 0x120000
65b553b7	106	#define CONFIG_ENV_OFFSET_REDUND 0x100000
0e8d1586	107	#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
65b553b7 WJ	108	#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
	109	"nand read 0x21000000 0x180000 0x80000; " \
	110	"bootz 0x22000000 - 0x21000000"
	111	#define CONFIG_BOOTARGS \
	112	"console=ttyS0,115200 earlyprintk " \
	113	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
ae5070d6	114	"256K(env),256k(env_redundant),256k(spare)," \
65b553b7 WJ	115	"512k(dtb),6M(kernel)ro,-(rootfs) " \
65b553b7 WJ	116	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
2118ebb4	117
0b128434 WJ	118	#else /* CONFIG_SYS_USE_MMC */
	119
	120	/* bootstrap + u-boot + env + linux in mmc */
0b128434 WJ	121	#define CONFIG_ENV_SIZE 0x4000
	122	#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
	123	"fatload mmc 0:1 0x22000000 zImage; " \
	124	"bootz 0x22000000 - 0x21000000"
	125	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
	126	"mtdparts=atmel_nand:" \
	127	"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
	128	"root=/dev/mmcblk0p2 rw rootwait"
2118ebb4 SP	129	#endif
2118ebb4 SP	130
6d0f6bcf JCPV	131	#define CONFIG_SYS_CBSIZE 256
6d0f6bcf JCPV	132	#define CONFIG_SYS_MAXARGS 16
6d0f6bcf	133	#define CONFIG_SYS_LONGHELP 1
21d671d0	134	#define CONFIG_CMDLINE_EDITING 1
e139cb31	135	#define CONFIG_AUTO_COMPLETE
2118ebb4	136
2118ebb4 SP	137	/*
	138	* Size of malloc() pool
	139	*/
21d671d0	140	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
2118ebb4	141
2118ebb4	142	#endif