[people/ms/u-boot.git] / include / configs / at91sam9rlek.h

/*
 * (C) Copyright 2007-2008
 * Stelian Pop <stelian@popies.net>
 * Lead Tech Design <www.leadtechdesign.com>
 *
 * Configuation settings for the AT91SAM9RLEK board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#include <asm/hardware.h>

#define CONFIG_SYS_TEXT_BASE		0x21F00000

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* main clock xtal */

#define CONFIG_AT91SAM9RLEK		1	/* It's an AT91SAM9RLEK Board */

#define CONFIG_ARCH_CPU_INIT
#define CONFIG_SKIP_LOWLEVEL_INIT

#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS	1
#define CONFIG_INITRD_TAG		1

#define CONFIG_ATMEL_LEGACY
#define CONFIG_AT91_GPIO		1
#define CONFIG_AT91_GPIO_PULLUP		1

/*
 * Hardware drivers
 */

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE		ATMEL_BASE_DBGU
#define CONFIG_USART_ID			ATMEL_ID_SYS
#define CONFIG_BAUDRATE			115200

/* LCD */
#define LCD_BPP				LCD_COLOR8
#define CONFIG_LCD_LOGO			1
#undef LCD_TEST_PATTERN
#define CONFIG_LCD_INFO			1
#define CONFIG_LCD_INFO_BELOW_LOGO	1
#define CONFIG_SYS_WHITE_ON_BLACK	1
#define CONFIG_ATMEL_LCD		1
#define CONFIG_ATMEL_LCD_RGB565		1
/* Let board_init_f handle the framebuffer allocation */
#undef CONFIG_FB_ADDR

/* LED */
#define CONFIG_AT91_LED
#define	CONFIG_RED_LED		AT91_PIN_PD14	/* this is the power led */
#define	CONFIG_GREEN_LED	AT91_PIN_PD15	/* this is the user1 led */
#define	CONFIG_YELLOW_LED	AT91_PIN_PD16	/* this is the user2 led */


/*
 * Command line configuration.
 */

#define CONFIG_CMD_NAND			1

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		ATMEL_BASE_CS1
#define CONFIG_SYS_SDRAM_SIZE		0x04000000

#define CONFIG_SYS_INIT_SP_ADDR \
	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */
#define CONFIG_ATMEL_DATAFLASH_SPI
#define CONFIG_HAS_DATAFLASH			1
#define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
#define AT91_SPI_CLK				15000000
#define DATAFLASH_TCSS				(0x1a << 16)
#define DATAFLASH_TCHS				(0x1 << 24)

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE		1
#define CONFIG_SYS_NAND_BASE			ATMEL_BASE_CS3
#define CONFIG_SYS_NAND_DBW_8			1
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE		(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PB6
#define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PD17

#endif

/* MMC */

#ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_ATMEL_MCI
#endif

/* Ethernet - not present */

/* USB - not supported */

#define CONFIG_SYS_LOAD_ADDR			0x22000000	/* load address */

#define CONFIG_SYS_MEMTEST_START		CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END			0x23e00000

#ifdef CONFIG_SYS_USE_DATAFLASH

/* bootstrap + u-boot + env + linux in dataflash on CS0 */
#define CONFIG_ENV_IS_IN_DATAFLASH	1
#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
#define CONFIG_ENV_OFFSET		0x4200
#define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
#define CONFIG_ENV_SIZE		0x4200
#define CONFIG_BOOTCOMMAND	"cp.b 0xC0084000 0x22000000 0x210000; bootm"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"root=/dev/mtdblock0 " \
				"mtdparts=atmel_nand:-(root) "\
				"rw rootfstype=jffs2"

#elif CONFIG_SYS_USE_NANDFLASH

/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND		1
#define CONFIG_ENV_OFFSET		0xc0000
#define CONFIG_ENV_OFFSET_REDUND	0x100000
#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND	"nand read 0x22000000 0x200000 0x600000; "	\
				"nand read 0x21000000 0x180000 0x80000; "	\
				"bootz 0x22000000 - 0x21000000"
#define CONFIG_BOOTARGS		\
				"console=ttyS0,115200 earlyprintk "				\
				"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
				"256K(env),256k(env_redundant),256k(spare),"			\
				"512k(dtb),6M(kernel)ro,-(rootfs) "				\
				"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"

#else /* CONFIG_SYS_USE_MMC */

/* bootstrap + u-boot + env + linux in mmc */
#define CONFIG_ENV_IS_IN_FAT
#define CONFIG_FAT_WRITE
#define FAT_ENV_INTERFACE	"mmc"
#define FAT_ENV_FILE		"uboot.env"
#define FAT_ENV_DEVICE_AND_PART	"0"
#define CONFIG_ENV_SIZE		0x4000
#define CONFIG_BOOTCOMMAND	"fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
				"fatload mmc 0:1 0x22000000 zImage; " \
				"bootz 0x22000000 - 0x21000000"
#define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
				"mtdparts=atmel_nand:" \
				"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
				"root=/dev/mmcblk0p2 rw rootwait"
#endif

#define CONFIG_SYS_CBSIZE		256
#define CONFIG_SYS_MAXARGS		16
#define CONFIG_SYS_LONGHELP		1
#define CONFIG_CMDLINE_EDITING		1
#define CONFIG_AUTO_COMPLETE

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN	ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)

#endif
Commit	Line	Data
2118ebb4 SP	1	/*
2118ebb4 SP	2	* (C) Copyright 2007-2008
c9e798d3	3	* Stelian Pop <stelian@popies.net>
2118ebb4 SP	4	* Lead Tech Design <www.leadtechdesign.com>
	5	*
	6	* Configuation settings for the AT91SAM9RLEK board.
	7	*
1a459660	8	* SPDX-License-Identifier: GPL-2.0+
2118ebb4 SP	9	*/
	10
	11	#ifndef __CONFIG_H
	12	#define __CONFIG_H
	13
21d671d0 XH	14	#include <asm/hardware.h>
	15
	16	#define CONFIG_SYS_TEXT_BASE 0x21F00000
425de62d	17
2118ebb4	18	/* ARM asynchronous clock */
21d671d0 XH	19	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
21d671d0 XH	20	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
21d671d0 XH	21
21d671d0 XH	22	#define CONFIG_AT91SAM9RLEK 1 /* It's an AT91SAM9RLEK Board */
2118ebb4	23
dc39ae95	24	#define CONFIG_ARCH_CPU_INIT
21d671d0	25	#define CONFIG_SKIP_LOWLEVEL_INIT
2118ebb4	26
21d671d0 XH	27	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
	28	#define CONFIG_SETUP_MEMORY_TAGS 1
	29	#define CONFIG_INITRD_TAG 1
2118ebb4	30
21d671d0 XH	31	#define CONFIG_ATMEL_LEGACY
	32	#define CONFIG_AT91_GPIO 1
	33	#define CONFIG_AT91_GPIO_PULLUP 1
2118ebb4 SP	34
	35	/*
	36	* Hardware drivers
	37	*/
21d671d0 XH	38
	39	/* serial console */
	40	#define CONFIG_ATMEL_USART
	41	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	42	#define CONFIG_USART_ID ATMEL_ID_SYS
	43	#define CONFIG_BAUDRATE 115200
2118ebb4	44
761c70b8	45	/* LCD */
761c70b8 SP	46	#define LCD_BPP LCD_COLOR8
	47	#define CONFIG_LCD_LOGO 1
	48	#undef LCD_TEST_PATTERN
	49	#define CONFIG_LCD_INFO 1
	50	#define CONFIG_LCD_INFO_BELOW_LOGO 1
21d671d0	51	#define CONFIG_SYS_WHITE_ON_BLACK 1
761c70b8 SP	52	#define CONFIG_ATMEL_LCD 1
761c70b8 SP	53	#define CONFIG_ATMEL_LCD_RGB565 1
21d671d0 XH	54	/* Let board_init_f handle the framebuffer allocation */
21d671d0 XH	55	#undef CONFIG_FB_ADDR
21d671d0	56
a484b00b JCPV	57	/* LED */
	58	#define CONFIG_AT91_LED
	59	#define CONFIG_RED_LED AT91_PIN_PD14 /* this is the power led */
	60	#define CONFIG_GREEN_LED AT91_PIN_PD15 /* this is the user1 led */
	61	#define CONFIG_YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */
	62
2118ebb4	63
2118ebb4 SP	64	/*
	65	* Command line configuration.
	66	*/
2118ebb4	67
21d671d0	68	#define CONFIG_CMD_NAND 1
2118ebb4 SP	69
	70	/* SDRAM */
	71	#define CONFIG_NR_DRAM_BANKS 1
21d671d0 XH	72	#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
	73	#define CONFIG_SYS_SDRAM_SIZE 0x04000000
	74
	75	#define CONFIG_SYS_INIT_SP_ADDR \
	76	(ATMEL_BASE_SRAM + 0x1000 - GENERATED_GBL_DATA_SIZE)
2118ebb4 SP	77
2118ebb4 SP	78	/* DataFlash */
4758ebdd	79	#define CONFIG_ATMEL_DATAFLASH_SPI
21d671d0	80	#define CONFIG_HAS_DATAFLASH 1
6d0f6bcf JCPV	81	#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
6d0f6bcf JCPV	82	#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
21d671d0 XH	83	#define AT91_SPI_CLK 15000000
	84	#define DATAFLASH_TCSS (0x1a << 16)
	85	#define DATAFLASH_TCHS (0x1 << 24)
2118ebb4	86
2118ebb4	87	/* NAND flash */
74c076d6 JCPV	88	#ifdef CONFIG_CMD_NAND
74c076d6 JCPV	89	#define CONFIG_NAND_ATMEL
6d0f6bcf	90	#define CONFIG_SYS_MAX_NAND_DEVICE 1
21d671d0	91	#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
6d0f6bcf	92	#define CONFIG_SYS_NAND_DBW_8 1
74c076d6 JCPV	93	/* our ALE is AD21 */
	94	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	95	/* our CLE is AD22 */
	96	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	97	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
	98	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
2eb99ca8	99
74c076d6	100	#endif
2118ebb4	101
111ec4c6	102	/* MMC */
111ec4c6 WJ	103
111ec4c6 WJ	104	#ifdef CONFIG_CMD_MMC
111ec4c6	105	#define CONFIG_GENERIC_ATMEL_MCI
111ec4c6 WJ	106	#endif
111ec4c6 WJ	107
2118ebb4 SP	108	/* Ethernet - not present */
	109
	110	/* USB - not supported */
	111
6d0f6bcf	112	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
2118ebb4	113
21d671d0	114	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
6d0f6bcf	115	#define CONFIG_SYS_MEMTEST_END 0x23e00000
2118ebb4	116
6d0f6bcf	117	#ifdef CONFIG_SYS_USE_DATAFLASH
2118ebb4 SP	118
2118ebb4 SP	119	/* bootstrap + u-boot + env + linux in dataflash on CS0 */
057c849c	120	#define CONFIG_ENV_IS_IN_DATAFLASH 1
6d0f6bcf	121	#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
0e8d1586	122	#define CONFIG_ENV_OFFSET 0x4200
6d0f6bcf	123	#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
0e8d1586	124	#define CONFIG_ENV_SIZE 0x4200
e139cb31	125	#define CONFIG_BOOTCOMMAND "cp.b 0xC0084000 0x22000000 0x210000; bootm"
2118ebb4 SP	126	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
2118ebb4 SP	127	"root=/dev/mtdblock0 " \
918319c7	128	"mtdparts=atmel_nand:-(root) "\
2118ebb4 SP	129	"rw rootfstype=jffs2"
2118ebb4 SP	130
0b128434	131	#elif CONFIG_SYS_USE_NANDFLASH
2118ebb4 SP	132
2118ebb4 SP	133	/* bootstrap + u-boot + env + linux in nandflash */
21d671d0	134	#define CONFIG_ENV_IS_IN_NAND 1
65b553b7 WJ	135	#define CONFIG_ENV_OFFSET 0xc0000
65b553b7 WJ	136	#define CONFIG_ENV_OFFSET_REDUND 0x100000
0e8d1586	137	#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
65b553b7 WJ	138	#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
	139	"nand read 0x21000000 0x180000 0x80000; " \
	140	"bootz 0x22000000 - 0x21000000"
	141	#define CONFIG_BOOTARGS \
	142	"console=ttyS0,115200 earlyprintk " \
	143	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
ae5070d6	144	"256K(env),256k(env_redundant),256k(spare)," \
65b553b7 WJ	145	"512k(dtb),6M(kernel)ro,-(rootfs) " \
65b553b7 WJ	146	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs"
2118ebb4	147
0b128434 WJ	148	#else /* CONFIG_SYS_USE_MMC */
	149
	150	/* bootstrap + u-boot + env + linux in mmc */
	151	#define CONFIG_ENV_IS_IN_FAT
	152	#define CONFIG_FAT_WRITE
	153	#define FAT_ENV_INTERFACE "mmc"
	154	#define FAT_ENV_FILE "uboot.env"
	155	#define FAT_ENV_DEVICE_AND_PART "0"
	156	#define CONFIG_ENV_SIZE 0x4000
	157	#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
	158	"fatload mmc 0:1 0x22000000 zImage; " \
	159	"bootz 0x22000000 - 0x21000000"
	160	#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
	161	"mtdparts=atmel_nand:" \
	162	"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
	163	"root=/dev/mmcblk0p2 rw rootwait"
2118ebb4 SP	164	#endif
2118ebb4 SP	165
6d0f6bcf JCPV	166	#define CONFIG_SYS_CBSIZE 256
6d0f6bcf JCPV	167	#define CONFIG_SYS_MAXARGS 16
6d0f6bcf	168	#define CONFIG_SYS_LONGHELP 1
21d671d0	169	#define CONFIG_CMDLINE_EDITING 1
e139cb31	170	#define CONFIG_AUTO_COMPLETE
2118ebb4	171
2118ebb4 SP	172	/*
	173	* Size of malloc() pool
	174	*/
21d671d0	175	#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
2118ebb4	176
2118ebb4	177	#endif