[people/ms/u-boot.git] / include / configs / at91sam9x5ek.h

/*
 * Copyright (C) 2012 Atmel Corporation
 *
 * Configuation settings for the AT91SAM9X5EK board.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __CONFIG_H__
#define __CONFIG_H__

#include <asm/hardware.h>

#define CONFIG_SYS_TEXT_BASE		0x26f00000

/* ARM asynchronous clock */
#define CONFIG_SYS_AT91_SLOW_CLOCK	32768
#define CONFIG_SYS_AT91_MAIN_CLOCK	12000000	/* 12 MHz crystal */

#define CONFIG_AT91SAM9X5EK

#define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_SKIP_LOWLEVEL_INIT

/* general purpose I/O */
#define CONFIG_ATMEL_LEGACY		/* required until (g)pio is fixed */
#define CONFIG_AT91_GPIO

/* serial console */
#define CONFIG_ATMEL_USART
#define CONFIG_USART_BASE	ATMEL_BASE_DBGU
#define CONFIG_USART_ID		ATMEL_ID_SYS

/* LCD */
#define LCD_BPP			LCD_COLOR16
#define LCD_OUTPUT_BPP		24
#define CONFIG_LCD_LOGO
#define CONFIG_LCD_INFO
#define CONFIG_LCD_INFO_BELOW_LOGO
#define CONFIG_ATMEL_HLCD
#define CONFIG_ATMEL_LCD_RGB565


/*
 * BOOTP options
 */
#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_BOOTP_BOOTPATH
#define CONFIG_BOOTP_GATEWAY
#define CONFIG_BOOTP_HOSTNAME

/*
 * Command line configuration.
 */
#define CONFIG_CMD_NAND

/*
 * define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
 * NB: in this case, USB 1.1 devices won't be recognized.
 */

/* SDRAM */
#define CONFIG_NR_DRAM_BANKS		1
#define CONFIG_SYS_SDRAM_BASE		0x20000000
#define CONFIG_SYS_SDRAM_SIZE		0x08000000	/* 128 megs */

#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)

/* DataFlash */
#ifdef CONFIG_CMD_SF
#define CONFIG_ATMEL_SPI
#define CONFIG_SF_DEFAULT_SPEED		30000000
#endif

/* NAND flash */
#ifdef CONFIG_CMD_NAND
#define CONFIG_NAND_ATMEL
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_DBW_8		1
/* our ALE is AD21 */
#define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIN_PD4
#define CONFIG_SYS_NAND_READY_PIN	AT91_PIN_PD5

/* PMECC & PMERRLOC */
#define CONFIG_ATMEL_NAND_HWECC		1
#define CONFIG_ATMEL_NAND_HW_PMECC	1
#define CONFIG_PMECC_CAP		2
#define CONFIG_PMECC_SECTOR_SIZE	512

#define CONFIG_CMD_NAND_TRIMFFS

#define CONFIG_MTD_DEVICE
#define CONFIG_CMD_MTDPARTS
#define CONFIG_MTD_PARTITIONS
#define CONFIG_RBTREE
#define CONFIG_LZO
#define CONFIG_CMD_UBIFS
#endif

/* MMC */
#ifdef CONFIG_CMD_MMC
#define CONFIG_GENERIC_ATMEL_MCI
#endif

/* Ethernet */
#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT		20
#define CONFIG_MACB_SEARCH_PHY

/* USB */
#ifdef CONFIG_CMD_USB
#ifdef CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_ATMEL
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS	2
#else
#define CONFIG_USB_ATMEL
#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
#define CONFIG_USB_OHCI_NEW
#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_REGS_BASE		ATMEL_BASE_OHCI
#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"at91sam9x5"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
#endif
#endif

#define CONFIG_SYS_LOAD_ADDR		0x22000000	/* load address */

#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END		0x26e00000

#ifdef CONFIG_SYS_USE_NANDFLASH
/* bootstrap + u-boot + env + linux in nandflash */
#define CONFIG_ENV_IS_IN_NAND
#define CONFIG_ENV_OFFSET		0xc0000
#define CONFIG_ENV_OFFSET_REDUND	0x100000
#define CONFIG_ENV_SIZE		0x20000		/* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND	"nand read " \
				"0x22000000 0x200000 0x300000; " \
				"bootm 0x22000000"
#elif defined(CONFIG_SYS_USE_SPIFLASH)
/* bootstrap + u-boot + env + linux in spi flash */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET	0x5000
#define CONFIG_ENV_SIZE		0x3000
#define CONFIG_ENV_SECT_SIZE	0x1000
#define CONFIG_ENV_SPI_MAX_HZ	30000000
#define CONFIG_BOOTCOMMAND	"sf probe 0; " \
				"sf read 0x22000000 0x100000 0x300000; " \
				"bootm 0x22000000"
#elif defined(CONFIG_SYS_USE_DATAFLASH)
/* bootstrap + u-boot + env + linux in data flash */
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OFFSET	0x4200
#define CONFIG_ENV_SIZE		0x4200
#define CONFIG_ENV_SECT_SIZE	0x210
#define CONFIG_ENV_SPI_MAX_HZ	30000000
#define CONFIG_BOOTCOMMAND	"sf probe 0; " \
				"sf read 0x22000000 0x84000 0x294000; " \
				"bootm 0x22000000"
#else /* CONFIG_SYS_USE_MMC */
/* bootstrap + u-boot + env + linux in mmc */
#define CONFIG_ENV_IS_IN_FAT
#define CONFIG_FAT_WRITE
#define FAT_ENV_INTERFACE	"mmc"
#define FAT_ENV_FILE		"uboot.env"
#define FAT_ENV_DEVICE_AND_PART "0"
#define CONFIG_ENV_SIZE		0x4000
#endif

#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_BOOTARGS		"mem=128M console=ttyS0,115200 " \
				"mtdparts=atmel_nand:" \
				"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
				"root=/dev/mmcblk0p2 " \
				"rw rootfstype=ext4 rootwait"
#else
#define CONFIG_BOOTARGS							\
	"console=ttyS0,115200 earlyprintk "				\
	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro,"		\
	"256k(env),256k(env_redundant),256k(spare),"			\
	"512k(dtb),6M(kernel)ro,-(rootfs) "				\
	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
#endif

#define CONFIG_SYS_CBSIZE	256
#define CONFIG_SYS_MAXARGS	16
#define CONFIG_SYS_LONGHELP
#define CONFIG_CMDLINE_EDITING
#define CONFIG_AUTO_COMPLETE

/*
 * Size of malloc() pool
 */
#define CONFIG_SYS_MALLOC_LEN		(512 * 1024 + 0x1000)

/* SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE		0x300000
#define CONFIG_SPL_MAX_SIZE		0x6000
#define CONFIG_SPL_STACK		0x308000

#define CONFIG_SPL_BSS_START_ADDR	0x20000000
#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
#define CONFIG_SYS_SPL_MALLOC_START	0x20080000
#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000

#define CONFIG_SPL_BOARD_INIT
#define CONFIG_SYS_MONITOR_LEN		(512 << 10)

#define CONFIG_SYS_MASTER_CLOCK		132096000
#define CONFIG_SYS_AT91_PLLA		0x20c73f03
#define CONFIG_SYS_MCKR			0x1301
#define CONFIG_SYS_MCKR_CSS		0x1302

#ifdef CONFIG_SYS_USE_MMC
#define CONFIG_SPL_LDSCRIPT		arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"

#elif CONFIG_SYS_USE_NANDFLASH
#define CONFIG_SPL_NAND_DRIVERS
#define CONFIG_SPL_NAND_BASE
#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0
#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER

#elif CONFIG_SYS_USE_SPIFLASH
#define CONFIG_SPL_SPI_LOAD
#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8400

#endif

#endif
Commit	Line	Data
f7fa2f37 BS	1	/*
	2	* Copyright (C) 2012 Atmel Corporation
	3	*
	4	* Configuation settings for the AT91SAM9X5EK board.
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
f7fa2f37 BS	7	*/
	8
	9	#ifndef __CONFIG_H__
	10	#define __CONFIG_H__
	11
	12	#include <asm/hardware.h>
	13
77461a65 BS	14	#define CONFIG_SYS_TEXT_BASE 0x26f00000
77461a65 BS	15
f7fa2f37 BS	16	/* ARM asynchronous clock */
	17	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
	18	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
f7fa2f37 BS	19
f7fa2f37 BS	20	#define CONFIG_AT91SAM9X5EK
f7fa2f37	21
f7fa2f37 BS	22	#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
	23	#define CONFIG_SETUP_MEMORY_TAGS
	24	#define CONFIG_INITRD_TAG
	25	#define CONFIG_SKIP_LOWLEVEL_INIT
f7fa2f37 BS	26
	27	/* general purpose I/O */
	28	#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
	29	#define CONFIG_AT91_GPIO
	30
	31	/* serial console */
	32	#define CONFIG_ATMEL_USART
	33	#define CONFIG_USART_BASE ATMEL_BASE_DBGU
	34	#define CONFIG_USART_ID ATMEL_ID_SYS
	35
	36	/* LCD */
f7fa2f37 BS	37	#define LCD_BPP LCD_COLOR16
	38	#define LCD_OUTPUT_BPP 24
	39	#define CONFIG_LCD_LOGO
f7fa2f37 BS	40	#define CONFIG_LCD_INFO
f7fa2f37 BS	41	#define CONFIG_LCD_INFO_BELOW_LOGO
f7fa2f37 BS	42	#define CONFIG_ATMEL_HLCD
f7fa2f37 BS	43	#define CONFIG_ATMEL_LCD_RGB565
f7fa2f37	44
f7fa2f37 BS	45
	46	/*
	47	* BOOTP options
	48	*/
	49	#define CONFIG_BOOTP_BOOTFILESIZE
	50	#define CONFIG_BOOTP_BOOTPATH
	51	#define CONFIG_BOOTP_GATEWAY
	52	#define CONFIG_BOOTP_HOSTNAME
	53
	54	/*
	55	* Command line configuration.
	56	*/
f7fa2f37	57	#define CONFIG_CMD_NAND
b030e731 RG	58
	59	/*
	60	* define CONFIG_USB_EHCI to enable USB Hi-Speed (aka 2.0)
	61	* NB: in this case, USB 1.1 devices won't be recognized.
	62	*/
	63
f7fa2f37 BS	64	/* SDRAM */
	65	#define CONFIG_NR_DRAM_BANKS 1
	66	#define CONFIG_SYS_SDRAM_BASE 0x20000000
	67	#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
	68
	69	#define CONFIG_SYS_INIT_SP_ADDR \
	70	(CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
	71
	72	/* DataFlash */
1d7442e6 BS	73	#ifdef CONFIG_CMD_SF
1d7442e6 BS	74	#define CONFIG_ATMEL_SPI
1d7442e6	75	#define CONFIG_SF_DEFAULT_SPEED 30000000
f7fa2f37 BS	76	#endif
f7fa2f37 BS	77
f7fa2f37 BS	78	/* NAND flash */
	79	#ifdef CONFIG_CMD_NAND
	80	#define CONFIG_NAND_ATMEL
	81	#define CONFIG_SYS_MAX_NAND_DEVICE 1
	82	#define CONFIG_SYS_NAND_BASE 0x40000000
	83	#define CONFIG_SYS_NAND_DBW_8 1
	84	/* our ALE is AD21 */
	85	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
	86	/* our CLE is AD22 */
	87	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
	88	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
	89	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
	90
df95321c WJ	91	/* PMECC & PMERRLOC */
	92	#define CONFIG_ATMEL_NAND_HWECC 1
	93	#define CONFIG_ATMEL_NAND_HW_PMECC 1
	94	#define CONFIG_PMECC_CAP 2
	95	#define CONFIG_PMECC_SECTOR_SIZE 512
df95321c	96
ce76f0aa BS	97	#define CONFIG_CMD_NAND_TRIMFFS
ce76f0aa BS	98
f7fa2f37 BS	99	#define CONFIG_MTD_DEVICE
	100	#define CONFIG_CMD_MTDPARTS
	101	#define CONFIG_MTD_PARTITIONS
	102	#define CONFIG_RBTREE
	103	#define CONFIG_LZO
f7fa2f37 BS	104	#define CONFIG_CMD_UBIFS
	105	#endif
	106
3a49cd7e WJ	107	/* MMC */
3a49cd7e WJ	108	#ifdef CONFIG_CMD_MMC
3a49cd7e	109	#define CONFIG_GENERIC_ATMEL_MCI
419fba0c RG	110	#endif
419fba0c RG	111
f7fa2f37 BS	112	/* Ethernet */
	113	#define CONFIG_MACB
	114	#define CONFIG_RMII
	115	#define CONFIG_NET_RETRY_COUNT 20
	116	#define CONFIG_MACB_SEARCH_PHY
	117
b030e731 RG	118	/* USB */
	119	#ifdef CONFIG_CMD_USB
	120	#ifdef CONFIG_USB_EHCI
	121	#define CONFIG_USB_EHCI_ATMEL
	122	#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2
	123	#else
dcd2f1a0 BS	124	#define CONFIG_USB_ATMEL
dcd2f1a0 BS	125	#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
b030e731 RG	126	#define CONFIG_USB_OHCI_NEW
	127	#define CONFIG_SYS_USB_OHCI_CPU_INIT
	128	#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
	129	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5"
	130	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
	131	#endif
b030e731 RG	132	#endif
b030e731 RG	133
f7fa2f37 BS	134	#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
	135
	136	#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
	137	#define CONFIG_SYS_MEMTEST_END 0x26e00000
	138
	139	#ifdef CONFIG_SYS_USE_NANDFLASH
	140	/* bootstrap + u-boot + env + linux in nandflash */
	141	#define CONFIG_ENV_IS_IN_NAND
	142	#define CONFIG_ENV_OFFSET 0xc0000
	143	#define CONFIG_ENV_OFFSET_REDUND 0x100000
	144	#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
	145	#define CONFIG_BOOTCOMMAND "nand read " \
	146	"0x22000000 0x200000 0x300000; " \
	147	"bootm 0x22000000"
b7e3129e	148	#elif defined(CONFIG_SYS_USE_SPIFLASH)
1d7442e6 BS	149	/* bootstrap + u-boot + env + linux in spi flash */
	150	#define CONFIG_ENV_IS_IN_SPI_FLASH
	151	#define CONFIG_ENV_OFFSET 0x5000
	152	#define CONFIG_ENV_SIZE 0x3000
	153	#define CONFIG_ENV_SECT_SIZE 0x1000
	154	#define CONFIG_ENV_SPI_MAX_HZ 30000000
	155	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
	156	"sf read 0x22000000 0x100000 0x300000; " \
	157	"bootm 0x22000000"
961ffc77 BS	158	#elif defined(CONFIG_SYS_USE_DATAFLASH)
	159	/* bootstrap + u-boot + env + linux in data flash */
	160	#define CONFIG_ENV_IS_IN_SPI_FLASH
	161	#define CONFIG_ENV_OFFSET 0x4200
	162	#define CONFIG_ENV_SIZE 0x4200
	163	#define CONFIG_ENV_SECT_SIZE 0x210
	164	#define CONFIG_ENV_SPI_MAX_HZ 30000000
	165	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
	166	"sf read 0x22000000 0x84000 0x294000; " \
	167	"bootm 0x22000000"
b7e3129e WJ	168	#else /* CONFIG_SYS_USE_MMC */
b7e3129e WJ	169	/* bootstrap + u-boot + env + linux in mmc */
26961772 WJ	170	#define CONFIG_ENV_IS_IN_FAT
	171	#define CONFIG_FAT_WRITE
	172	#define FAT_ENV_INTERFACE "mmc"
	173	#define FAT_ENV_FILE "uboot.env"
	174	#define FAT_ENV_DEVICE_AND_PART "0"
	175	#define CONFIG_ENV_SIZE 0x4000
f7fa2f37 BS	176	#endif
f7fa2f37 BS	177
b7e3129e WJ	178	#ifdef CONFIG_SYS_USE_MMC
	179	#define CONFIG_BOOTARGS "mem=128M console=ttyS0,115200 " \
	180	"mtdparts=atmel_nand:" \
	181	"8M(bootstrap/uboot/kernel)ro,-(rootfs) " \
	182	"root=/dev/mmcblk0p2 " \
	183	"rw rootfstype=ext4 rootwait"
	184	#else
0c58cfa9 BS	185	#define CONFIG_BOOTARGS \
	186	"console=ttyS0,115200 earlyprintk " \
	187	"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
	188	"256k(env),256k(env_redundant),256k(spare)," \
	189	"512k(dtb),6M(kernel)ro,-(rootfs) " \
	190	"rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw"
b7e3129e	191	#endif
f7fa2f37	192
f7fa2f37 BS	193	#define CONFIG_SYS_CBSIZE 256
f7fa2f37 BS	194	#define CONFIG_SYS_MAXARGS 16
f7fa2f37 BS	195	#define CONFIG_SYS_LONGHELP
	196	#define CONFIG_CMDLINE_EDITING
	197	#define CONFIG_AUTO_COMPLETE
f7fa2f37 BS	198
	199	/*
	200	* Size of malloc() pool
	201	*/
	202	#define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000)
	203
d85e8914 BS	204	/* SPL */
	205	#define CONFIG_SPL_FRAMEWORK
	206	#define CONFIG_SPL_TEXT_BASE 0x300000
	207	#define CONFIG_SPL_MAX_SIZE 0x6000
	208	#define CONFIG_SPL_STACK 0x308000
	209
	210	#define CONFIG_SPL_BSS_START_ADDR 0x20000000
	211	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
	212	#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
	213	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
	214
d85e8914 BS	215	#define CONFIG_SPL_BOARD_INIT
	216	#define CONFIG_SYS_MONITOR_LEN (512 << 10)
	217
	218	#define CONFIG_SYS_MASTER_CLOCK 132096000
	219	#define CONFIG_SYS_AT91_PLLA 0x20c73f03
	220	#define CONFIG_SYS_MCKR 0x1301
	221	#define CONFIG_SYS_MCKR_CSS 0x1302
	222
d85e8914 BS	223	#ifdef CONFIG_SYS_USE_MMC
d85e8914 BS	224	#define CONFIG_SPL_LDSCRIPT arch/arm/mach-at91/arm926ejs/u-boot-spl.lds
d85e8914 BS	225	#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
d85e8914 BS	226	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
d85e8914 BS	227
d85e8914 BS	228	#elif CONFIG_SYS_USE_NANDFLASH
d85e8914 BS	229	#define CONFIG_SPL_NAND_DRIVERS
	230	#define CONFIG_SPL_NAND_BASE
	231	#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000
	232	#define CONFIG_SYS_NAND_5_ADDR_CYCLE
	233	#define CONFIG_SYS_NAND_PAGE_SIZE 0x800
	234	#define CONFIG_SYS_NAND_PAGE_COUNT 64
	235	#define CONFIG_SYS_NAND_OOBSIZE 64
	236	#define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000
	237	#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0
	238	#define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
	239
	240	#elif CONFIG_SYS_USE_SPIFLASH
d85e8914 BS	241	#define CONFIG_SPL_SPI_LOAD
	242	#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400
	243
	244	#endif
	245
f7fa2f37	246	#endif